LXR linux/arch/arm/mach-s3c24xx/mach-vstms.c

   1/* linux/arch/arm/mach-s3c2412/mach-vstms.c
   2 *
   3 * (C) 2006 Thomas Gleixner <tglx@linutronix.de>
   4 *
   5 * Derived from mach-smdk2413.c - (C) 2006 Simtec Electronics
   6 *
   7 * This program is free software; you can redistribute it and/or modify
   8 * it under the terms of the GNU General Public License version 2 as
   9 * published by the Free Software Foundation.
  10 */
  11
  12#include <linux/kernel.h>
  13#include <linux/types.h>
  14#include <linux/interrupt.h>
  15#include <linux/list.h>
  16#include <linux/timer.h>
  17#include <linux/init.h>
  18#include <linux/serial_core.h>
  19#include <linux/platform_device.h>
  20#include <linux/io.h>
  21#include <linux/mtd/mtd.h>
  22#include <linux/mtd/nand.h>
  23#include <linux/mtd/nand_ecc.h>
  24#include <linux/mtd/partitions.h>
  25
  26#include <asm/mach/arch.h>
  27#include <asm/mach/map.h>
  28#include <asm/mach/irq.h>
  29
  30#include <mach/hardware.h>
  31#include <asm/setup.h>
  32#include <asm/irq.h>
  33#include <asm/mach-types.h>
  34
  35#include <plat/regs-serial.h>
  36#include <mach/regs-gpio.h>
  37#include <mach/regs-lcd.h>
  38
  39#include <mach/fb.h>
  40
  41#include <linux/platform_data/i2c-s3c2410.h>
  42#include <linux/platform_data/mtd-nand-s3c2410.h>
  43
  44#include <plat/s3c2410.h>
  45#include <plat/s3c2412.h>
  46#include <plat/clock.h>
  47#include <plat/devs.h>
  48#include <plat/cpu.h>
  49
  50
  51static struct map_desc vstms_iodesc[] __initdata = {
  52};
  53
  54static struct s3c2410_uartcfg vstms_uartcfgs[] __initdata = {
  55        [0] = {
  56                .hwport      = 0,
  57                .flags       = 0,
  58                .ucon        = 0x3c5,
  59                .ulcon       = 0x03,
  60                .ufcon       = 0x51,
  61        },
  62        [1] = {
  63                .hwport      = 1,
  64                .flags       = 0,
  65                .ucon        = 0x3c5,
  66                .ulcon       = 0x03,
  67                .ufcon       = 0x51,
  68        },
  69        [2] = {
  70                .hwport      = 2,
  71                .flags       = 0,
  72                .ucon        = 0x3c5,
  73                .ulcon       = 0x03,
  74                .ufcon       = 0x51,
  75        }
  76};
  77
  78static struct mtd_partition __initdata vstms_nand_part[] = {
  79        [0] = {
  80                .name   = "Boot Agent",
  81                .size   = 0x7C000,
  82                .offset = 0,
  83        },
  84        [1] = {
  85                .name   = "UBoot Config",
  86                .offset = 0x7C000,
  87                .size   = 0x4000,
  88        },
  89        [2] = {
  90                .name   = "Kernel",
  91                .offset = 0x80000,
  92                .size   = 0x200000,
  93        },
  94        [3] = {
  95                .name   = "RFS",
  96                .offset = 0x280000,
  97                .size   = 0x3d80000,
  98        },
  99};
 100
 101static struct s3c2410_nand_set __initdata vstms_nand_sets[] = {
 102        [0] = {
 103                .name           = "NAND",
 104                .nr_chips       = 1,
 105                .nr_partitions  = ARRAY_SIZE(vstms_nand_part),
 106                .partitions     = vstms_nand_part,
 107        },
 108};
 109
 110/* choose a set of timings which should suit most 512Mbit
 111 * chips and beyond.
 112*/
 113
 114static struct s3c2410_platform_nand __initdata vstms_nand_info = {
 115        .tacls          = 20,
 116        .twrph0         = 60,
 117        .twrph1         = 20,
 118        .nr_sets        = ARRAY_SIZE(vstms_nand_sets),
 119        .sets           = vstms_nand_sets,
 120};
 121
 122static struct platform_device *vstms_devices[] __initdata = {
 123        &s3c_device_ohci,
 124        &s3c_device_wdt,
 125        &s3c_device_i2c0,
 126        &s3c_device_iis,
 127        &s3c_device_rtc,
 128        &s3c_device_nand,
 129};
 130
 131static void __init vstms_fixup(struct tag *tags, char **cmdline,
 132                               struct meminfo *mi)
 133{
 134        if (tags != phys_to_virt(S3C2410_SDRAM_PA + 0x100)) {
 135                mi->nr_banks=1;
 136                mi->bank[0].start = 0x30000000;
 137                mi->bank[0].size = SZ_64M;
 138        }
 139}
 140
 141static void __init vstms_map_io(void)
 142{
 143        s3c24xx_init_io(vstms_iodesc, ARRAY_SIZE(vstms_iodesc));
 144        s3c24xx_init_clocks(12000000);
 145        s3c24xx_init_uarts(vstms_uartcfgs, ARRAY_SIZE(vstms_uartcfgs));
 146}
 147
 148static void __init vstms_init(void)
 149{
 150        s3c_i2c0_set_platdata(NULL);
 151        s3c_nand_set_platdata(&vstms_nand_info);
 152
 153        platform_add_devices(vstms_devices, ARRAY_SIZE(vstms_devices));
 154}
 155
 156MACHINE_START(VSTMS, "VSTMS")
 157        .atag_offset    = 0x100,
 158
 159        .fixup          = vstms_fixup,
 160        .init_irq       = s3c24xx_init_irq,
 161        .init_machine   = vstms_init,
 162        .map_io         = vstms_map_io,
 163        .init_time      = s3c24xx_timer_init,
 164        .restart        = s3c2412_restart,
 165MACHINE_END
 166