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11#include <linux/kernel.h>
12#include <linux/platform_device.h>
13#include <linux/io.h>
14#include <linux/spinlock.h>
15#include <mach/regs-clock.h>
16
17static int __s5p_mipi_phy_control(int id, bool on, u32 reset)
18{
19 static DEFINE_SPINLOCK(lock);
20 void __iomem *addr;
21 unsigned long flags;
22 u32 cfg;
23
24 id = max(0, id);
25 if (id > 1)
26 return -EINVAL;
27
28 addr = S5P_MIPI_DPHY_CONTROL(id);
29
30 spin_lock_irqsave(&lock, flags);
31
32 cfg = __raw_readl(addr);
33 cfg = on ? (cfg | reset) : (cfg & ~reset);
34 __raw_writel(cfg, addr);
35
36 if (on) {
37 cfg |= S5P_MIPI_DPHY_ENABLE;
38 } else if (!(cfg & (S5P_MIPI_DPHY_SRESETN |
39 S5P_MIPI_DPHY_MRESETN) & ~reset)) {
40 cfg &= ~S5P_MIPI_DPHY_ENABLE;
41 }
42
43 __raw_writel(cfg, addr);
44 spin_unlock_irqrestore(&lock, flags);
45
46 return 0;
47}
48
49int s5p_csis_phy_enable(int id, bool on)
50{
51 return __s5p_mipi_phy_control(id, on, S5P_MIPI_DPHY_SRESETN);
52}
53
54int s5p_dsim_phy_enable(struct platform_device *pdev, bool on)
55{
56 return __s5p_mipi_phy_control(pdev->id, on, S5P_MIPI_DPHY_MRESETN);
57}
58