linux/arch/blackfin/mach-bf527/boards/ad7160eval.c
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   1/*
   2 * Copyright 2004-20010 Analog Devices Inc.
   3 *                2005 National ICT Australia (NICTA)
   4 *                      Aidan Williams <aidan@nicta.com.au>
   5 *
   6 * Licensed under the GPL-2 or later.
   7 */
   8
   9#include <linux/device.h>
  10#include <linux/export.h>
  11#include <linux/platform_device.h>
  12#include <linux/mtd/mtd.h>
  13#include <linux/mtd/partitions.h>
  14#include <linux/mtd/physmap.h>
  15#include <linux/spi/spi.h>
  16#include <linux/spi/flash.h>
  17#include <linux/i2c.h>
  18#include <linux/irq.h>
  19#include <linux/interrupt.h>
  20#include <linux/usb/musb.h>
  21#include <linux/leds.h>
  22#include <linux/input.h>
  23#include <asm/dma.h>
  24#include <asm/bfin5xx_spi.h>
  25#include <asm/reboot.h>
  26#include <asm/nand.h>
  27#include <asm/portmux.h>
  28#include <asm/dpmc.h>
  29
  30
  31/*
  32 * Name the Board for the /proc/cpuinfo
  33 */
  34const char bfin_board_name[] = "ADI BF527-AD7160EVAL";
  35
  36/*
  37 *  Driver needs to know address, irq and flag pin.
  38 */
  39
  40#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
  41static struct resource musb_resources[] = {
  42        [0] = {
  43                .start  = 0xffc03800,
  44                .end    = 0xffc03cff,
  45                .flags  = IORESOURCE_MEM,
  46        },
  47        [1] = { /* general IRQ */
  48                .start  = IRQ_USB_INT0,
  49                .end    = IRQ_USB_INT0,
  50                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  51        },
  52        [2] = { /* DMA IRQ */
  53                .start  = IRQ_USB_DMA,
  54                .end    = IRQ_USB_DMA,
  55                .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  56        },
  57};
  58
  59static struct musb_hdrc_config musb_config = {
  60        .multipoint     = 0,
  61        .dyn_fifo       = 0,
  62        .soft_con       = 1,
  63        .dma            = 1,
  64        .num_eps        = 8,
  65        .dma_channels   = 8,
  66        .gpio_vrsel     = GPIO_PG13,
  67        /* Some custom boards need to be active low, just set it to "0"
  68         * if it is the case.
  69         */
  70        .gpio_vrsel_active      = 1,
  71        .clkin          = 24,           /* musb CLKIN in MHZ */
  72};
  73
  74static struct musb_hdrc_platform_data musb_plat = {
  75#if defined(CONFIG_USB_MUSB_OTG)
  76        .mode           = MUSB_OTG,
  77#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
  78        .mode           = MUSB_HOST,
  79#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
  80        .mode           = MUSB_PERIPHERAL,
  81#endif
  82        .config         = &musb_config,
  83};
  84
  85static u64 musb_dmamask = ~(u32)0;
  86
  87static struct platform_device musb_device = {
  88        .name           = "musb-blackfin",
  89        .id             = 0,
  90        .dev = {
  91                .dma_mask               = &musb_dmamask,
  92                .coherent_dma_mask      = 0xffffffff,
  93                .platform_data          = &musb_plat,
  94        },
  95        .num_resources  = ARRAY_SIZE(musb_resources),
  96        .resource       = musb_resources,
  97};
  98#endif
  99
 100#if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
 101static struct resource bf52x_ra158z_resources[] = {
 102        {
 103                .start = IRQ_PPI_ERROR,
 104                .end = IRQ_PPI_ERROR,
 105                .flags = IORESOURCE_IRQ,
 106        },
 107};
 108
 109static struct platform_device bf52x_ra158z_device = {
 110        .name           = "bfin-ra158z",
 111        .id             = -1,
 112        .num_resources  = ARRAY_SIZE(bf52x_ra158z_resources),
 113        .resource       = bf52x_ra158z_resources,
 114};
 115#endif
 116
 117#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 118static struct mtd_partition ad7160eval_partitions[] = {
 119        {
 120                .name       = "bootloader(nor)",
 121                .size       = 0x40000,
 122                .offset     = 0,
 123        }, {
 124                .name       = "linux kernel(nor)",
 125                .size       = 0x1C0000,
 126                .offset     = MTDPART_OFS_APPEND,
 127        }, {
 128                .name       = "file system(nor)",
 129                .size       = MTDPART_SIZ_FULL,
 130                .offset     = MTDPART_OFS_APPEND,
 131        }
 132};
 133
 134static struct physmap_flash_data ad7160eval_flash_data = {
 135        .width      = 2,
 136        .parts      = ad7160eval_partitions,
 137        .nr_parts   = ARRAY_SIZE(ad7160eval_partitions),
 138};
 139
 140static struct resource ad7160eval_flash_resource = {
 141        .start = 0x20000000,
 142        .end   = 0x203fffff,
 143        .flags = IORESOURCE_MEM,
 144};
 145
 146static struct platform_device ad7160eval_flash_device = {
 147        .name          = "physmap-flash",
 148        .id            = 0,
 149        .dev = {
 150                .platform_data = &ad7160eval_flash_data,
 151        },
 152        .num_resources = 1,
 153        .resource      = &ad7160eval_flash_resource,
 154};
 155#endif
 156
 157#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 158static struct mtd_partition partition_info[] = {
 159        {
 160                .name = "linux kernel(nand)",
 161                .offset = 0,
 162                .size = 4 * 1024 * 1024,
 163        },
 164        {
 165                .name = "file system(nand)",
 166                .offset = MTDPART_OFS_APPEND,
 167                .size = MTDPART_SIZ_FULL,
 168        },
 169};
 170
 171static struct bf5xx_nand_platform bf5xx_nand_platform = {
 172        .data_width = NFC_NWIDTH_8,
 173        .partitions = partition_info,
 174        .nr_partitions = ARRAY_SIZE(partition_info),
 175        .rd_dly = 3,
 176        .wr_dly = 3,
 177};
 178
 179static struct resource bf5xx_nand_resources[] = {
 180        {
 181                .start = NFC_CTL,
 182                .end = NFC_DATA_RD + 2,
 183                .flags = IORESOURCE_MEM,
 184        },
 185        {
 186                .start = CH_NFC,
 187                .end = CH_NFC,
 188                .flags = IORESOURCE_IRQ,
 189        },
 190};
 191
 192static struct platform_device bf5xx_nand_device = {
 193        .name = "bf5xx-nand",
 194        .id = 0,
 195        .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
 196        .resource = bf5xx_nand_resources,
 197        .dev = {
 198                .platform_data = &bf5xx_nand_platform,
 199        },
 200};
 201#endif
 202
 203#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 204static struct platform_device rtc_device = {
 205        .name = "rtc-bfin",
 206        .id   = -1,
 207};
 208#endif
 209
 210#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 211#include <linux/bfin_mac.h>
 212static const unsigned short bfin_mac_peripherals[] = P_RMII0;
 213
 214static struct bfin_phydev_platform_data bfin_phydev_data[] = {
 215        {
 216                .addr = 1,
 217                .irq = IRQ_MAC_PHYINT,
 218        },
 219};
 220
 221static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
 222        .phydev_number = 1,
 223        .phydev_data = bfin_phydev_data,
 224        .phy_mode = PHY_INTERFACE_MODE_RMII,
 225        .mac_peripherals = bfin_mac_peripherals,
 226};
 227
 228static struct platform_device bfin_mii_bus = {
 229        .name = "bfin_mii_bus",
 230        .dev = {
 231                .platform_data = &bfin_mii_bus_data,
 232        }
 233};
 234
 235static struct platform_device bfin_mac_device = {
 236        .name = "bfin_mac",
 237        .dev = {
 238                .platform_data = &bfin_mii_bus,
 239        }
 240};
 241#endif
 242
 243
 244#if defined(CONFIG_MTD_M25P80) \
 245        || defined(CONFIG_MTD_M25P80_MODULE)
 246static struct mtd_partition bfin_spi_flash_partitions[] = {
 247        {
 248                .name = "bootloader(spi)",
 249                .size = 0x00040000,
 250                .offset = 0,
 251                .mask_flags = MTD_CAP_ROM
 252        }, {
 253                .name = "linux kernel(spi)",
 254                .size = MTDPART_SIZ_FULL,
 255                .offset = MTDPART_OFS_APPEND,
 256        }
 257};
 258
 259static struct flash_platform_data bfin_spi_flash_data = {
 260        .name = "m25p80",
 261        .parts = bfin_spi_flash_partitions,
 262        .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
 263        .type = "m25p16",
 264};
 265
 266/* SPI flash chip (m25p64) */
 267static struct bfin5xx_spi_chip spi_flash_chip_info = {
 268        .enable_dma = 0,         /* use dma transfer with this chip*/
 269};
 270#endif
 271
 272#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 273static struct bfin5xx_spi_chip  mmc_spi_chip_info = {
 274        .enable_dma = 0,
 275};
 276#endif
 277
 278#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 279static struct platform_device bfin_i2s = {
 280        .name = "bfin-i2s",
 281        .id = CONFIG_SND_BF5XX_SPORT_NUM,
 282        /* TODO: add platform data here */
 283};
 284#endif
 285
 286#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 287static struct platform_device bfin_tdm = {
 288        .name = "bfin-tdm",
 289        .id = CONFIG_SND_BF5XX_SPORT_NUM,
 290        /* TODO: add platform data here */
 291};
 292#endif
 293
 294static struct spi_board_info bfin_spi_board_info[] __initdata = {
 295#if defined(CONFIG_MTD_M25P80) \
 296        || defined(CONFIG_MTD_M25P80_MODULE)
 297        {
 298                /* the modalias must be the same as spi device driver name */
 299                .modalias = "m25p80", /* Name of spi_driver for this device */
 300                .max_speed_hz = 25000000,     /* max spi clock (SCK) speed in HZ */
 301                .bus_num = 0, /* Framework bus number */
 302                .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
 303                .platform_data = &bfin_spi_flash_data,
 304                .controller_data = &spi_flash_chip_info,
 305                .mode = SPI_MODE_3,
 306        },
 307#endif
 308#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
 309        || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
 310        {
 311                .modalias = "ad183x",
 312                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 313                .bus_num = 0,
 314                .chip_select = 4,
 315        },
 316#endif
 317#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 318        {
 319                .modalias = "mmc_spi",
 320                .max_speed_hz = 30000000,     /* max spi clock (SCK) speed in HZ */
 321                .bus_num = 0,
 322                .chip_select = GPIO_PH3 + MAX_CTRL_CS,
 323                .controller_data = &mmc_spi_chip_info,
 324                .mode = SPI_MODE_3,
 325        },
 326#endif
 327#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
 328        {
 329                .modalias = "spidev",
 330                .max_speed_hz = 3125000,     /* max spi clock (SCK) speed in HZ */
 331                .bus_num = 0,
 332                .chip_select = 1,
 333        },
 334#endif
 335};
 336
 337#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 338/* SPI controller data */
 339static struct bfin5xx_spi_master bfin_spi0_info = {
 340        .num_chipselect = MAX_CTRL_CS + MAX_BLACKFIN_GPIOS,
 341        .enable_dma = 1,  /* master has the ability to do dma transfer */
 342        .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 343};
 344
 345/* SPI (0) */
 346static struct resource bfin_spi0_resource[] = {
 347        [0] = {
 348                .start = SPI0_REGBASE,
 349                .end   = SPI0_REGBASE + 0xFF,
 350                .flags = IORESOURCE_MEM,
 351                },
 352        [1] = {
 353                .start = CH_SPI,
 354                .end   = CH_SPI,
 355                .flags = IORESOURCE_DMA,
 356        },
 357        [2] = {
 358                .start = IRQ_SPI,
 359                .end   = IRQ_SPI,
 360                .flags = IORESOURCE_IRQ,
 361        },
 362};
 363
 364static struct platform_device bfin_spi0_device = {
 365        .name = "bfin-spi",
 366        .id = 0, /* Bus number */
 367        .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 368        .resource = bfin_spi0_resource,
 369        .dev = {
 370                .platform_data = &bfin_spi0_info, /* Passed to driver */
 371        },
 372};
 373#endif  /* spi master and devices */
 374
 375#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 376#ifdef CONFIG_SERIAL_BFIN_UART0
 377static struct resource bfin_uart0_resources[] = {
 378        {
 379                .start = UART0_THR,
 380                .end = UART0_GCTL+2,
 381                .flags = IORESOURCE_MEM,
 382        },
 383        {
 384                .start = IRQ_UART0_TX,
 385                .end = IRQ_UART0_TX,
 386                .flags = IORESOURCE_IRQ,
 387        },
 388        {
 389                .start = IRQ_UART0_RX,
 390                .end = IRQ_UART0_RX,
 391                .flags = IORESOURCE_IRQ,
 392        },
 393        {
 394                .start = IRQ_UART0_ERROR,
 395                .end = IRQ_UART0_ERROR,
 396                .flags = IORESOURCE_IRQ,
 397        },
 398        {
 399                .start = CH_UART0_TX,
 400                .end = CH_UART0_TX,
 401                .flags = IORESOURCE_DMA,
 402        },
 403        {
 404                .start = CH_UART0_RX,
 405                .end = CH_UART0_RX,
 406                .flags = IORESOURCE_DMA,
 407        },
 408};
 409
 410static unsigned short bfin_uart0_peripherals[] = {
 411        P_UART0_TX, P_UART0_RX, 0
 412};
 413
 414static struct platform_device bfin_uart0_device = {
 415        .name = "bfin-uart",
 416        .id = 0,
 417        .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 418        .resource = bfin_uart0_resources,
 419        .dev = {
 420                .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 421        },
 422};
 423#endif
 424#ifdef CONFIG_SERIAL_BFIN_UART1
 425static struct resource bfin_uart1_resources[] = {
 426        {
 427                .start = UART1_THR,
 428                .end = UART1_GCTL+2,
 429                .flags = IORESOURCE_MEM,
 430        },
 431        {
 432                .start = IRQ_UART1_TX,
 433                .end = IRQ_UART1_TX,
 434                .flags = IORESOURCE_IRQ,
 435        },
 436        {
 437                .start = IRQ_UART1_RX,
 438                .end = IRQ_UART1_RX,
 439                .flags = IORESOURCE_IRQ,
 440        },
 441        {
 442                .start = IRQ_UART1_ERROR,
 443                .end = IRQ_UART1_ERROR,
 444                .flags = IORESOURCE_IRQ,
 445        },
 446        {
 447                .start = CH_UART1_TX,
 448                .end = CH_UART1_TX,
 449                .flags = IORESOURCE_DMA,
 450        },
 451        {
 452                .start = CH_UART1_RX,
 453                .end = CH_UART1_RX,
 454                .flags = IORESOURCE_DMA,
 455        },
 456#ifdef CONFIG_BFIN_UART1_CTSRTS
 457        {       /* CTS pin */
 458                .start = GPIO_PF9,
 459                .end = GPIO_PF9,
 460                .flags = IORESOURCE_IO,
 461        },
 462        {       /* RTS pin */
 463                .start = GPIO_PF10,
 464                .end = GPIO_PF10,
 465                .flags = IORESOURCE_IO,
 466        },
 467#endif
 468};
 469
 470static unsigned short bfin_uart1_peripherals[] = {
 471        P_UART1_TX, P_UART1_RX, 0
 472};
 473
 474static struct platform_device bfin_uart1_device = {
 475        .name = "bfin-uart",
 476        .id = 1,
 477        .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 478        .resource = bfin_uart1_resources,
 479        .dev = {
 480                .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 481        },
 482};
 483#endif
 484#endif
 485
 486#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 487#ifdef CONFIG_BFIN_SIR0
 488static struct resource bfin_sir0_resources[] = {
 489        {
 490                .start = 0xFFC00400,
 491                .end = 0xFFC004FF,
 492                .flags = IORESOURCE_MEM,
 493        },
 494        {
 495                .start = IRQ_UART0_RX,
 496                .end = IRQ_UART0_RX+1,
 497                .flags = IORESOURCE_IRQ,
 498        },
 499        {
 500                .start = CH_UART0_RX,
 501                .end = CH_UART0_RX+1,
 502                .flags = IORESOURCE_DMA,
 503        },
 504};
 505
 506static struct platform_device bfin_sir0_device = {
 507        .name = "bfin_sir",
 508        .id = 0,
 509        .num_resources = ARRAY_SIZE(bfin_sir0_resources),
 510        .resource = bfin_sir0_resources,
 511};
 512#endif
 513#ifdef CONFIG_BFIN_SIR1
 514static struct resource bfin_sir1_resources[] = {
 515        {
 516                .start = 0xFFC02000,
 517                .end = 0xFFC020FF,
 518                .flags = IORESOURCE_MEM,
 519        },
 520        {
 521                .start = IRQ_UART1_RX,
 522                .end = IRQ_UART1_RX+1,
 523                .flags = IORESOURCE_IRQ,
 524        },
 525        {
 526                .start = CH_UART1_RX,
 527                .end = CH_UART1_RX+1,
 528                .flags = IORESOURCE_DMA,
 529        },
 530};
 531
 532static struct platform_device bfin_sir1_device = {
 533        .name = "bfin_sir",
 534        .id = 1,
 535        .num_resources = ARRAY_SIZE(bfin_sir1_resources),
 536        .resource = bfin_sir1_resources,
 537};
 538#endif
 539#endif
 540
 541#if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
 542#include <linux/input/ad7160.h>
 543static const struct ad7160_platform_data bfin_ad7160_ts_info = {
 544        .sensor_x_res = 854,
 545        .sensor_y_res = 480,
 546        .pressure = 100,
 547        .filter_coef = 3,
 548        .coord_pref = AD7160_ORIG_TOP_LEFT,
 549        .first_touch_window = 5,
 550        .move_window = 3,
 551        .event_cabs = AD7160_EMIT_ABS_MT_TRACKING_ID |
 552                        AD7160_EMIT_ABS_MT_PRESSURE |
 553                        AD7160_TRACKING_ID_ASCENDING,
 554        .finger_act_ctrl = 0x64,
 555        .haptic_effect1_ctrl = AD7160_HAPTIC_SLOT_A(60) |
 556                                AD7160_HAPTIC_SLOT_A_LVL_HIGH |
 557                                AD7160_HAPTIC_SLOT_B(60) |
 558                                AD7160_HAPTIC_SLOT_B_LVL_LOW,
 559
 560        .haptic_effect2_ctrl = AD7160_HAPTIC_SLOT_A(20) |
 561                                AD7160_HAPTIC_SLOT_A_LVL_HIGH |
 562                                AD7160_HAPTIC_SLOT_B(80) |
 563                                AD7160_HAPTIC_SLOT_B_LVL_LOW |
 564                                AD7160_HAPTIC_SLOT_C(120) |
 565                                AD7160_HAPTIC_SLOT_C_LVL_HIGH |
 566                                AD7160_HAPTIC_SLOT_D(30) |
 567                                AD7160_HAPTIC_SLOT_D_LVL_LOW,
 568};
 569#endif
 570
 571#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 572static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
 573
 574static struct resource bfin_twi0_resource[] = {
 575        [0] = {
 576                .start = TWI0_REGBASE,
 577                .end   = TWI0_REGBASE,
 578                .flags = IORESOURCE_MEM,
 579        },
 580        [1] = {
 581                .start = IRQ_TWI,
 582                .end   = IRQ_TWI,
 583                .flags = IORESOURCE_IRQ,
 584        },
 585};
 586
 587static struct platform_device i2c_bfin_twi_device = {
 588        .name = "i2c-bfin-twi",
 589        .id = 0,
 590        .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 591        .resource = bfin_twi0_resource,
 592        .dev = {
 593                .platform_data = &bfin_twi0_pins,
 594        },
 595};
 596#endif
 597
 598static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
 599#if defined(CONFIG_TOUCHSCREEN_AD7160) || defined(CONFIG_TOUCHSCREEN_AD7160_MODULE)
 600        {
 601                I2C_BOARD_INFO("ad7160", 0x33),
 602                .irq = IRQ_PH1,
 603                .platform_data = (void *)&bfin_ad7160_ts_info,
 604        },
 605#endif
 606};
 607
 608#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 609#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 610static struct resource bfin_sport0_uart_resources[] = {
 611        {
 612                .start = SPORT0_TCR1,
 613                .end = SPORT0_MRCS3+4,
 614                .flags = IORESOURCE_MEM,
 615        },
 616        {
 617                .start = IRQ_SPORT0_RX,
 618                .end = IRQ_SPORT0_RX+1,
 619                .flags = IORESOURCE_IRQ,
 620        },
 621        {
 622                .start = IRQ_SPORT0_ERROR,
 623                .end = IRQ_SPORT0_ERROR,
 624                .flags = IORESOURCE_IRQ,
 625        },
 626};
 627
 628static unsigned short bfin_sport0_peripherals[] = {
 629        P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
 630        P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
 631};
 632
 633static struct platform_device bfin_sport0_uart_device = {
 634        .name = "bfin-sport-uart",
 635        .id = 0,
 636        .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
 637        .resource = bfin_sport0_uart_resources,
 638        .dev = {
 639                .platform_data = &bfin_sport0_peripherals, /* Passed to driver */
 640        },
 641};
 642#endif
 643#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 644static struct resource bfin_sport1_uart_resources[] = {
 645        {
 646                .start = SPORT1_TCR1,
 647                .end = SPORT1_MRCS3+4,
 648                .flags = IORESOURCE_MEM,
 649        },
 650        {
 651                .start = IRQ_SPORT1_RX,
 652                .end = IRQ_SPORT1_RX+1,
 653                .flags = IORESOURCE_IRQ,
 654        },
 655        {
 656                .start = IRQ_SPORT1_ERROR,
 657                .end = IRQ_SPORT1_ERROR,
 658                .flags = IORESOURCE_IRQ,
 659        },
 660};
 661
 662static unsigned short bfin_sport1_peripherals[] = {
 663        P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
 664        P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
 665};
 666
 667static struct platform_device bfin_sport1_uart_device = {
 668        .name = "bfin-sport-uart",
 669        .id = 1,
 670        .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
 671        .resource = bfin_sport1_uart_resources,
 672        .dev = {
 673                .platform_data = &bfin_sport1_peripherals, /* Passed to driver */
 674        },
 675};
 676#endif
 677#endif
 678
 679#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 680#include <asm/bfin_rotary.h>
 681
 682static struct bfin_rotary_platform_data bfin_rotary_data = {
 683        /*.rotary_up_key     = KEY_UP,*/
 684        /*.rotary_down_key   = KEY_DOWN,*/
 685        .rotary_rel_code   = REL_WHEEL,
 686        .rotary_button_key = KEY_ENTER,
 687        .debounce          = 10,        /* 0..17 */
 688        .mode              = ROT_QUAD_ENC | ROT_DEBE,
 689        .pm_wakeup         = 1,
 690};
 691
 692static struct resource bfin_rotary_resources[] = {
 693        {
 694                .start = IRQ_CNT,
 695                .end = IRQ_CNT,
 696                .flags = IORESOURCE_IRQ,
 697        },
 698};
 699
 700static struct platform_device bfin_rotary_device = {
 701        .name           = "bfin-rotary",
 702        .id             = -1,
 703        .num_resources  = ARRAY_SIZE(bfin_rotary_resources),
 704        .resource       = bfin_rotary_resources,
 705        .dev            = {
 706                .platform_data = &bfin_rotary_data,
 707        },
 708};
 709#endif
 710
 711static const unsigned int cclk_vlev_datasheet[] = {
 712        VRPAIR(VLEV_100, 400000000),
 713        VRPAIR(VLEV_105, 426000000),
 714        VRPAIR(VLEV_110, 500000000),
 715        VRPAIR(VLEV_115, 533000000),
 716        VRPAIR(VLEV_120, 600000000),
 717};
 718
 719static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
 720        .tuple_tab = cclk_vlev_datasheet,
 721        .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
 722        .vr_settling_time = 25 /* us */,
 723};
 724
 725static struct platform_device bfin_dpmc = {
 726        .name = "bfin dpmc",
 727        .dev = {
 728                .platform_data = &bfin_dmpc_vreg_data,
 729        },
 730};
 731
 732static struct platform_device *stamp_devices[] __initdata = {
 733
 734        &bfin_dpmc,
 735
 736#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
 737        &bf5xx_nand_device,
 738#endif
 739
 740#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 741        &rtc_device,
 742#endif
 743
 744#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
 745        &musb_device,
 746#endif
 747
 748#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 749        &bfin_mii_bus,
 750        &bfin_mac_device,
 751#endif
 752
 753#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
 754        &bfin_spi0_device,
 755#endif
 756
 757#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 758#ifdef CONFIG_SERIAL_BFIN_UART0
 759        &bfin_uart0_device,
 760#endif
 761#ifdef CONFIG_SERIAL_BFIN_UART1
 762        &bfin_uart1_device,
 763#endif
 764#endif
 765
 766#if defined(CONFIG_FB_BFIN_RA158Z) || defined(CONFIG_FB_BFIN_RA158Z_MODULE)
 767        &bf52x_ra158z_device,
 768#endif
 769
 770#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
 771#ifdef CONFIG_BFIN_SIR0
 772        &bfin_sir0_device,
 773#endif
 774#ifdef CONFIG_BFIN_SIR1
 775        &bfin_sir1_device,
 776#endif
 777#endif
 778
 779#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 780        &i2c_bfin_twi_device,
 781#endif
 782
 783#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
 784#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 785        &bfin_sport0_uart_device,
 786#endif
 787#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 788        &bfin_sport1_uart_device,
 789#endif
 790#endif
 791
 792#if defined(CONFIG_INPUT_BFIN_ROTARY) || defined(CONFIG_INPUT_BFIN_ROTARY_MODULE)
 793        &bfin_rotary_device,
 794#endif
 795
 796#if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 797        &ad7160eval_flash_device,
 798#endif
 799
 800#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE)
 801        &bfin_i2s,
 802#endif
 803
 804#if defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE)
 805        &bfin_tdm,
 806#endif
 807};
 808
 809static int __init ad7160eval_init(void)
 810{
 811        printk(KERN_INFO "%s(): registering device resources\n", __func__);
 812        i2c_register_board_info(0, bfin_i2c_board_info,
 813                                ARRAY_SIZE(bfin_i2c_board_info));
 814        platform_add_devices(stamp_devices, ARRAY_SIZE(stamp_devices));
 815        spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 816        return 0;
 817}
 818
 819arch_initcall(ad7160eval_init);
 820
 821static struct platform_device *ad7160eval_early_devices[] __initdata = {
 822#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
 823#ifdef CONFIG_SERIAL_BFIN_UART0
 824        &bfin_uart0_device,
 825#endif
 826#ifdef CONFIG_SERIAL_BFIN_UART1
 827        &bfin_uart1_device,
 828#endif
 829#endif
 830
 831#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
 832#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
 833        &bfin_sport0_uart_device,
 834#endif
 835#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
 836        &bfin_sport1_uart_device,
 837#endif
 838#endif
 839};
 840
 841void __init native_machine_early_platform_add_devices(void)
 842{
 843        printk(KERN_INFO "register early platform devices\n");
 844        early_platform_add_devices(ad7160eval_early_devices,
 845                ARRAY_SIZE(ad7160eval_early_devices));
 846}
 847
 848void native_machine_restart(char *cmd)
 849{
 850        /* workaround reboot hang when booting from SPI */
 851        if ((bfin_read_SYSCR() & 0x7) == 0x3)
 852                bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
 853}
 854
 855int bfin_get_ether_addr(char *addr)
 856{
 857        /* the MAC is stored in OTP memory page 0xDF */
 858        u32 ret;
 859        u64 otp_mac;
 860        u32 (*otp_read)(u32 page, u32 flags, u64 *page_content) = (void *)0xEF00001A;
 861
 862        ret = otp_read(0xDF, 0x00, &otp_mac);
 863        if (!(ret & 0x1)) {
 864                char *otp_mac_p = (char *)&otp_mac;
 865                for (ret = 0; ret < 6; ++ret)
 866                        addr[ret] = otp_mac_p[5 - ret];
 867        }
 868        return 0;
 869}
 870EXPORT_SYMBOL(bfin_get_ether_addr);
 871