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10#include <linux/device.h>
11#include <linux/export.h>
12#include <linux/platform_device.h>
13#include <linux/mtd/mtd.h>
14#include <linux/mtd/partitions.h>
15#include <linux/mtd/physmap.h>
16#include <linux/spi/spi.h>
17#include <linux/spi/flash.h>
18#include <linux/etherdevice.h>
19#include <linux/i2c.h>
20#include <linux/irq.h>
21#include <linux/interrupt.h>
22#include <linux/usb/musb.h>
23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
26#include <asm/nand.h>
27#include <asm/portmux.h>
28#include <asm/dpmc.h>
29#include <linux/spi/ad7877.h>
30
31
32
33
34const char bfin_board_name[] = "Bluetechnix CM-BF527";
35
36
37
38
39
40#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
41#include <linux/usb/isp1760.h>
42static struct resource bfin_isp1760_resources[] = {
43 [0] = {
44 .start = 0x203C0000,
45 .end = 0x203C0000 + 0x000fffff,
46 .flags = IORESOURCE_MEM,
47 },
48 [1] = {
49 .start = IRQ_PF7,
50 .end = IRQ_PF7,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct isp1760_platform_data isp1760_priv = {
56 .is_isp1761 = 0,
57 .bus_width_16 = 1,
58 .port1_otg = 0,
59 .analog_oc = 0,
60 .dack_polarity_high = 0,
61 .dreq_polarity_high = 0,
62};
63
64static struct platform_device bfin_isp1760_device = {
65 .name = "isp1760",
66 .id = 0,
67 .dev = {
68 .platform_data = &isp1760_priv,
69 },
70 .num_resources = ARRAY_SIZE(bfin_isp1760_resources),
71 .resource = bfin_isp1760_resources,
72};
73#endif
74
75#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
76static struct resource musb_resources[] = {
77 [0] = {
78 .start = 0xffc03800,
79 .end = 0xffc03cff,
80 .flags = IORESOURCE_MEM,
81 },
82 [1] = {
83 .start = IRQ_USB_INT0,
84 .end = IRQ_USB_INT0,
85 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
86 .name = "mc"
87 },
88 [2] = {
89 .start = IRQ_USB_DMA,
90 .end = IRQ_USB_DMA,
91 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
92 .name = "dma"
93 },
94};
95
96static struct musb_hdrc_config musb_config = {
97 .multipoint = 0,
98 .dyn_fifo = 0,
99 .soft_con = 1,
100 .dma = 1,
101 .num_eps = 8,
102 .dma_channels = 8,
103 .gpio_vrsel = GPIO_PF11,
104
105
106
107 .gpio_vrsel_active = 1,
108 .clkin = 24,
109};
110
111static struct musb_hdrc_platform_data musb_plat = {
112#if defined(CONFIG_USB_MUSB_OTG)
113 .mode = MUSB_OTG,
114#elif defined(CONFIG_USB_MUSB_HDRC_HCD)
115 .mode = MUSB_HOST,
116#elif defined(CONFIG_USB_GADGET_MUSB_HDRC)
117 .mode = MUSB_PERIPHERAL,
118#endif
119 .config = &musb_config,
120};
121
122static u64 musb_dmamask = ~(u32)0;
123
124static struct platform_device musb_device = {
125 .name = "musb-blackfin",
126 .id = 0,
127 .dev = {
128 .dma_mask = &musb_dmamask,
129 .coherent_dma_mask = 0xffffffff,
130 .platform_data = &musb_plat,
131 },
132 .num_resources = ARRAY_SIZE(musb_resources),
133 .resource = musb_resources,
134};
135#endif
136
137#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
138static struct mtd_partition partition_info[] = {
139 {
140 .name = "linux kernel(nand)",
141 .offset = 0,
142 .size = 4 * 1024 * 1024,
143 },
144 {
145 .name = "file system(nand)",
146 .offset = MTDPART_OFS_APPEND,
147 .size = MTDPART_SIZ_FULL,
148 },
149};
150
151static struct bf5xx_nand_platform bf5xx_nand_platform = {
152 .data_width = NFC_NWIDTH_8,
153 .partitions = partition_info,
154 .nr_partitions = ARRAY_SIZE(partition_info),
155 .rd_dly = 3,
156 .wr_dly = 3,
157};
158
159static struct resource bf5xx_nand_resources[] = {
160 {
161 .start = NFC_CTL,
162 .end = NFC_DATA_RD + 2,
163 .flags = IORESOURCE_MEM,
164 },
165 {
166 .start = CH_NFC,
167 .end = CH_NFC,
168 .flags = IORESOURCE_IRQ,
169 },
170};
171
172static struct platform_device bf5xx_nand_device = {
173 .name = "bf5xx-nand",
174 .id = 0,
175 .num_resources = ARRAY_SIZE(bf5xx_nand_resources),
176 .resource = bf5xx_nand_resources,
177 .dev = {
178 .platform_data = &bf5xx_nand_platform,
179 },
180};
181#endif
182
183#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
184static struct resource bfin_pcmcia_cf_resources[] = {
185 {
186 .start = 0x20310000,
187 .end = 0x20312000,
188 .flags = IORESOURCE_MEM,
189 }, {
190 .start = 0x20311000,
191 .end = 0x20311FFF,
192 .flags = IORESOURCE_MEM,
193 }, {
194 .start = IRQ_PF4,
195 .end = IRQ_PF4,
196 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
197 }, {
198 .start = 6,
199 .end = 6,
200 .flags = IORESOURCE_IRQ,
201 },
202};
203
204static struct platform_device bfin_pcmcia_cf_device = {
205 .name = "bfin_cf_pcmcia",
206 .id = -1,
207 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
208 .resource = bfin_pcmcia_cf_resources,
209};
210#endif
211
212#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
213static struct platform_device rtc_device = {
214 .name = "rtc-bfin",
215 .id = -1,
216};
217#endif
218
219#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
220#include <linux/smc91x.h>
221
222static struct smc91x_platdata smc91x_info = {
223 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
224 .leda = RPC_LED_100_10,
225 .ledb = RPC_LED_TX_RX,
226};
227
228static struct resource smc91x_resources[] = {
229 {
230 .name = "smc91x-regs",
231 .start = 0x20300300,
232 .end = 0x20300300 + 16,
233 .flags = IORESOURCE_MEM,
234 }, {
235
236 .start = IRQ_PF7,
237 .end = IRQ_PF7,
238 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
239 },
240};
241static struct platform_device smc91x_device = {
242 .name = "smc91x",
243 .id = 0,
244 .num_resources = ARRAY_SIZE(smc91x_resources),
245 .resource = smc91x_resources,
246 .dev = {
247 .platform_data = &smc91x_info,
248 },
249};
250#endif
251
252#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
253static struct resource dm9000_resources[] = {
254 [0] = {
255 .start = 0x203FB800,
256 .end = 0x203FB800 + 1,
257 .flags = IORESOURCE_MEM,
258 },
259 [1] = {
260 .start = 0x203FB804,
261 .end = 0x203FB804 + 1,
262 .flags = IORESOURCE_MEM,
263 },
264 [2] = {
265 .start = IRQ_PF9,
266 .end = IRQ_PF9,
267 .flags = (IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE),
268 },
269};
270
271static struct platform_device dm9000_device = {
272 .name = "dm9000",
273 .id = -1,
274 .num_resources = ARRAY_SIZE(dm9000_resources),
275 .resource = dm9000_resources,
276};
277#endif
278
279#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
280#include <linux/bfin_mac.h>
281static const unsigned short bfin_mac_peripherals[] = P_RMII0;
282
283static struct bfin_phydev_platform_data bfin_phydev_data[] = {
284 {
285 .addr = 1,
286 .irq = IRQ_MAC_PHYINT,
287 },
288};
289
290static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
291 .phydev_number = 1,
292 .phydev_data = bfin_phydev_data,
293 .phy_mode = PHY_INTERFACE_MODE_RMII,
294 .mac_peripherals = bfin_mac_peripherals,
295};
296
297static struct platform_device bfin_mii_bus = {
298 .name = "bfin_mii_bus",
299 .dev = {
300 .platform_data = &bfin_mii_bus_data,
301 }
302};
303
304static struct platform_device bfin_mac_device = {
305 .name = "bfin_mac",
306 .dev = {
307 .platform_data = &bfin_mii_bus,
308 }
309};
310#endif
311
312#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
313static struct resource net2272_bfin_resources[] = {
314 {
315 .start = 0x20300000,
316 .end = 0x20300000 + 0x100,
317 .flags = IORESOURCE_MEM,
318 }, {
319 .start = IRQ_PF7,
320 .end = IRQ_PF7,
321 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
322 },
323};
324
325static struct platform_device net2272_bfin_device = {
326 .name = "net2272",
327 .id = -1,
328 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
329 .resource = net2272_bfin_resources,
330};
331#endif
332
333#if defined(CONFIG_MTD_M25P80) \
334 || defined(CONFIG_MTD_M25P80_MODULE)
335static struct mtd_partition bfin_spi_flash_partitions[] = {
336 {
337 .name = "bootloader(spi)",
338 .size = 0x00040000,
339 .offset = 0,
340 .mask_flags = MTD_CAP_ROM
341 }, {
342 .name = "linux kernel(spi)",
343 .size = MTDPART_SIZ_FULL,
344 .offset = MTDPART_OFS_APPEND,
345 }
346};
347
348static struct flash_platform_data bfin_spi_flash_data = {
349 .name = "m25p80",
350 .parts = bfin_spi_flash_partitions,
351 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
352 .type = "m25p16",
353};
354
355
356static struct bfin5xx_spi_chip spi_flash_chip_info = {
357 .enable_dma = 0,
358};
359#endif
360
361#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
362static struct bfin5xx_spi_chip mmc_spi_chip_info = {
363 .enable_dma = 0,
364};
365#endif
366
367#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
368static const struct ad7877_platform_data bfin_ad7877_ts_info = {
369 .model = 7877,
370 .vref_delay_usecs = 50,
371 .x_plate_ohms = 419,
372 .y_plate_ohms = 486,
373 .pressure_max = 1000,
374 .pressure_min = 0,
375 .stopacq_polarity = 1,
376 .first_conversion_delay = 3,
377 .acquisition_time = 1,
378 .averaging = 1,
379 .pen_down_acc_interval = 1,
380};
381#endif
382
383static struct spi_board_info bfin_spi_board_info[] __initdata = {
384#if defined(CONFIG_MTD_M25P80) \
385 || defined(CONFIG_MTD_M25P80_MODULE)
386 {
387
388 .modalias = "m25p80",
389 .max_speed_hz = 25000000,
390 .bus_num = 0,
391 .chip_select = 1,
392 .platform_data = &bfin_spi_flash_data,
393 .controller_data = &spi_flash_chip_info,
394 .mode = SPI_MODE_3,
395 },
396#endif
397
398#if defined(CONFIG_SND_BF5XX_SOC_AD183X) \
399 || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
400 {
401 .modalias = "ad183x",
402 .max_speed_hz = 3125000,
403 .bus_num = 0,
404 .chip_select = 4,
405 },
406#endif
407#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
408 {
409 .modalias = "mmc_spi",
410 .max_speed_hz = 20000000,
411 .bus_num = 0,
412 .chip_select = 5,
413 .controller_data = &mmc_spi_chip_info,
414 .mode = SPI_MODE_3,
415 },
416#endif
417#if defined(CONFIG_TOUCHSCREEN_AD7877) || defined(CONFIG_TOUCHSCREEN_AD7877_MODULE)
418 {
419 .modalias = "ad7877",
420 .platform_data = &bfin_ad7877_ts_info,
421 .irq = IRQ_PF8,
422 .max_speed_hz = 12500000,
423 .bus_num = 0,
424 .chip_select = 2,
425 },
426#endif
427#if defined(CONFIG_SND_SOC_WM8731) || defined(CONFIG_SND_SOC_WM8731_MODULE) \
428 && defined(CONFIG_SND_SOC_WM8731_SPI)
429 {
430 .modalias = "wm8731",
431 .max_speed_hz = 3125000,
432 .bus_num = 0,
433 .chip_select = 5,
434 .mode = SPI_MODE_0,
435 },
436#endif
437#if defined(CONFIG_SPI_SPIDEV) || defined(CONFIG_SPI_SPIDEV_MODULE)
438 {
439 .modalias = "spidev",
440 .max_speed_hz = 3125000,
441 .bus_num = 0,
442 .chip_select = 1,
443 },
444#endif
445};
446
447#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
448
449static struct bfin5xx_spi_master bfin_spi0_info = {
450 .num_chipselect = 8,
451 .enable_dma = 1,
452 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
453};
454
455
456static struct resource bfin_spi0_resource[] = {
457 [0] = {
458 .start = SPI0_REGBASE,
459 .end = SPI0_REGBASE + 0xFF,
460 .flags = IORESOURCE_MEM,
461 },
462 [1] = {
463 .start = CH_SPI,
464 .end = CH_SPI,
465 .flags = IORESOURCE_DMA,
466 },
467 [2] = {
468 .start = IRQ_SPI,
469 .end = IRQ_SPI,
470 .flags = IORESOURCE_IRQ,
471 },
472};
473
474static struct platform_device bfin_spi0_device = {
475 .name = "bfin-spi",
476 .id = 0,
477 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
478 .resource = bfin_spi0_resource,
479 .dev = {
480 .platform_data = &bfin_spi0_info,
481 },
482};
483#endif
484
485#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
486static struct mtd_partition cm_partitions[] = {
487 {
488 .name = "bootloader(nor)",
489 .size = 0x40000,
490 .offset = 0,
491 }, {
492 .name = "linux kernel(nor)",
493 .size = 0x100000,
494 .offset = MTDPART_OFS_APPEND,
495 }, {
496 .name = "file system(nor)",
497 .size = MTDPART_SIZ_FULL,
498 .offset = MTDPART_OFS_APPEND,
499 }
500};
501
502static struct physmap_flash_data cm_flash_data = {
503 .width = 2,
504 .parts = cm_partitions,
505 .nr_parts = ARRAY_SIZE(cm_partitions),
506};
507
508static unsigned cm_flash_gpios[] = { GPIO_PH9, GPIO_PG11 };
509
510static struct resource cm_flash_resource[] = {
511 {
512 .name = "cfi_probe",
513 .start = 0x20000000,
514 .end = 0x201fffff,
515 .flags = IORESOURCE_MEM,
516 }, {
517 .start = (unsigned long)cm_flash_gpios,
518 .end = ARRAY_SIZE(cm_flash_gpios),
519 .flags = IORESOURCE_IRQ,
520 }
521};
522
523static struct platform_device cm_flash_device = {
524 .name = "gpio-addr-flash",
525 .id = 0,
526 .dev = {
527 .platform_data = &cm_flash_data,
528 },
529 .num_resources = ARRAY_SIZE(cm_flash_resource),
530 .resource = cm_flash_resource,
531};
532#endif
533
534#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
535#ifdef CONFIG_SERIAL_BFIN_UART0
536static struct resource bfin_uart0_resources[] = {
537 {
538 .start = UART0_THR,
539 .end = UART0_GCTL+2,
540 .flags = IORESOURCE_MEM,
541 },
542 {
543 .start = IRQ_UART0_TX,
544 .end = IRQ_UART0_TX,
545 .flags = IORESOURCE_IRQ,
546 },
547 {
548 .start = IRQ_UART0_RX,
549 .end = IRQ_UART0_RX,
550 .flags = IORESOURCE_IRQ,
551 },
552 {
553 .start = IRQ_UART0_ERROR,
554 .end = IRQ_UART0_ERROR,
555 .flags = IORESOURCE_IRQ,
556 },
557 {
558 .start = CH_UART0_TX,
559 .end = CH_UART0_TX,
560 .flags = IORESOURCE_DMA,
561 },
562 {
563 .start = CH_UART0_RX,
564 .end = CH_UART0_RX,
565 .flags = IORESOURCE_DMA,
566 },
567};
568
569static unsigned short bfin_uart0_peripherals[] = {
570 P_UART0_TX, P_UART0_RX, 0
571};
572
573static struct platform_device bfin_uart0_device = {
574 .name = "bfin-uart",
575 .id = 0,
576 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
577 .resource = bfin_uart0_resources,
578 .dev = {
579 .platform_data = &bfin_uart0_peripherals,
580 },
581};
582#endif
583#ifdef CONFIG_SERIAL_BFIN_UART1
584static struct resource bfin_uart1_resources[] = {
585 {
586 .start = UART1_THR,
587 .end = UART1_GCTL+2,
588 .flags = IORESOURCE_MEM,
589 },
590 {
591 .start = IRQ_UART1_TX,
592 .end = IRQ_UART1_TX,
593 .flags = IORESOURCE_IRQ,
594 },
595 {
596 .start = IRQ_UART1_RX,
597 .end = IRQ_UART1_RX,
598 .flags = IORESOURCE_IRQ,
599 },
600 {
601 .start = IRQ_UART1_ERROR,
602 .end = IRQ_UART1_ERROR,
603 .flags = IORESOURCE_IRQ,
604 },
605 {
606 .start = CH_UART1_TX,
607 .end = CH_UART1_TX,
608 .flags = IORESOURCE_DMA,
609 },
610 {
611 .start = CH_UART1_RX,
612 .end = CH_UART1_RX,
613 .flags = IORESOURCE_DMA,
614 },
615#ifdef CONFIG_BFIN_UART1_CTSRTS
616 {
617 .start = GPIO_PF9,
618 .end = GPIO_PF9,
619 .flags = IORESOURCE_IO,
620 },
621 {
622 .start = GPIO_PF10,
623 .end = GPIO_PF10,
624 .flags = IORESOURCE_IO,
625 },
626#endif
627};
628
629static unsigned short bfin_uart1_peripherals[] = {
630 P_UART1_TX, P_UART1_RX, 0
631};
632
633static struct platform_device bfin_uart1_device = {
634 .name = "bfin-uart",
635 .id = 1,
636 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
637 .resource = bfin_uart1_resources,
638 .dev = {
639 .platform_data = &bfin_uart1_peripherals,
640 },
641};
642#endif
643#endif
644
645#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
646#ifdef CONFIG_BFIN_SIR0
647static struct resource bfin_sir0_resources[] = {
648 {
649 .start = 0xFFC00400,
650 .end = 0xFFC004FF,
651 .flags = IORESOURCE_MEM,
652 },
653 {
654 .start = IRQ_UART0_RX,
655 .end = IRQ_UART0_RX+1,
656 .flags = IORESOURCE_IRQ,
657 },
658 {
659 .start = CH_UART0_RX,
660 .end = CH_UART0_RX+1,
661 .flags = IORESOURCE_DMA,
662 },
663};
664
665static struct platform_device bfin_sir0_device = {
666 .name = "bfin_sir",
667 .id = 0,
668 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
669 .resource = bfin_sir0_resources,
670};
671#endif
672#ifdef CONFIG_BFIN_SIR1
673static struct resource bfin_sir1_resources[] = {
674 {
675 .start = 0xFFC02000,
676 .end = 0xFFC020FF,
677 .flags = IORESOURCE_MEM,
678 },
679 {
680 .start = IRQ_UART1_RX,
681 .end = IRQ_UART1_RX+1,
682 .flags = IORESOURCE_IRQ,
683 },
684 {
685 .start = CH_UART1_RX,
686 .end = CH_UART1_RX+1,
687 .flags = IORESOURCE_DMA,
688 },
689};
690
691static struct platform_device bfin_sir1_device = {
692 .name = "bfin_sir",
693 .id = 1,
694 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
695 .resource = bfin_sir1_resources,
696};
697#endif
698#endif
699
700#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
701static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
702
703static struct resource bfin_twi0_resource[] = {
704 [0] = {
705 .start = TWI0_REGBASE,
706 .end = TWI0_REGBASE,
707 .flags = IORESOURCE_MEM,
708 },
709 [1] = {
710 .start = IRQ_TWI,
711 .end = IRQ_TWI,
712 .flags = IORESOURCE_IRQ,
713 },
714};
715
716static struct platform_device i2c_bfin_twi_device = {
717 .name = "i2c-bfin-twi",
718 .id = 0,
719 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
720 .resource = bfin_twi0_resource,
721 .dev = {
722 .platform_data = &bfin_twi0_pins,
723 },
724};
725#endif
726
727static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
728#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
729 {
730 I2C_BOARD_INFO("pcf8574_lcd", 0x22),
731 },
732#endif
733#if defined(CONFIG_INPUT_PCF8574) || defined(CONFIG_INPUT_PCF8574_MODULE)
734 {
735 I2C_BOARD_INFO("pcf8574_keypad", 0x27),
736 .irq = IRQ_PF8,
737 },
738#endif
739#if defined(CONFIG_FB_BFIN_7393) || defined(CONFIG_FB_BFIN_7393_MODULE)
740 {
741 I2C_BOARD_INFO("bfin-adv7393", 0x2B),
742 },
743#endif
744};
745
746#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
747#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
748static struct resource bfin_sport0_uart_resources[] = {
749 {
750 .start = SPORT0_TCR1,
751 .end = SPORT0_MRCS3+4,
752 .flags = IORESOURCE_MEM,
753 },
754 {
755 .start = IRQ_SPORT0_RX,
756 .end = IRQ_SPORT0_RX+1,
757 .flags = IORESOURCE_IRQ,
758 },
759 {
760 .start = IRQ_SPORT0_ERROR,
761 .end = IRQ_SPORT0_ERROR,
762 .flags = IORESOURCE_IRQ,
763 },
764};
765
766static unsigned short bfin_sport0_peripherals[] = {
767 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
768 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
769};
770
771static struct platform_device bfin_sport0_uart_device = {
772 .name = "bfin-sport-uart",
773 .id = 0,
774 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
775 .resource = bfin_sport0_uart_resources,
776 .dev = {
777 .platform_data = &bfin_sport0_peripherals,
778 },
779};
780#endif
781#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
782static struct resource bfin_sport1_uart_resources[] = {
783 {
784 .start = SPORT1_TCR1,
785 .end = SPORT1_MRCS3+4,
786 .flags = IORESOURCE_MEM,
787 },
788 {
789 .start = IRQ_SPORT1_RX,
790 .end = IRQ_SPORT1_RX+1,
791 .flags = IORESOURCE_IRQ,
792 },
793 {
794 .start = IRQ_SPORT1_ERROR,
795 .end = IRQ_SPORT1_ERROR,
796 .flags = IORESOURCE_IRQ,
797 },
798};
799
800static unsigned short bfin_sport1_peripherals[] = {
801 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
802 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
803};
804
805static struct platform_device bfin_sport1_uart_device = {
806 .name = "bfin-sport-uart",
807 .id = 1,
808 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
809 .resource = bfin_sport1_uart_resources,
810 .dev = {
811 .platform_data = &bfin_sport1_peripherals,
812 },
813};
814#endif
815#endif
816
817#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
818#include <linux/input.h>
819#include <linux/gpio_keys.h>
820
821static struct gpio_keys_button bfin_gpio_keys_table[] = {
822 {BTN_0, GPIO_PF14, 1, "gpio-keys: BTN0"},
823};
824
825static struct gpio_keys_platform_data bfin_gpio_keys_data = {
826 .buttons = bfin_gpio_keys_table,
827 .nbuttons = ARRAY_SIZE(bfin_gpio_keys_table),
828};
829
830static struct platform_device bfin_device_gpiokeys = {
831 .name = "gpio-keys",
832 .dev = {
833 .platform_data = &bfin_gpio_keys_data,
834 },
835};
836#endif
837
838static const unsigned int cclk_vlev_datasheet[] =
839{
840 VRPAIR(VLEV_100, 400000000),
841 VRPAIR(VLEV_105, 426000000),
842 VRPAIR(VLEV_110, 500000000),
843 VRPAIR(VLEV_115, 533000000),
844 VRPAIR(VLEV_120, 600000000),
845};
846
847static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
848 .tuple_tab = cclk_vlev_datasheet,
849 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
850 .vr_settling_time = 25 ,
851};
852
853static struct platform_device bfin_dpmc = {
854 .name = "bfin dpmc",
855 .dev = {
856 .platform_data = &bfin_dmpc_vreg_data,
857 },
858};
859
860static struct platform_device *cmbf527_devices[] __initdata = {
861
862 &bfin_dpmc,
863
864#if defined(CONFIG_MTD_NAND_BF5XX) || defined(CONFIG_MTD_NAND_BF5XX_MODULE)
865 &bf5xx_nand_device,
866#endif
867
868#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
869 &bfin_pcmcia_cf_device,
870#endif
871
872#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
873 &rtc_device,
874#endif
875
876#if defined(CONFIG_USB_ISP1760_HCD) || defined(CONFIG_USB_ISP1760_HCD_MODULE)
877 &bfin_isp1760_device,
878#endif
879
880#if defined(CONFIG_USB_MUSB_HDRC) || defined(CONFIG_USB_MUSB_HDRC_MODULE)
881 &musb_device,
882#endif
883
884#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
885 &smc91x_device,
886#endif
887
888#if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
889 &dm9000_device,
890#endif
891
892#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
893 &bfin_mii_bus,
894 &bfin_mac_device,
895#endif
896
897#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
898 &net2272_bfin_device,
899#endif
900
901#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
902 &bfin_spi0_device,
903#endif
904
905#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
906#ifdef CONFIG_SERIAL_BFIN_UART0
907 &bfin_uart0_device,
908#endif
909#ifdef CONFIG_SERIAL_BFIN_UART1
910 &bfin_uart1_device,
911#endif
912#endif
913
914#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
915#ifdef CONFIG_BFIN_SIR0
916 &bfin_sir0_device,
917#endif
918#ifdef CONFIG_BFIN_SIR1
919 &bfin_sir1_device,
920#endif
921#endif
922
923#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
924 &i2c_bfin_twi_device,
925#endif
926
927#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
928#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
929 &bfin_sport0_uart_device,
930#endif
931#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
932 &bfin_sport1_uart_device,
933#endif
934#endif
935
936#if defined(CONFIG_KEYBOARD_GPIO) || defined(CONFIG_KEYBOARD_GPIO_MODULE)
937 &bfin_device_gpiokeys,
938#endif
939
940#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
941 &cm_flash_device,
942#endif
943};
944
945static int __init cm_init(void)
946{
947 printk(KERN_INFO "%s(): registering device resources\n", __func__);
948 i2c_register_board_info(0, bfin_i2c_board_info,
949 ARRAY_SIZE(bfin_i2c_board_info));
950 platform_add_devices(cmbf527_devices, ARRAY_SIZE(cmbf527_devices));
951 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
952 return 0;
953}
954
955arch_initcall(cm_init);
956
957static struct platform_device *cmbf527_early_devices[] __initdata = {
958#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
959#ifdef CONFIG_SERIAL_BFIN_UART0
960 &bfin_uart0_device,
961#endif
962#ifdef CONFIG_SERIAL_BFIN_UART1
963 &bfin_uart1_device,
964#endif
965#endif
966
967#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
968#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
969 &bfin_sport0_uart_device,
970#endif
971#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
972 &bfin_sport1_uart_device,
973#endif
974#endif
975};
976
977void __init native_machine_early_platform_add_devices(void)
978{
979 printk(KERN_INFO "register early platform devices\n");
980 early_platform_add_devices(cmbf527_early_devices,
981 ARRAY_SIZE(cmbf527_early_devices));
982}
983
984void native_machine_restart(char *cmd)
985{
986
987 if ((bfin_read_SYSCR() & 0x7) == 0x3)
988 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
989}
990
991int bfin_get_ether_addr(char *addr)
992{
993 return 1;
994}
995EXPORT_SYMBOL(bfin_get_ether_addr);
996