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10#include <linux/device.h>
11#include <linux/platform_device.h>
12#include <linux/mtd/mtd.h>
13#include <linux/mtd/partitions.h>
14#include <linux/spi/spi.h>
15#include <linux/spi/flash.h>
16#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
17#include <linux/usb/isp1362.h>
18#endif
19#include <linux/ata_platform.h>
20#include <linux/irq.h>
21#include <linux/interrupt.h>
22#include <linux/usb/sl811.h>
23#include <asm/dma.h>
24#include <asm/bfin5xx_spi.h>
25#include <asm/reboot.h>
26#include <asm/portmux.h>
27#include <linux/spi/ad7877.h>
28
29
30
31
32const char bfin_board_name[] = "CamSig Minotaur BF537";
33
34#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
35static struct resource bfin_pcmcia_cf_resources[] = {
36 {
37 .start = 0x20310000,
38 .end = 0x20312000,
39 .flags = IORESOURCE_MEM,
40 }, {
41 .start = 0x20311000,
42 .end = 0x20311FFF,
43 .flags = IORESOURCE_MEM,
44 }, {
45 .start = IRQ_PF4,
46 .end = IRQ_PF4,
47 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
48 }, {
49 .start = IRQ_PF6,
50 .end = IRQ_PF6,
51 .flags = IORESOURCE_IRQ,
52 },
53};
54
55static struct platform_device bfin_pcmcia_cf_device = {
56 .name = "bfin_cf_pcmcia",
57 .id = -1,
58 .num_resources = ARRAY_SIZE(bfin_pcmcia_cf_resources),
59 .resource = bfin_pcmcia_cf_resources,
60};
61#endif
62
63#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
64static struct platform_device rtc_device = {
65 .name = "rtc-bfin",
66 .id = -1,
67};
68#endif
69
70#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
71#include <linux/bfin_mac.h>
72static const unsigned short bfin_mac_peripherals[] = P_MII0;
73
74static struct bfin_phydev_platform_data bfin_phydev_data[] = {
75 {
76 .addr = 1,
77 .irq = IRQ_MAC_PHYINT,
78 },
79};
80
81static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
82 .phydev_number = 1,
83 .phydev_data = bfin_phydev_data,
84 .phy_mode = PHY_INTERFACE_MODE_MII,
85 .mac_peripherals = bfin_mac_peripherals,
86};
87
88static struct platform_device bfin_mii_bus = {
89 .name = "bfin_mii_bus",
90 .dev = {
91 .platform_data = &bfin_mii_bus_data,
92 }
93};
94
95static struct platform_device bfin_mac_device = {
96 .name = "bfin_mac",
97 .dev = {
98 .platform_data = &bfin_mii_bus,
99 }
100};
101#endif
102
103#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
104static struct resource net2272_bfin_resources[] = {
105 {
106 .start = 0x20300000,
107 .end = 0x20300000 + 0x100,
108 .flags = IORESOURCE_MEM,
109 }, {
110 .start = IRQ_PF7,
111 .end = IRQ_PF7,
112 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
113 },
114};
115
116static struct platform_device net2272_bfin_device = {
117 .name = "net2272",
118 .id = -1,
119 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
120 .resource = net2272_bfin_resources,
121};
122#endif
123
124#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
125
126
127#if defined(CONFIG_MTD_M25P80) \
128 || defined(CONFIG_MTD_M25P80_MODULE)
129
130
131#define FLASH_SIZE 0x00400000
132#define PSIZE_UBOOT 0x00030000
133#define PSIZE_INITRAMFS 0x00240000
134
135static struct mtd_partition bfin_spi_flash_partitions[] = {
136 {
137 .name = "bootloader(spi)",
138 .size = PSIZE_UBOOT,
139 .offset = 0x000000,
140 .mask_flags = MTD_CAP_ROM
141 }, {
142 .name = "initramfs(spi)",
143 .size = PSIZE_INITRAMFS,
144 .offset = PSIZE_UBOOT
145 }, {
146 .name = "opt(spi)",
147 .size = FLASH_SIZE - (PSIZE_UBOOT + PSIZE_INITRAMFS),
148 .offset = PSIZE_UBOOT + PSIZE_INITRAMFS,
149 }
150};
151
152static struct flash_platform_data bfin_spi_flash_data = {
153 .name = "m25p80",
154 .parts = bfin_spi_flash_partitions,
155 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
156 .type = "m25p64",
157};
158
159
160static struct bfin5xx_spi_chip spi_flash_chip_info = {
161 .enable_dma = 0,
162};
163#endif
164
165#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
166static struct bfin5xx_spi_chip mmc_spi_chip_info = {
167 .enable_dma = 0,
168};
169#endif
170
171static struct spi_board_info bfin_spi_board_info[] __initdata = {
172#if defined(CONFIG_MTD_M25P80) \
173 || defined(CONFIG_MTD_M25P80_MODULE)
174 {
175
176 .modalias = "m25p80",
177 .max_speed_hz = 25000000,
178 .bus_num = 0,
179 .chip_select = 1,
180 .platform_data = &bfin_spi_flash_data,
181 .controller_data = &spi_flash_chip_info,
182 .mode = SPI_MODE_3,
183 },
184#endif
185
186#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
187 {
188 .modalias = "mmc_spi",
189 .max_speed_hz = 5000000,
190 .bus_num = 0,
191 .chip_select = 5,
192 .controller_data = &mmc_spi_chip_info,
193 .mode = SPI_MODE_3,
194 },
195#endif
196};
197
198
199static struct bfin5xx_spi_master bfin_spi0_info = {
200 .num_chipselect = 8,
201 .enable_dma = 1,
202};
203
204
205static struct resource bfin_spi0_resource[] = {
206 [0] = {
207 .start = SPI0_REGBASE,
208 .end = SPI0_REGBASE + 0xFF,
209 .flags = IORESOURCE_MEM,
210 },
211 [1] = {
212 .start = CH_SPI,
213 .end = CH_SPI,
214 .flags = IORESOURCE_DMA,
215 },
216 [2] = {
217 .start = IRQ_SPI,
218 .end = IRQ_SPI,
219 .flags = IORESOURCE_IRQ,
220 },
221};
222
223static struct platform_device bfin_spi0_device = {
224 .name = "bfin-spi",
225 .id = 0,
226 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
227 .resource = bfin_spi0_resource,
228 .dev = {
229 .platform_data = &bfin_spi0_info,
230 },
231};
232#endif
233
234#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
235#ifdef CONFIG_SERIAL_BFIN_UART0
236static struct resource bfin_uart0_resources[] = {
237 {
238 .start = UART0_THR,
239 .end = UART0_GCTL+2,
240 .flags = IORESOURCE_MEM,
241 },
242 {
243 .start = IRQ_UART0_TX,
244 .end = IRQ_UART0_TX,
245 .flags = IORESOURCE_IRQ,
246 },
247 {
248 .start = IRQ_UART0_RX,
249 .end = IRQ_UART0_RX,
250 .flags = IORESOURCE_IRQ,
251 },
252 {
253 .start = IRQ_UART0_ERROR,
254 .end = IRQ_UART0_ERROR,
255 .flags = IORESOURCE_IRQ,
256 },
257 {
258 .start = CH_UART0_TX,
259 .end = CH_UART0_TX,
260 .flags = IORESOURCE_DMA,
261 },
262 {
263 .start = CH_UART0_RX,
264 .end = CH_UART0_RX,
265 .flags = IORESOURCE_DMA,
266 },
267};
268
269static unsigned short bfin_uart0_peripherals[] = {
270 P_UART0_TX, P_UART0_RX, 0
271};
272
273static struct platform_device bfin_uart0_device = {
274 .name = "bfin-uart",
275 .id = 0,
276 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
277 .resource = bfin_uart0_resources,
278 .dev = {
279 .platform_data = &bfin_uart0_peripherals,
280 },
281};
282#endif
283#ifdef CONFIG_SERIAL_BFIN_UART1
284static struct resource bfin_uart1_resources[] = {
285 {
286 .start = UART1_THR,
287 .end = UART1_GCTL+2,
288 .flags = IORESOURCE_MEM,
289 },
290 {
291 .start = IRQ_UART1_TX,
292 .end = IRQ_UART1_TX,
293 .flags = IORESOURCE_IRQ,
294 },
295 {
296 .start = IRQ_UART1_RX,
297 .end = IRQ_UART1_RX,
298 .flags = IORESOURCE_IRQ,
299 },
300 {
301 .start = IRQ_UART1_ERROR,
302 .end = IRQ_UART1_ERROR,
303 .flags = IORESOURCE_IRQ,
304 },
305 {
306 .start = CH_UART1_TX,
307 .end = CH_UART1_TX,
308 .flags = IORESOURCE_DMA,
309 },
310 {
311 .start = CH_UART1_RX,
312 .end = CH_UART1_RX,
313 .flags = IORESOURCE_DMA,
314 },
315};
316
317static unsigned short bfin_uart1_peripherals[] = {
318 P_UART1_TX, P_UART1_RX, 0
319};
320
321static struct platform_device bfin_uart1_device = {
322 .name = "bfin-uart",
323 .id = 1,
324 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
325 .resource = bfin_uart1_resources,
326 .dev = {
327 .platform_data = &bfin_uart1_peripherals,
328 },
329};
330#endif
331#endif
332
333#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
334#ifdef CONFIG_BFIN_SIR0
335static struct resource bfin_sir0_resources[] = {
336 {
337 .start = 0xFFC00400,
338 .end = 0xFFC004FF,
339 .flags = IORESOURCE_MEM,
340 },
341 {
342 .start = IRQ_UART0_RX,
343 .end = IRQ_UART0_RX+1,
344 .flags = IORESOURCE_IRQ,
345 },
346 {
347 .start = CH_UART0_RX,
348 .end = CH_UART0_RX+1,
349 .flags = IORESOURCE_DMA,
350 },
351};
352
353static struct platform_device bfin_sir0_device = {
354 .name = "bfin_sir",
355 .id = 0,
356 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
357 .resource = bfin_sir0_resources,
358};
359#endif
360#ifdef CONFIG_BFIN_SIR1
361static struct resource bfin_sir1_resources[] = {
362 {
363 .start = 0xFFC02000,
364 .end = 0xFFC020FF,
365 .flags = IORESOURCE_MEM,
366 },
367 {
368 .start = IRQ_UART1_RX,
369 .end = IRQ_UART1_RX+1,
370 .flags = IORESOURCE_IRQ,
371 },
372 {
373 .start = CH_UART1_RX,
374 .end = CH_UART1_RX+1,
375 .flags = IORESOURCE_DMA,
376 },
377};
378
379static struct platform_device bfin_sir1_device = {
380 .name = "bfin_sir",
381 .id = 1,
382 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
383 .resource = bfin_sir1_resources,
384};
385#endif
386#endif
387
388#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
389static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
390
391static struct resource bfin_twi0_resource[] = {
392 [0] = {
393 .start = TWI0_REGBASE,
394 .end = TWI0_REGBASE + 0xFF,
395 .flags = IORESOURCE_MEM,
396 },
397 [1] = {
398 .start = IRQ_TWI,
399 .end = IRQ_TWI,
400 .flags = IORESOURCE_IRQ,
401 },
402};
403
404static struct platform_device i2c_bfin_twi_device = {
405 .name = "i2c-bfin-twi",
406 .id = 0,
407 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
408 .resource = bfin_twi0_resource,
409 .dev = {
410 .platform_data = &bfin_twi0_pins,
411 },
412};
413#endif
414
415#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
416#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
417static struct resource bfin_sport0_uart_resources[] = {
418 {
419 .start = SPORT0_TCR1,
420 .end = SPORT0_MRCS3+4,
421 .flags = IORESOURCE_MEM,
422 },
423 {
424 .start = IRQ_SPORT0_RX,
425 .end = IRQ_SPORT0_RX+1,
426 .flags = IORESOURCE_IRQ,
427 },
428 {
429 .start = IRQ_SPORT0_ERROR,
430 .end = IRQ_SPORT0_ERROR,
431 .flags = IORESOURCE_IRQ,
432 },
433};
434
435static unsigned short bfin_sport0_peripherals[] = {
436 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
437 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
438};
439
440static struct platform_device bfin_sport0_uart_device = {
441 .name = "bfin-sport-uart",
442 .id = 0,
443 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
444 .resource = bfin_sport0_uart_resources,
445 .dev = {
446 .platform_data = &bfin_sport0_peripherals,
447 },
448};
449#endif
450#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
451static struct resource bfin_sport1_uart_resources[] = {
452 {
453 .start = SPORT1_TCR1,
454 .end = SPORT1_MRCS3+4,
455 .flags = IORESOURCE_MEM,
456 },
457 {
458 .start = IRQ_SPORT1_RX,
459 .end = IRQ_SPORT1_RX+1,
460 .flags = IORESOURCE_IRQ,
461 },
462 {
463 .start = IRQ_SPORT1_ERROR,
464 .end = IRQ_SPORT1_ERROR,
465 .flags = IORESOURCE_IRQ,
466 },
467};
468
469static unsigned short bfin_sport1_peripherals[] = {
470 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
471 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
472};
473
474static struct platform_device bfin_sport1_uart_device = {
475 .name = "bfin-sport-uart",
476 .id = 1,
477 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
478 .resource = bfin_sport1_uart_resources,
479 .dev = {
480 .platform_data = &bfin_sport1_peripherals,
481 },
482};
483#endif
484#endif
485
486static struct platform_device *minotaur_devices[] __initdata = {
487#if defined(CONFIG_BFIN_CFPCMCIA) || defined(CONFIG_BFIN_CFPCMCIA_MODULE)
488 &bfin_pcmcia_cf_device,
489#endif
490
491#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
492 &rtc_device,
493#endif
494
495#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
496 &bfin_mii_bus,
497 &bfin_mac_device,
498#endif
499
500#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
501 &net2272_bfin_device,
502#endif
503
504#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
505 &bfin_spi0_device,
506#endif
507
508#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
509#ifdef CONFIG_SERIAL_BFIN_UART0
510 &bfin_uart0_device,
511#endif
512#ifdef CONFIG_SERIAL_BFIN_UART1
513 &bfin_uart1_device,
514#endif
515#endif
516
517#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
518#ifdef CONFIG_BFIN_SIR0
519 &bfin_sir0_device,
520#endif
521#ifdef CONFIG_BFIN_SIR1
522 &bfin_sir1_device,
523#endif
524#endif
525
526#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
527 &i2c_bfin_twi_device,
528#endif
529
530#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
531#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
532 &bfin_sport0_uart_device,
533#endif
534#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
535 &bfin_sport1_uart_device,
536#endif
537#endif
538
539};
540
541static int __init minotaur_init(void)
542{
543 printk(KERN_INFO "%s(): registering device resources\n", __func__);
544 platform_add_devices(minotaur_devices, ARRAY_SIZE(minotaur_devices));
545#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
546 spi_register_board_info(bfin_spi_board_info,
547 ARRAY_SIZE(bfin_spi_board_info));
548#endif
549
550 return 0;
551}
552
553arch_initcall(minotaur_init);
554
555static struct platform_device *minotaur_early_devices[] __initdata = {
556#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
557#ifdef CONFIG_SERIAL_BFIN_UART0
558 &bfin_uart0_device,
559#endif
560#ifdef CONFIG_SERIAL_BFIN_UART1
561 &bfin_uart1_device,
562#endif
563#endif
564
565#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
566#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
567 &bfin_sport0_uart_device,
568#endif
569#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
570 &bfin_sport1_uart_device,
571#endif
572#endif
573};
574
575void __init native_machine_early_platform_add_devices(void)
576{
577 printk(KERN_INFO "register early platform devices\n");
578 early_platform_add_devices(minotaur_early_devices,
579 ARRAY_SIZE(minotaur_early_devices));
580}
581
582void native_machine_restart(char *cmd)
583{
584
585 if ((bfin_read_SYSCR() & 0x7) == 0x3)
586 bfin_reset_boot_spi_cs(P_DEFAULT_BOOT_SPI_CS);
587}
588
