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10#include <linux/device.h>
11#include <linux/etherdevice.h>
12#include <linux/export.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/mtd.h>
15#include <linux/mtd/partitions.h>
16#include <linux/mtd/physmap.h>
17#include <linux/spi/spi.h>
18#include <linux/spi/flash.h>
19#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
20#include <linux/usb/isp1362.h>
21#endif
22#include <linux/ata_platform.h>
23#include <linux/irq.h>
24#include <asm/dma.h>
25#include <asm/bfin5xx_spi.h>
26#include <asm/portmux.h>
27#include <asm/dpmc.h>
28#include <linux/spi/mmc_spi.h>
29
30
31
32
33const char bfin_board_name[] = "Bluetechnix TCM BF537";
34
35#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
36
37
38#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
39static struct mtd_partition bfin_spi_flash_partitions[] = {
40 {
41 .name = "bootloader(spi)",
42 .size = 0x00020000,
43 .offset = 0,
44 .mask_flags = MTD_CAP_ROM
45 }, {
46 .name = "linux kernel(spi)",
47 .size = 0xe0000,
48 .offset = 0x20000
49 }, {
50 .name = "file system(spi)",
51 .size = 0x700000,
52 .offset = 0x00100000,
53 }
54};
55
56static struct flash_platform_data bfin_spi_flash_data = {
57 .name = "m25p80",
58 .parts = bfin_spi_flash_partitions,
59 .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
60 .type = "m25p64",
61};
62
63
64static struct bfin5xx_spi_chip spi_flash_chip_info = {
65 .enable_dma = 0,
66};
67#endif
68
69#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
70static struct bfin5xx_spi_chip mmc_spi_chip_info = {
71 .enable_dma = 0,
72};
73#endif
74
75static struct spi_board_info bfin_spi_board_info[] __initdata = {
76#if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
77 {
78
79 .modalias = "m25p80",
80 .max_speed_hz = 25000000,
81 .bus_num = 0,
82 .chip_select = 1,
83 .platform_data = &bfin_spi_flash_data,
84 .controller_data = &spi_flash_chip_info,
85 .mode = SPI_MODE_3,
86 },
87#endif
88
89#if defined(CONFIG_SND_BF5XX_SOC_AD183X) || defined(CONFIG_SND_BF5XX_SOC_AD183X_MODULE)
90 {
91 .modalias = "ad183x",
92 .max_speed_hz = 3125000,
93 .bus_num = 0,
94 .chip_select = 4,
95 },
96#endif
97
98#if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
99 {
100 .modalias = "mmc_spi",
101 .max_speed_hz = 25000000,
102 .bus_num = 0,
103 .chip_select = 1,
104 .controller_data = &mmc_spi_chip_info,
105 .mode = SPI_MODE_3,
106 },
107#endif
108};
109
110
111static struct resource bfin_spi0_resource[] = {
112 [0] = {
113 .start = SPI0_REGBASE,
114 .end = SPI0_REGBASE + 0xFF,
115 .flags = IORESOURCE_MEM,
116 },
117 [1] = {
118 .start = CH_SPI,
119 .end = CH_SPI,
120 .flags = IORESOURCE_DMA,
121 },
122 [2] = {
123 .start = IRQ_SPI,
124 .end = IRQ_SPI,
125 .flags = IORESOURCE_IRQ,
126 }
127};
128
129
130static struct bfin5xx_spi_master bfin_spi0_info = {
131 .num_chipselect = 8,
132 .enable_dma = 1,
133 .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
134};
135
136static struct platform_device bfin_spi0_device = {
137 .name = "bfin-spi",
138 .id = 0,
139 .num_resources = ARRAY_SIZE(bfin_spi0_resource),
140 .resource = bfin_spi0_resource,
141 .dev = {
142 .platform_data = &bfin_spi0_info,
143 },
144};
145#endif
146
147#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
148static struct platform_device rtc_device = {
149 .name = "rtc-bfin",
150 .id = -1,
151};
152#endif
153
154#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
155static struct platform_device hitachi_fb_device = {
156 .name = "hitachi-tx09",
157};
158#endif
159
160#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
161#include <linux/smc91x.h>
162
163static struct smc91x_platdata smc91x_info = {
164 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
165 .leda = RPC_LED_100_10,
166 .ledb = RPC_LED_TX_RX,
167};
168
169static struct resource smc91x_resources[] = {
170 {
171 .start = 0x20200300,
172 .end = 0x20200300 + 16,
173 .flags = IORESOURCE_MEM,
174 }, {
175 .start = IRQ_PF14,
176 .end = IRQ_PF14,
177 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
178 },
179};
180
181static struct platform_device smc91x_device = {
182 .name = "smc91x",
183 .id = 0,
184 .num_resources = ARRAY_SIZE(smc91x_resources),
185 .resource = smc91x_resources,
186 .dev = {
187 .platform_data = &smc91x_info,
188 },
189};
190#endif
191
192#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
193static struct resource isp1362_hcd_resources[] = {
194 {
195 .start = 0x20308000,
196 .end = 0x20308000,
197 .flags = IORESOURCE_MEM,
198 }, {
199 .start = 0x20308004,
200 .end = 0x20308004,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_PG15,
204 .end = IRQ_PG15,
205 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE,
206 },
207};
208
209static struct isp1362_platform_data isp1362_priv = {
210 .sel15Kres = 1,
211 .clknotstop = 0,
212 .oc_enable = 0,
213 .int_act_high = 0,
214 .int_edge_triggered = 0,
215 .remote_wakeup_connected = 0,
216 .no_power_switching = 1,
217 .power_switching_mode = 0,
218};
219
220static struct platform_device isp1362_hcd_device = {
221 .name = "isp1362-hcd",
222 .id = 0,
223 .dev = {
224 .platform_data = &isp1362_priv,
225 },
226 .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
227 .resource = isp1362_hcd_resources,
228};
229#endif
230
231#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
232static struct resource net2272_bfin_resources[] = {
233 {
234 .start = 0x20300000,
235 .end = 0x20300000 + 0x100,
236 .flags = IORESOURCE_MEM,
237 }, {
238 .start = IRQ_PG13,
239 .end = IRQ_PG13,
240 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
241 },
242};
243
244static struct platform_device net2272_bfin_device = {
245 .name = "net2272",
246 .id = -1,
247 .num_resources = ARRAY_SIZE(net2272_bfin_resources),
248 .resource = net2272_bfin_resources,
249};
250#endif
251
252#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
253static struct mtd_partition cm_partitions[] = {
254 {
255 .name = "bootloader(nor)",
256 .size = 0x40000,
257 .offset = 0,
258 }, {
259 .name = "linux kernel(nor)",
260 .size = 0x100000,
261 .offset = MTDPART_OFS_APPEND,
262 }, {
263 .name = "file system(nor)",
264 .size = MTDPART_SIZ_FULL,
265 .offset = MTDPART_OFS_APPEND,
266 }
267};
268
269static struct physmap_flash_data cm_flash_data = {
270 .width = 2,
271 .parts = cm_partitions,
272 .nr_parts = ARRAY_SIZE(cm_partitions),
273};
274
275static unsigned cm_flash_gpios[] = { GPIO_PF4, GPIO_PF5 };
276
277static struct resource cm_flash_resource[] = {
278 {
279 .name = "cfi_probe",
280 .start = 0x20000000,
281 .end = 0x201fffff,
282 .flags = IORESOURCE_MEM,
283 }, {
284 .start = (unsigned long)cm_flash_gpios,
285 .end = ARRAY_SIZE(cm_flash_gpios),
286 .flags = IORESOURCE_IRQ,
287 }
288};
289
290static struct platform_device cm_flash_device = {
291 .name = "gpio-addr-flash",
292 .id = 0,
293 .dev = {
294 .platform_data = &cm_flash_data,
295 },
296 .num_resources = ARRAY_SIZE(cm_flash_resource),
297 .resource = cm_flash_resource,
298};
299#endif
300
301#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
302#ifdef CONFIG_SERIAL_BFIN_UART0
303static struct resource bfin_uart0_resources[] = {
304 {
305 .start = UART0_THR,
306 .end = UART0_GCTL+2,
307 .flags = IORESOURCE_MEM,
308 },
309 {
310 .start = IRQ_UART0_TX,
311 .end = IRQ_UART0_TX,
312 .flags = IORESOURCE_IRQ,
313 },
314 {
315 .start = IRQ_UART0_RX,
316 .end = IRQ_UART0_RX,
317 .flags = IORESOURCE_IRQ,
318 },
319 {
320 .start = IRQ_UART0_ERROR,
321 .end = IRQ_UART0_ERROR,
322 .flags = IORESOURCE_IRQ,
323 },
324 {
325 .start = CH_UART0_TX,
326 .end = CH_UART0_TX,
327 .flags = IORESOURCE_DMA,
328 },
329 {
330 .start = CH_UART0_RX,
331 .end = CH_UART0_RX,
332 .flags = IORESOURCE_DMA,
333 },
334};
335
336static unsigned short bfin_uart0_peripherals[] = {
337 P_UART0_TX, P_UART0_RX, 0
338};
339
340static struct platform_device bfin_uart0_device = {
341 .name = "bfin-uart",
342 .id = 0,
343 .num_resources = ARRAY_SIZE(bfin_uart0_resources),
344 .resource = bfin_uart0_resources,
345 .dev = {
346 .platform_data = &bfin_uart0_peripherals,
347 },
348};
349#endif
350#ifdef CONFIG_SERIAL_BFIN_UART1
351static struct resource bfin_uart1_resources[] = {
352 {
353 .start = UART1_THR,
354 .end = UART1_GCTL+2,
355 .flags = IORESOURCE_MEM,
356 },
357 {
358 .start = IRQ_UART1_TX,
359 .end = IRQ_UART1_TX,
360 .flags = IORESOURCE_IRQ,
361 },
362 {
363 .start = IRQ_UART1_RX,
364 .end = IRQ_UART1_RX,
365 .flags = IORESOURCE_IRQ,
366 },
367 {
368 .start = IRQ_UART1_ERROR,
369 .end = IRQ_UART1_ERROR,
370 .flags = IORESOURCE_IRQ,
371 },
372 {
373 .start = CH_UART1_TX,
374 .end = CH_UART1_TX,
375 .flags = IORESOURCE_DMA,
376 },
377 {
378 .start = CH_UART1_RX,
379 .end = CH_UART1_RX,
380 .flags = IORESOURCE_DMA,
381 },
382};
383
384static unsigned short bfin_uart1_peripherals[] = {
385 P_UART1_TX, P_UART1_RX, 0
386};
387
388static struct platform_device bfin_uart1_device = {
389 .name = "bfin-uart",
390 .id = 1,
391 .num_resources = ARRAY_SIZE(bfin_uart1_resources),
392 .resource = bfin_uart1_resources,
393 .dev = {
394 .platform_data = &bfin_uart1_peripherals,
395 },
396};
397#endif
398#endif
399
400#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
401#ifdef CONFIG_BFIN_SIR0
402static struct resource bfin_sir0_resources[] = {
403 {
404 .start = 0xFFC00400,
405 .end = 0xFFC004FF,
406 .flags = IORESOURCE_MEM,
407 },
408 {
409 .start = IRQ_UART0_RX,
410 .end = IRQ_UART0_RX+1,
411 .flags = IORESOURCE_IRQ,
412 },
413 {
414 .start = CH_UART0_RX,
415 .end = CH_UART0_RX+1,
416 .flags = IORESOURCE_DMA,
417 },
418};
419
420static struct platform_device bfin_sir0_device = {
421 .name = "bfin_sir",
422 .id = 0,
423 .num_resources = ARRAY_SIZE(bfin_sir0_resources),
424 .resource = bfin_sir0_resources,
425};
426#endif
427#ifdef CONFIG_BFIN_SIR1
428static struct resource bfin_sir1_resources[] = {
429 {
430 .start = 0xFFC02000,
431 .end = 0xFFC020FF,
432 .flags = IORESOURCE_MEM,
433 },
434 {
435 .start = IRQ_UART1_RX,
436 .end = IRQ_UART1_RX+1,
437 .flags = IORESOURCE_IRQ,
438 },
439 {
440 .start = CH_UART1_RX,
441 .end = CH_UART1_RX+1,
442 .flags = IORESOURCE_DMA,
443 },
444};
445
446static struct platform_device bfin_sir1_device = {
447 .name = "bfin_sir",
448 .id = 1,
449 .num_resources = ARRAY_SIZE(bfin_sir1_resources),
450 .resource = bfin_sir1_resources,
451};
452#endif
453#endif
454
455#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
456static const u16 bfin_twi0_pins[] = {P_TWI0_SCL, P_TWI0_SDA, 0};
457
458static struct resource bfin_twi0_resource[] = {
459 [0] = {
460 .start = TWI0_REGBASE,
461 .end = TWI0_REGBASE,
462 .flags = IORESOURCE_MEM,
463 },
464 [1] = {
465 .start = IRQ_TWI,
466 .end = IRQ_TWI,
467 .flags = IORESOURCE_IRQ,
468 },
469};
470
471static struct platform_device i2c_bfin_twi_device = {
472 .name = "i2c-bfin-twi",
473 .id = 0,
474 .num_resources = ARRAY_SIZE(bfin_twi0_resource),
475 .resource = bfin_twi0_resource,
476 .dev = {
477 .platform_data = &bfin_twi0_pins,
478 },
479};
480#endif
481
482#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
483#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
484static struct resource bfin_sport0_uart_resources[] = {
485 {
486 .start = SPORT0_TCR1,
487 .end = SPORT0_MRCS3+4,
488 .flags = IORESOURCE_MEM,
489 },
490 {
491 .start = IRQ_SPORT0_RX,
492 .end = IRQ_SPORT0_RX+1,
493 .flags = IORESOURCE_IRQ,
494 },
495 {
496 .start = IRQ_SPORT0_ERROR,
497 .end = IRQ_SPORT0_ERROR,
498 .flags = IORESOURCE_IRQ,
499 },
500};
501
502static unsigned short bfin_sport0_peripherals[] = {
503 P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS,
504 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
505};
506
507static struct platform_device bfin_sport0_uart_device = {
508 .name = "bfin-sport-uart",
509 .id = 0,
510 .num_resources = ARRAY_SIZE(bfin_sport0_uart_resources),
511 .resource = bfin_sport0_uart_resources,
512 .dev = {
513 .platform_data = &bfin_sport0_peripherals,
514 },
515};
516#endif
517#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
518static struct resource bfin_sport1_uart_resources[] = {
519 {
520 .start = SPORT1_TCR1,
521 .end = SPORT1_MRCS3+4,
522 .flags = IORESOURCE_MEM,
523 },
524 {
525 .start = IRQ_SPORT1_RX,
526 .end = IRQ_SPORT1_RX+1,
527 .flags = IORESOURCE_IRQ,
528 },
529 {
530 .start = IRQ_SPORT1_ERROR,
531 .end = IRQ_SPORT1_ERROR,
532 .flags = IORESOURCE_IRQ,
533 },
534};
535
536static unsigned short bfin_sport1_peripherals[] = {
537 P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS,
538 P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0
539};
540
541static struct platform_device bfin_sport1_uart_device = {
542 .name = "bfin-sport-uart",
543 .id = 1,
544 .num_resources = ARRAY_SIZE(bfin_sport1_uart_resources),
545 .resource = bfin_sport1_uart_resources,
546 .dev = {
547 .platform_data = &bfin_sport1_peripherals,
548 },
549};
550#endif
551#endif
552
553#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
554#include <linux/bfin_mac.h>
555static const unsigned short bfin_mac_peripherals[] = P_MII0;
556
557static struct bfin_phydev_platform_data bfin_phydev_data[] = {
558 {
559 .addr = 1,
560 .irq = IRQ_MAC_PHYINT,
561 },
562};
563
564static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
565 .phydev_number = 1,
566 .phydev_data = bfin_phydev_data,
567 .phy_mode = PHY_INTERFACE_MODE_MII,
568 .mac_peripherals = bfin_mac_peripherals,
569};
570
571static struct platform_device bfin_mii_bus = {
572 .name = "bfin_mii_bus",
573 .dev = {
574 .platform_data = &bfin_mii_bus_data,
575 }
576};
577
578static struct platform_device bfin_mac_device = {
579 .name = "bfin_mac",
580 .dev = {
581 .platform_data = &bfin_mii_bus,
582 }
583};
584#endif
585
586#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
587#define PATA_INT IRQ_PF14
588
589static struct pata_platform_info bfin_pata_platform_data = {
590 .ioport_shift = 2,
591 .irq_type = IRQF_TRIGGER_HIGH,
592};
593
594static struct resource bfin_pata_resources[] = {
595 {
596 .start = 0x2030C000,
597 .end = 0x2030C01F,
598 .flags = IORESOURCE_MEM,
599 },
600 {
601 .start = 0x2030D018,
602 .end = 0x2030D01B,
603 .flags = IORESOURCE_MEM,
604 },
605 {
606 .start = PATA_INT,
607 .end = PATA_INT,
608 .flags = IORESOURCE_IRQ,
609 },
610};
611
612static struct platform_device bfin_pata_device = {
613 .name = "pata_platform",
614 .id = -1,
615 .num_resources = ARRAY_SIZE(bfin_pata_resources),
616 .resource = bfin_pata_resources,
617 .dev = {
618 .platform_data = &bfin_pata_platform_data,
619 }
620};
621#endif
622
623static const unsigned int cclk_vlev_datasheet[] =
624{
625 VRPAIR(VLEV_085, 250000000),
626 VRPAIR(VLEV_090, 376000000),
627 VRPAIR(VLEV_095, 426000000),
628 VRPAIR(VLEV_100, 426000000),
629 VRPAIR(VLEV_105, 476000000),
630 VRPAIR(VLEV_110, 476000000),
631 VRPAIR(VLEV_115, 476000000),
632 VRPAIR(VLEV_120, 500000000),
633 VRPAIR(VLEV_125, 533000000),
634 VRPAIR(VLEV_130, 600000000),
635};
636
637static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
638 .tuple_tab = cclk_vlev_datasheet,
639 .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
640 .vr_settling_time = 25 ,
641};
642
643static struct platform_device bfin_dpmc = {
644 .name = "bfin dpmc",
645 .dev = {
646 .platform_data = &bfin_dmpc_vreg_data,
647 },
648};
649
650static struct platform_device *cm_bf537_devices[] __initdata = {
651
652 &bfin_dpmc,
653
654#if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
655 &hitachi_fb_device,
656#endif
657
658#if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
659 &rtc_device,
660#endif
661
662#if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
663#ifdef CONFIG_SERIAL_BFIN_UART0
664 &bfin_uart0_device,
665#endif
666#ifdef CONFIG_SERIAL_BFIN_UART1
667 &bfin_uart1_device,
668#endif
669#endif
670
671#if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
672#ifdef CONFIG_BFIN_SIR0
673 &bfin_sir0_device,
674#endif
675#ifdef CONFIG_BFIN_SIR1
676 &bfin_sir1_device,
677#endif
678#endif
679
680#if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
681 &i2c_bfin_twi_device,
682#endif
683
684#if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
685#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
686 &bfin_sport0_uart_device,
687#endif
688#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
689 &bfin_sport1_uart_device,
690#endif
691#endif
692
693#if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
694 &isp1362_hcd_device,
695#endif
696
697#if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
698 &smc91x_device,
699#endif
700
701#if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
702 &bfin_mii_bus,
703 &bfin_mac_device,
704#endif
705
706#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
707 &net2272_bfin_device,
708#endif
709
710#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
711 &bfin_spi0_device,
712#endif
713
714#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
715 &bfin_pata_device,
716#endif
717
718#if defined(CONFIG_MTD_GPIO_ADDR) || defined(CONFIG_MTD_GPIO_ADDR_MODULE)
719 &cm_flash_device,
720#endif
721};
722
723static int __init net2272_init(void)
724{
725#if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
726 int ret;
727
728 ret = gpio_request(GPIO_PG14, "net2272");
729 if (ret)
730 return ret;
731
732
733 gpio_direction_output(GPIO_PG14, 0);
734 mdelay(2);
735 gpio_set_value(GPIO_PG14, 1);
736#endif
737
738 return 0;
739}
740
741static int __init tcm_bf537_init(void)
742{
743 printk(KERN_INFO "%s(): registering device resources\n", __func__);
744 platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
745#if defined(CONFIG_SPI_BFIN5XX) || defined(CONFIG_SPI_BFIN5XX_MODULE)
746 spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
747#endif
748
749#if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
750 irq_set_status_flags(PATA_INT, IRQ_NOAUTOEN);
751#endif
752
753 if (net2272_init())
754 pr_warning("unable to configure net2272; it probably won't work\n");
755
756 return 0;
757}
758
759arch_initcall(tcm_bf537_init);
760
761static struct platform_device *cm_bf537_early_devices[] __initdata = {
762#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
763#ifdef CONFIG_SERIAL_BFIN_UART0
764 &bfin_uart0_device,
765#endif
766#ifdef CONFIG_SERIAL_BFIN_UART1
767 &bfin_uart1_device,
768#endif
769#endif
770
771#if defined(CONFIG_SERIAL_BFIN_SPORT_CONSOLE)
772#ifdef CONFIG_SERIAL_BFIN_SPORT0_UART
773 &bfin_sport0_uart_device,
774#endif
775#ifdef CONFIG_SERIAL_BFIN_SPORT1_UART
776 &bfin_sport1_uart_device,
777#endif
778#endif
779};
780
781void __init native_machine_early_platform_add_devices(void)
782{
783 printk(KERN_INFO "register early platform devices\n");
784 early_platform_add_devices(cm_bf537_early_devices,
785 ARRAY_SIZE(cm_bf537_early_devices));
786}
787
788int bfin_get_ether_addr(char *addr)
789{
790 return 1;
791}
792EXPORT_SYMBOL(bfin_get_ether_addr);
793
