LXR linux/arch/powerpc/include/asm/ucc

   1/*
   2 * Internal header file for UCC FAST unit routines.
   3 *
   4 * Copyright (C) 2006 Freescale Semiconductor, Inc. All rights reserved.
   5 *
   6 * Authors:     Shlomi Gridish <gridish@freescale.com>
   7 *              Li Yang <leoli@freescale.com>
   8 *
   9 * This program is free software; you can redistribute  it and/or modify it
  10 * under  the terms of  the GNU General  Public License as published by the
  11 * Free Software Foundation;  either version 2 of the  License, or (at your
  12 * option) any later version.
  13 */
  14#ifndef __UCC_FAST_H__
  15#define __UCC_FAST_H__
  16
  17#include <linux/kernel.h>
  18
  19#include <asm/immap_qe.h>
  20#include <asm/qe.h>
  21
  22#include <asm/ucc.h>
  23
  24/* Receive BD's status */
  25#define R_E     0x80000000      /* buffer empty */
  26#define R_W     0x20000000      /* wrap bit */
  27#define R_I     0x10000000      /* interrupt on reception */
  28#define R_L     0x08000000      /* last */
  29#define R_F     0x04000000      /* first */
  30
  31/* transmit BD's status */
  32#define T_R     0x80000000      /* ready bit */
  33#define T_W     0x20000000      /* wrap bit */
  34#define T_I     0x10000000      /* interrupt on completion */
  35#define T_L     0x08000000      /* last */
  36
  37/* Rx Data buffer must be 4 bytes aligned in most cases */
  38#define UCC_FAST_RX_ALIGN                       4
  39#define UCC_FAST_MRBLR_ALIGNMENT                4
  40#define UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT       8
  41
  42/* Sizes */
  43#define UCC_FAST_URFS_MIN_VAL                           0x88
  44#define UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR 8
  45
  46/* ucc_fast_channel_protocol_mode - UCC FAST mode */
  47enum ucc_fast_channel_protocol_mode {
  48        UCC_FAST_PROTOCOL_MODE_HDLC = 0x00000000,
  49        UCC_FAST_PROTOCOL_MODE_RESERVED01 = 0x00000001,
  50        UCC_FAST_PROTOCOL_MODE_RESERVED_QMC = 0x00000002,
  51        UCC_FAST_PROTOCOL_MODE_RESERVED02 = 0x00000003,
  52        UCC_FAST_PROTOCOL_MODE_RESERVED_UART = 0x00000004,
  53        UCC_FAST_PROTOCOL_MODE_RESERVED03 = 0x00000005,
  54        UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_1 = 0x00000006,
  55        UCC_FAST_PROTOCOL_MODE_RESERVED_EX_MAC_2 = 0x00000007,
  56        UCC_FAST_PROTOCOL_MODE_RESERVED_BISYNC = 0x00000008,
  57        UCC_FAST_PROTOCOL_MODE_RESERVED04 = 0x00000009,
  58        UCC_FAST_PROTOCOL_MODE_ATM = 0x0000000A,
  59        UCC_FAST_PROTOCOL_MODE_RESERVED05 = 0x0000000B,
  60        UCC_FAST_PROTOCOL_MODE_ETHERNET = 0x0000000C,
  61        UCC_FAST_PROTOCOL_MODE_RESERVED06 = 0x0000000D,
  62        UCC_FAST_PROTOCOL_MODE_POS = 0x0000000E,
  63        UCC_FAST_PROTOCOL_MODE_RESERVED07 = 0x0000000F
  64};
  65
  66/* ucc_fast_transparent_txrx - UCC Fast Transparent TX & RX */
  67enum ucc_fast_transparent_txrx {
  68        UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_NORMAL = 0x00000000,
  69        UCC_FAST_GUMR_TRANSPARENT_TTX_TRX_TRANSPARENT = 0x18000000
  70};
  71
  72/* UCC fast diagnostic mode */
  73enum ucc_fast_diag_mode {
  74        UCC_FAST_DIAGNOSTIC_NORMAL = 0x0,
  75        UCC_FAST_DIAGNOSTIC_LOCAL_LOOP_BACK = 0x40000000,
  76        UCC_FAST_DIAGNOSTIC_AUTO_ECHO = 0x80000000,
  77        UCC_FAST_DIAGNOSTIC_LOOP_BACK_AND_ECHO = 0xC0000000
  78};
  79
  80/* UCC fast Sync length (transparent mode only) */
  81enum ucc_fast_sync_len {
  82        UCC_FAST_SYNC_LEN_NOT_USED = 0x0,
  83        UCC_FAST_SYNC_LEN_AUTOMATIC = 0x00004000,
  84        UCC_FAST_SYNC_LEN_8_BIT = 0x00008000,
  85        UCC_FAST_SYNC_LEN_16_BIT = 0x0000C000
  86};
  87
  88/* UCC fast RTS mode */
  89enum ucc_fast_ready_to_send {
  90        UCC_FAST_SEND_IDLES_BETWEEN_FRAMES = 0x00000000,
  91        UCC_FAST_SEND_FLAGS_BETWEEN_FRAMES = 0x00002000
  92};
  93
  94/* UCC fast receiver decoding mode */
  95enum ucc_fast_rx_decoding_method {
  96        UCC_FAST_RX_ENCODING_NRZ = 0x00000000,
  97        UCC_FAST_RX_ENCODING_NRZI = 0x00000800,
  98        UCC_FAST_RX_ENCODING_RESERVED0 = 0x00001000,
  99        UCC_FAST_RX_ENCODING_RESERVED1 = 0x00001800
 100};
 101
 102/* UCC fast transmitter encoding mode */
 103enum ucc_fast_tx_encoding_method {
 104        UCC_FAST_TX_ENCODING_NRZ = 0x00000000,
 105        UCC_FAST_TX_ENCODING_NRZI = 0x00000100,
 106        UCC_FAST_TX_ENCODING_RESERVED0 = 0x00000200,
 107        UCC_FAST_TX_ENCODING_RESERVED1 = 0x00000300
 108};
 109
 110/* UCC fast CRC length */
 111enum ucc_fast_transparent_tcrc {
 112        UCC_FAST_16_BIT_CRC = 0x00000000,
 113        UCC_FAST_CRC_RESERVED0 = 0x00000040,
 114        UCC_FAST_32_BIT_CRC = 0x00000080,
 115        UCC_FAST_CRC_RESERVED1 = 0x000000C0
 116};
 117
 118/* Fast UCC initialization structure */
 119struct ucc_fast_info {
 120        int ucc_num;
 121        enum qe_clock rx_clock;
 122        enum qe_clock tx_clock;
 123        u32 regs;
 124        int irq;
 125        u32 uccm_mask;
 126        int bd_mem_part;
 127        int brkpt_support;
 128        int grant_support;
 129        int tsa;
 130        int cdp;
 131        int cds;
 132        int ctsp;
 133        int ctss;
 134        int tci;
 135        int txsy;
 136        int rtsm;
 137        int revd;
 138        int rsyn;
 139        u16 max_rx_buf_length;
 140        u16 urfs;
 141        u16 urfet;
 142        u16 urfset;
 143        u16 utfs;
 144        u16 utfet;
 145        u16 utftt;
 146        u16 ufpt;
 147        enum ucc_fast_channel_protocol_mode mode;
 148        enum ucc_fast_transparent_txrx ttx_trx;
 149        enum ucc_fast_tx_encoding_method tenc;
 150        enum ucc_fast_rx_decoding_method renc;
 151        enum ucc_fast_transparent_tcrc tcrc;
 152        enum ucc_fast_sync_len synl;
 153};
 154
 155struct ucc_fast_private {
 156        struct ucc_fast_info *uf_info;
 157        struct ucc_fast __iomem *uf_regs; /* a pointer to the UCC regs. */
 158        u32 __iomem *p_ucce;    /* a pointer to the event register in memory. */
 159        u32 __iomem *p_uccm;    /* a pointer to the mask register in memory. */
 160#ifdef CONFIG_UGETH_TX_ON_DEMAND
 161        u16 __iomem *p_utodr;   /* pointer to the transmit on demand register */
 162#endif
 163        int enabled_tx;         /* Whether channel is enabled for Tx (ENT) */
 164        int enabled_rx;         /* Whether channel is enabled for Rx (ENR) */
 165        int stopped_tx;         /* Whether channel has been stopped for Tx
 166                                   (STOP_TX, etc.) */
 167        int stopped_rx;         /* Whether channel has been stopped for Rx */
 168        u32 ucc_fast_tx_virtual_fifo_base_offset;/* pointer to base of Tx
 169                                                    virtual fifo */
 170        u32 ucc_fast_rx_virtual_fifo_base_offset;/* pointer to base of Rx
 171                                                    virtual fifo */
 172#ifdef STATISTICS
 173        u32 tx_frames;          /* Transmitted frames counter. */
 174        u32 rx_frames;          /* Received frames counter (only frames
 175                                   passed to application). */
 176        u32 tx_discarded;       /* Discarded tx frames counter (frames that
 177                                   were discarded by the driver due to errors).
 178                                   */
 179        u32 rx_discarded;       /* Discarded rx frames counter (frames that
 180                                   were discarded by the driver due to errors).
 181                                   */
 182#endif                          /* STATISTICS */
 183        u16 mrblr;              /* maximum receive buffer length */
 184};
 185
 186/* ucc_fast_init
 187 * Initializes Fast UCC according to user provided parameters.
 188 *
 189 * uf_info  - (In) pointer to the fast UCC info structure.
 190 * uccf_ret - (Out) pointer to the fast UCC structure.
 191 */
 192int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** uccf_ret);
 193
 194/* ucc_fast_free
 195 * Frees all resources for fast UCC.
 196 *
 197 * uccf - (In) pointer to the fast UCC structure.
 198 */
 199void ucc_fast_free(struct ucc_fast_private * uccf);
 200
 201/* ucc_fast_enable
 202 * Enables a fast UCC port.
 203 * This routine enables Tx and/or Rx through the General UCC Mode Register.
 204 *
 205 * uccf - (In) pointer to the fast UCC structure.
 206 * mode - (In) TX, RX, or both.
 207 */
 208void ucc_fast_enable(struct ucc_fast_private * uccf, enum comm_dir mode);
 209
 210/* ucc_fast_disable
 211 * Disables a fast UCC port.
 212 * This routine disables Tx and/or Rx through the General UCC Mode Register.
 213 *
 214 * uccf - (In) pointer to the fast UCC structure.
 215 * mode - (In) TX, RX, or both.
 216 */
 217void ucc_fast_disable(struct ucc_fast_private * uccf, enum comm_dir mode);
 218
 219/* ucc_fast_irq
 220 * Handles interrupts on fast UCC.
 221 * Called from the general interrupt routine to handle interrupts on fast UCC.
 222 *
 223 * uccf - (In) pointer to the fast UCC structure.
 224 */
 225void ucc_fast_irq(struct ucc_fast_private * uccf);
 226
 227/* ucc_fast_transmit_on_demand
 228 * Immediately forces a poll of the transmitter for data to be sent.
 229 * Typically, the hardware performs a periodic poll for data that the
 230 * transmit routine has set up to be transmitted. In cases where
 231 * this polling cycle is not soon enough, this optional routine can
 232 * be invoked to force a poll right away, instead. Proper use for
 233 * each transmission for which this functionality is desired is to
 234 * call the transmit routine and then this routine right after.
 235 *
 236 * uccf - (In) pointer to the fast UCC structure.
 237 */
 238void ucc_fast_transmit_on_demand(struct ucc_fast_private * uccf);
 239
 240u32 ucc_fast_get_qe_cr_subblock(int uccf_num);
 241
 242void ucc_fast_dump_regs(struct ucc_fast_private * uccf);
 243
 244#endif                          /* __UCC_FAST_H__ */
 245