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12#ifndef _ASM_S390_CPU_MF_H
13#define _ASM_S390_CPU_MF_H
14
15#include <linux/errno.h>
16#include <asm/facility.h>
17
18#define CPU_MF_INT_SF_IAE (1 << 31)
19#define CPU_MF_INT_SF_ISE (1 << 30)
20#define CPU_MF_INT_SF_PRA (1 << 29)
21#define CPU_MF_INT_SF_SACA (1 << 23)
22#define CPU_MF_INT_SF_LSDA (1 << 22)
23#define CPU_MF_INT_CF_CACA (1 << 7)
24#define CPU_MF_INT_CF_LCDA (1 << 6)
25#define CPU_MF_INT_RI_HALTED (1 << 5)
26#define CPU_MF_INT_RI_BUF_FULL (1 << 4)
27
28
29#define CPU_MF_INT_CF_MASK (CPU_MF_INT_CF_CACA|CPU_MF_INT_CF_LCDA)
30#define CPU_MF_INT_SF_MASK (CPU_MF_INT_SF_IAE|CPU_MF_INT_SF_ISE| \
31 CPU_MF_INT_SF_PRA|CPU_MF_INT_SF_SACA| \
32 CPU_MF_INT_SF_LSDA)
33#define CPU_MF_INT_RI_MASK (CPU_MF_INT_RI_HALTED|CPU_MF_INT_RI_BUF_FULL)
34
35
36static inline int cpum_cf_avail(void)
37{
38 return MACHINE_HAS_LPP && test_facility(67);
39}
40
41static inline int cpum_sf_avail(void)
42{
43 return MACHINE_HAS_LPP && test_facility(68);
44}
45
46
47struct cpumf_ctr_info {
48 u16 cfvn;
49 u16 auth_ctl;
50 u16 enable_ctl;
51 u16 act_ctl;
52 u16 max_cpu;
53 u16 csvn;
54 u16 max_cg;
55 u16 reserved1;
56 u32 reserved2[12];
57} __packed;
58
59
60static inline int qctri(struct cpumf_ctr_info *info)
61{
62 int rc = -EINVAL;
63
64 asm volatile (
65 "0: .insn s,0xb28e0000,%1\n"
66 "1: lhi %0,0\n"
67 "2:\n"
68 EX_TABLE(1b, 2b)
69 : "+d" (rc), "=Q" (*info));
70 return rc;
71}
72
73
74static inline int lcctl(u64 ctl)
75{
76 int cc;
77
78 asm volatile (
79 " .insn s,0xb2840000,%1\n"
80 " ipm %0\n"
81 " srl %0,28\n"
82 : "=d" (cc) : "m" (ctl) : "cc");
83 return cc;
84}
85
86
87static inline int ecctr(u64 ctr, u64 *val)
88{
89 register u64 content asm("4") = 0;
90 int cc;
91
92 asm volatile (
93 " .insn rre,0xb2e40000,%0,%2\n"
94 " ipm %1\n"
95 " srl %1,28\n"
96 : "=d" (content), "=d" (cc) : "d" (ctr) : "cc");
97 if (!cc)
98 *val = content;
99 return cc;
100}
101
102#endif
103