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7#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8
9#include <linux/bootmem.h>
10#include <linux/compat.h>
11#include <asm/i387.h>
12#include <asm/fpu-internal.h>
13#include <asm/sigframe.h>
14#include <asm/xcr.h>
15
16
17
18
19u64 pcntxt_mask;
20
21
22
23
24struct xsave_struct *init_xstate_buf;
25
26static struct _fpx_sw_bytes fx_sw_reserved, fx_sw_reserved_ia32;
27static unsigned int *xstate_offsets, *xstate_sizes, xstate_features;
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38
39void __sanitize_i387_state(struct task_struct *tsk)
40{
41 struct i387_fxsave_struct *fx = &tsk->thread.fpu.state->fxsave;
42 int feature_bit = 0x2;
43 u64 xstate_bv;
44
45 if (!fx)
46 return;
47
48 xstate_bv = tsk->thread.fpu.state->xsave.xsave_hdr.xstate_bv;
49
50
51
52
53
54 if ((xstate_bv & pcntxt_mask) == pcntxt_mask)
55 return;
56
57
58
59
60 if (!(xstate_bv & XSTATE_FP)) {
61 fx->cwd = 0x37f;
62 fx->swd = 0;
63 fx->twd = 0;
64 fx->fop = 0;
65 fx->rip = 0;
66 fx->rdp = 0;
67 memset(&fx->st_space[0], 0, 128);
68 }
69
70
71
72
73 if (!(xstate_bv & XSTATE_SSE))
74 memset(&fx->xmm_space[0], 0, 256);
75
76 xstate_bv = (pcntxt_mask & ~xstate_bv) >> 2;
77
78
79
80
81
82 while (xstate_bv) {
83 if (xstate_bv & 0x1) {
84 int offset = xstate_offsets[feature_bit];
85 int size = xstate_sizes[feature_bit];
86
87 memcpy(((void *) fx) + offset,
88 ((void *) init_xstate_buf) + offset,
89 size);
90 }
91
92 xstate_bv >>= 1;
93 feature_bit++;
94 }
95}
96
97
98
99
100
101static inline int check_for_xstate(struct i387_fxsave_struct __user *buf,
102 void __user *fpstate,
103 struct _fpx_sw_bytes *fx_sw)
104{
105 int min_xstate_size = sizeof(struct i387_fxsave_struct) +
106 sizeof(struct xsave_hdr_struct);
107 unsigned int magic2;
108
109 if (__copy_from_user(fx_sw, &buf->sw_reserved[0], sizeof(*fx_sw)))
110 return -1;
111
112
113 if (fx_sw->magic1 != FP_XSTATE_MAGIC1 ||
114 fx_sw->xstate_size < min_xstate_size ||
115 fx_sw->xstate_size > xstate_size ||
116 fx_sw->xstate_size > fx_sw->extended_size)
117 return -1;
118
119
120
121
122
123
124
125 if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))
126 || magic2 != FP_XSTATE_MAGIC2)
127 return -1;
128
129 return 0;
130}
131
132
133
134
135static inline int save_fsave_header(struct task_struct *tsk, void __user *buf)
136{
137 if (use_fxsr()) {
138 struct xsave_struct *xsave = &tsk->thread.fpu.state->xsave;
139 struct user_i387_ia32_struct env;
140 struct _fpstate_ia32 __user *fp = buf;
141
142 convert_from_fxsr(&env, tsk);
143
144 if (__copy_to_user(buf, &env, sizeof(env)) ||
145 __put_user(xsave->i387.swd, &fp->status) ||
146 __put_user(X86_FXSR_MAGIC, &fp->magic))
147 return -1;
148 } else {
149 struct i387_fsave_struct __user *fp = buf;
150 u32 swd;
151 if (__get_user(swd, &fp->swd) || __put_user(swd, &fp->status))
152 return -1;
153 }
154
155 return 0;
156}
157
158static inline int save_xstate_epilog(void __user *buf, int ia32_frame)
159{
160 struct xsave_struct __user *x = buf;
161 struct _fpx_sw_bytes *sw_bytes;
162 u32 xstate_bv;
163 int err;
164
165
166 sw_bytes = ia32_frame ? &fx_sw_reserved_ia32 : &fx_sw_reserved;
167 err = __copy_to_user(&x->i387.sw_reserved, sw_bytes, sizeof(*sw_bytes));
168
169 if (!use_xsave())
170 return err;
171
172 err |= __put_user(FP_XSTATE_MAGIC2, (__u32 *)(buf + xstate_size));
173
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177
178 err |= __get_user(xstate_bv, (__u32 *)&x->xsave_hdr.xstate_bv);
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191 xstate_bv |= XSTATE_FPSSE;
192
193 err |= __put_user(xstate_bv, (__u32 *)&x->xsave_hdr.xstate_bv);
194
195 return err;
196}
197
198static inline int save_user_xstate(struct xsave_struct __user *buf)
199{
200 int err;
201
202 if (use_xsave())
203 err = xsave_user(buf);
204 else if (use_fxsr())
205 err = fxsave_user((struct i387_fxsave_struct __user *) buf);
206 else
207 err = fsave_user((struct i387_fsave_struct __user *) buf);
208
209 if (unlikely(err) && __clear_user(buf, xstate_size))
210 err = -EFAULT;
211 return err;
212}
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233
234int save_xstate_sig(void __user *buf, void __user *buf_fx, int size)
235{
236 struct xsave_struct *xsave = ¤t->thread.fpu.state->xsave;
237 struct task_struct *tsk = current;
238 int ia32_fxstate = (buf != buf_fx);
239
240 ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
241 config_enabled(CONFIG_IA32_EMULATION));
242
243 if (!access_ok(VERIFY_WRITE, buf, size))
244 return -EACCES;
245
246 if (!HAVE_HWFP)
247 return fpregs_soft_get(current, NULL, 0,
248 sizeof(struct user_i387_ia32_struct), NULL,
249 (struct _fpstate_ia32 __user *) buf) ? -1 : 1;
250
251 if (user_has_fpu()) {
252
253 if (save_user_xstate(buf_fx))
254 return -1;
255
256 if (ia32_fxstate)
257 fpu_fxsave(&tsk->thread.fpu);
258 } else {
259 sanitize_i387_state(tsk);
260 if (__copy_to_user(buf_fx, xsave, xstate_size))
261 return -1;
262 }
263
264
265 if ((ia32_fxstate || !use_fxsr()) && save_fsave_header(tsk, buf))
266 return -1;
267
268 if (use_fxsr() && save_xstate_epilog(buf_fx, ia32_fxstate))
269 return -1;
270
271 drop_init_fpu(tsk);
272
273 return 0;
274}
275
276static inline void
277sanitize_restored_xstate(struct task_struct *tsk,
278 struct user_i387_ia32_struct *ia32_env,
279 u64 xstate_bv, int fx_only)
280{
281 struct xsave_struct *xsave = &tsk->thread.fpu.state->xsave;
282 struct xsave_hdr_struct *xsave_hdr = &xsave->xsave_hdr;
283
284 if (use_xsave()) {
285
286 xsave_hdr->reserved1[0] = xsave_hdr->reserved1[1] = 0;
287
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291
292 if (fx_only)
293 xsave_hdr->xstate_bv = XSTATE_FPSSE;
294 else
295 xsave_hdr->xstate_bv &= (pcntxt_mask & xstate_bv);
296 }
297
298 if (use_fxsr()) {
299
300
301
302
303 xsave->i387.mxcsr &= mxcsr_feature_mask;
304
305 convert_to_fxsr(tsk, ia32_env);
306 }
307}
308
309
310
311
312static inline int restore_user_xstate(void __user *buf, u64 xbv, int fx_only)
313{
314 if (use_xsave()) {
315 if ((unsigned long)buf % 64 || fx_only) {
316 u64 init_bv = pcntxt_mask & ~XSTATE_FPSSE;
317 xrstor_state(init_xstate_buf, init_bv);
318 return fxrstor_user(buf);
319 } else {
320 u64 init_bv = pcntxt_mask & ~xbv;
321 if (unlikely(init_bv))
322 xrstor_state(init_xstate_buf, init_bv);
323 return xrestore_user(buf, xbv);
324 }
325 } else if (use_fxsr()) {
326 return fxrstor_user(buf);
327 } else
328 return frstor_user(buf);
329}
330
331int __restore_xstate_sig(void __user *buf, void __user *buf_fx, int size)
332{
333 int ia32_fxstate = (buf != buf_fx);
334 struct task_struct *tsk = current;
335 int state_size = xstate_size;
336 u64 xstate_bv = 0;
337 int fx_only = 0;
338
339 ia32_fxstate &= (config_enabled(CONFIG_X86_32) ||
340 config_enabled(CONFIG_IA32_EMULATION));
341
342 if (!buf) {
343 drop_init_fpu(tsk);
344 return 0;
345 }
346
347 if (!access_ok(VERIFY_READ, buf, size))
348 return -EACCES;
349
350 if (!used_math() && init_fpu(tsk))
351 return -1;
352
353 if (!HAVE_HWFP) {
354 return fpregs_soft_set(current, NULL,
355 0, sizeof(struct user_i387_ia32_struct),
356 NULL, buf) != 0;
357 }
358
359 if (use_xsave()) {
360 struct _fpx_sw_bytes fx_sw_user;
361 if (unlikely(check_for_xstate(buf_fx, buf_fx, &fx_sw_user))) {
362
363
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365
366
367 state_size = sizeof(struct i387_fxsave_struct);
368 fx_only = 1;
369 } else {
370 state_size = fx_sw_user.xstate_size;
371 xstate_bv = fx_sw_user.xstate_bv;
372 }
373 }
374
375 if (ia32_fxstate) {
376
377
378
379
380
381 struct xsave_struct *xsave = &tsk->thread.fpu.state->xsave;
382 struct user_i387_ia32_struct env;
383 int err = 0;
384
385
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389
390
391
392
393 drop_fpu(tsk);
394
395 if (__copy_from_user(xsave, buf_fx, state_size) ||
396 __copy_from_user(&env, buf, sizeof(env))) {
397 err = -1;
398 } else {
399 sanitize_restored_xstate(tsk, &env, xstate_bv, fx_only);
400 set_used_math();
401 }
402
403 if (use_eager_fpu())
404 math_state_restore();
405
406 return err;
407 } else {
408
409
410
411
412 user_fpu_begin();
413 if (restore_user_xstate(buf_fx, xstate_bv, fx_only)) {
414 drop_init_fpu(tsk);
415 return -1;
416 }
417 }
418
419 return 0;
420}
421
422
423
424
425
426
427
428
429static void prepare_fx_sw_frame(void)
430{
431 int fsave_header_size = sizeof(struct i387_fsave_struct);
432 int size = xstate_size + FP_XSTATE_MAGIC2_SIZE;
433
434 if (config_enabled(CONFIG_X86_32))
435 size += fsave_header_size;
436
437 fx_sw_reserved.magic1 = FP_XSTATE_MAGIC1;
438 fx_sw_reserved.extended_size = size;
439 fx_sw_reserved.xstate_bv = pcntxt_mask;
440 fx_sw_reserved.xstate_size = xstate_size;
441
442 if (config_enabled(CONFIG_IA32_EMULATION)) {
443 fx_sw_reserved_ia32 = fx_sw_reserved;
444 fx_sw_reserved_ia32.extended_size += fsave_header_size;
445 }
446}
447
448
449
450
451static inline void xstate_enable(void)
452{
453 set_in_cr4(X86_CR4_OSXSAVE);
454 xsetbv(XCR_XFEATURE_ENABLED_MASK, pcntxt_mask);
455}
456
457
458
459
460
461static void __init setup_xstate_features(void)
462{
463 int eax, ebx, ecx, edx, leaf = 0x2;
464
465 xstate_features = fls64(pcntxt_mask);
466 xstate_offsets = alloc_bootmem(xstate_features * sizeof(int));
467 xstate_sizes = alloc_bootmem(xstate_features * sizeof(int));
468
469 do {
470 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
471
472 if (eax == 0)
473 break;
474
475 xstate_offsets[leaf] = ebx;
476 xstate_sizes[leaf] = eax;
477
478 leaf++;
479 } while (1);
480}
481
482
483
484
485static void __init setup_init_fpu_buf(void)
486{
487
488
489
490
491 init_xstate_buf = alloc_bootmem_align(xstate_size,
492 __alignof__(struct xsave_struct));
493 fx_finit(&init_xstate_buf->i387);
494
495 if (!cpu_has_xsave)
496 return;
497
498 setup_xstate_features();
499
500
501
502
503 xrstor_state(init_xstate_buf, -1);
504
505
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507
508 xsave_state(init_xstate_buf, -1);
509}
510
511static enum { AUTO, ENABLE, DISABLE } eagerfpu = AUTO;
512static int __init eager_fpu_setup(char *s)
513{
514 if (!strcmp(s, "on"))
515 eagerfpu = ENABLE;
516 else if (!strcmp(s, "off"))
517 eagerfpu = DISABLE;
518 else if (!strcmp(s, "auto"))
519 eagerfpu = AUTO;
520 return 1;
521}
522__setup("eagerfpu=", eager_fpu_setup);
523
524
525
526
527static void __init xstate_enable_boot_cpu(void)
528{
529 unsigned int eax, ebx, ecx, edx;
530
531 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
532 WARN(1, KERN_ERR "XSTATE_CPUID missing\n");
533 return;
534 }
535
536 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
537 pcntxt_mask = eax + ((u64)edx << 32);
538
539 if ((pcntxt_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
540 pr_err("FP/SSE not shown under xsave features 0x%llx\n",
541 pcntxt_mask);
542 BUG();
543 }
544
545
546
547
548 pcntxt_mask = pcntxt_mask & XCNTXT_MASK;
549
550 xstate_enable();
551
552
553
554
555 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
556 xstate_size = ebx;
557
558 update_regset_xstate_info(xstate_size, pcntxt_mask);
559 prepare_fx_sw_frame();
560 setup_init_fpu_buf();
561
562
563 if (cpu_has_xsaveopt && eagerfpu != DISABLE)
564 eagerfpu = ENABLE;
565
566 pr_info("enabled xstate_bv 0x%llx, cntxt size 0x%x\n",
567 pcntxt_mask, xstate_size);
568}
569
570
571
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574
575
576
577void __cpuinit xsave_init(void)
578{
579 static __refdata void (*next_func)(void) = xstate_enable_boot_cpu;
580 void (*this_func)(void);
581
582 if (!cpu_has_xsave)
583 return;
584
585 this_func = next_func;
586 next_func = xstate_enable;
587 this_func();
588}
589
590static inline void __init eager_fpu_init_bp(void)
591{
592 current->thread.fpu.state =
593 alloc_bootmem_align(xstate_size, __alignof__(struct xsave_struct));
594 if (!init_xstate_buf)
595 setup_init_fpu_buf();
596}
597
598void __cpuinit eager_fpu_init(void)
599{
600 static __refdata void (*boot_func)(void) = eager_fpu_init_bp;
601
602 clear_used_math();
603 current_thread_info()->status = 0;
604
605 if (eagerfpu == ENABLE)
606 setup_force_cpu_cap(X86_FEATURE_EAGER_FPU);
607
608 if (!cpu_has_eager_fpu) {
609 stts();
610 return;
611 }
612
613 if (boot_func) {
614 boot_func();
615 boot_func = NULL;
616 }
617
618
619
620
621
622 init_fpu(current);
623 __thread_fpu_begin(current);
624 if (cpu_has_xsave)
625 xrstor_state(init_xstate_buf, -1);
626 else
627 fxrstor_checking(&init_xstate_buf->i387);
628}
629