linux/drivers/gpu/drm/radeon/radeon_gart.c
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   1/*
   2 * Copyright 2008 Advanced Micro Devices, Inc.
   3 * Copyright 2008 Red Hat Inc.
   4 * Copyright 2009 Jerome Glisse.
   5 *
   6 * Permission is hereby granted, free of charge, to any person obtaining a
   7 * copy of this software and associated documentation files (the "Software"),
   8 * to deal in the Software without restriction, including without limitation
   9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10 * and/or sell copies of the Software, and to permit persons to whom the
  11 * Software is furnished to do so, subject to the following conditions:
  12 *
  13 * The above copyright notice and this permission notice shall be included in
  14 * all copies or substantial portions of the Software.
  15 *
  16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22 * OTHER DEALINGS IN THE SOFTWARE.
  23 *
  24 * Authors: Dave Airlie
  25 *          Alex Deucher
  26 *          Jerome Glisse
  27 */
  28#include <drm/drmP.h>
  29#include <drm/radeon_drm.h>
  30#include "radeon.h"
  31#include "radeon_reg.h"
  32
  33/*
  34 * GART
  35 * The GART (Graphics Aperture Remapping Table) is an aperture
  36 * in the GPU's address space.  System pages can be mapped into
  37 * the aperture and look like contiguous pages from the GPU's
  38 * perspective.  A page table maps the pages in the aperture
  39 * to the actual backing pages in system memory.
  40 *
  41 * Radeon GPUs support both an internal GART, as described above,
  42 * and AGP.  AGP works similarly, but the GART table is configured
  43 * and maintained by the northbridge rather than the driver.
  44 * Radeon hw has a separate AGP aperture that is programmed to
  45 * point to the AGP aperture provided by the northbridge and the
  46 * requests are passed through to the northbridge aperture.
  47 * Both AGP and internal GART can be used at the same time, however
  48 * that is not currently supported by the driver.
  49 *
  50 * This file handles the common internal GART management.
  51 */
  52
  53/*
  54 * Common GART table functions.
  55 */
  56/**
  57 * radeon_gart_table_ram_alloc - allocate system ram for gart page table
  58 *
  59 * @rdev: radeon_device pointer
  60 *
  61 * Allocate system memory for GART page table
  62 * (r1xx-r3xx, non-pcie r4xx, rs400).  These asics require the
  63 * gart table to be in system memory.
  64 * Returns 0 for success, -ENOMEM for failure.
  65 */
  66int radeon_gart_table_ram_alloc(struct radeon_device *rdev)
  67{
  68        void *ptr;
  69
  70        ptr = pci_alloc_consistent(rdev->pdev, rdev->gart.table_size,
  71                                   &rdev->gart.table_addr);
  72        if (ptr == NULL) {
  73                return -ENOMEM;
  74        }
  75#ifdef CONFIG_X86
  76        if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
  77            rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
  78                set_memory_uc((unsigned long)ptr,
  79                              rdev->gart.table_size >> PAGE_SHIFT);
  80        }
  81#endif
  82        rdev->gart.ptr = ptr;
  83        memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size);
  84        return 0;
  85}
  86
  87/**
  88 * radeon_gart_table_ram_free - free system ram for gart page table
  89 *
  90 * @rdev: radeon_device pointer
  91 *
  92 * Free system memory for GART page table
  93 * (r1xx-r3xx, non-pcie r4xx, rs400).  These asics require the
  94 * gart table to be in system memory.
  95 */
  96void radeon_gart_table_ram_free(struct radeon_device *rdev)
  97{
  98        if (rdev->gart.ptr == NULL) {
  99                return;
 100        }
 101#ifdef CONFIG_X86
 102        if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480 ||
 103            rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
 104                set_memory_wb((unsigned long)rdev->gart.ptr,
 105                              rdev->gart.table_size >> PAGE_SHIFT);
 106        }
 107#endif
 108        pci_free_consistent(rdev->pdev, rdev->gart.table_size,
 109                            (void *)rdev->gart.ptr,
 110                            rdev->gart.table_addr);
 111        rdev->gart.ptr = NULL;
 112        rdev->gart.table_addr = 0;
 113}
 114
 115/**
 116 * radeon_gart_table_vram_alloc - allocate vram for gart page table
 117 *
 118 * @rdev: radeon_device pointer
 119 *
 120 * Allocate video memory for GART page table
 121 * (pcie r4xx, r5xx+).  These asics require the
 122 * gart table to be in video memory.
 123 * Returns 0 for success, error for failure.
 124 */
 125int radeon_gart_table_vram_alloc(struct radeon_device *rdev)
 126{
 127        int r;
 128
 129        if (rdev->gart.robj == NULL) {
 130                r = radeon_bo_create(rdev, rdev->gart.table_size,
 131                                     PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM,
 132                                     NULL, &rdev->gart.robj);
 133                if (r) {
 134                        return r;
 135                }
 136        }
 137        return 0;
 138}
 139
 140/**
 141 * radeon_gart_table_vram_pin - pin gart page table in vram
 142 *
 143 * @rdev: radeon_device pointer
 144 *
 145 * Pin the GART page table in vram so it will not be moved
 146 * by the memory manager (pcie r4xx, r5xx+).  These asics require the
 147 * gart table to be in video memory.
 148 * Returns 0 for success, error for failure.
 149 */
 150int radeon_gart_table_vram_pin(struct radeon_device *rdev)
 151{
 152        uint64_t gpu_addr;
 153        int r;
 154
 155        r = radeon_bo_reserve(rdev->gart.robj, false);
 156        if (unlikely(r != 0))
 157                return r;
 158        r = radeon_bo_pin(rdev->gart.robj,
 159                                RADEON_GEM_DOMAIN_VRAM, &gpu_addr);
 160        if (r) {
 161                radeon_bo_unreserve(rdev->gart.robj);
 162                return r;
 163        }
 164        r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr);
 165        if (r)
 166                radeon_bo_unpin(rdev->gart.robj);
 167        radeon_bo_unreserve(rdev->gart.robj);
 168        rdev->gart.table_addr = gpu_addr;
 169        return r;
 170}
 171
 172/**
 173 * radeon_gart_table_vram_unpin - unpin gart page table in vram
 174 *
 175 * @rdev: radeon_device pointer
 176 *
 177 * Unpin the GART page table in vram (pcie r4xx, r5xx+).
 178 * These asics require the gart table to be in video memory.
 179 */
 180void radeon_gart_table_vram_unpin(struct radeon_device *rdev)
 181{
 182        int r;
 183
 184        if (rdev->gart.robj == NULL) {
 185                return;
 186        }
 187        r = radeon_bo_reserve(rdev->gart.robj, false);
 188        if (likely(r == 0)) {
 189                radeon_bo_kunmap(rdev->gart.robj);
 190                radeon_bo_unpin(rdev->gart.robj);
 191                radeon_bo_unreserve(rdev->gart.robj);
 192                rdev->gart.ptr = NULL;
 193        }
 194}
 195
 196/**
 197 * radeon_gart_table_vram_free - free gart page table vram
 198 *
 199 * @rdev: radeon_device pointer
 200 *
 201 * Free the video memory used for the GART page table
 202 * (pcie r4xx, r5xx+).  These asics require the gart table to
 203 * be in video memory.
 204 */
 205void radeon_gart_table_vram_free(struct radeon_device *rdev)
 206{
 207        if (rdev->gart.robj == NULL) {
 208                return;
 209        }
 210        radeon_gart_table_vram_unpin(rdev);
 211        radeon_bo_unref(&rdev->gart.robj);
 212}
 213
 214/*
 215 * Common gart functions.
 216 */
 217/**
 218 * radeon_gart_unbind - unbind pages from the gart page table
 219 *
 220 * @rdev: radeon_device pointer
 221 * @offset: offset into the GPU's gart aperture
 222 * @pages: number of pages to unbind
 223 *
 224 * Unbinds the requested pages from the gart page table and
 225 * replaces them with the dummy page (all asics).
 226 */
 227void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
 228                        int pages)
 229{
 230        unsigned t;
 231        unsigned p;
 232        int i, j;
 233        u64 page_base;
 234
 235        if (!rdev->gart.ready) {
 236                WARN(1, "trying to unbind memory from uninitialized GART !\n");
 237                return;
 238        }
 239        t = offset / RADEON_GPU_PAGE_SIZE;
 240        p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 241        for (i = 0; i < pages; i++, p++) {
 242                if (rdev->gart.pages[p]) {
 243                        rdev->gart.pages[p] = NULL;
 244                        rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
 245                        page_base = rdev->gart.pages_addr[p];
 246                        for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
 247                                if (rdev->gart.ptr) {
 248                                        radeon_gart_set_page(rdev, t, page_base);
 249                                }
 250                                page_base += RADEON_GPU_PAGE_SIZE;
 251                        }
 252                }
 253        }
 254        mb();
 255        radeon_gart_tlb_flush(rdev);
 256}
 257
 258/**
 259 * radeon_gart_bind - bind pages into the gart page table
 260 *
 261 * @rdev: radeon_device pointer
 262 * @offset: offset into the GPU's gart aperture
 263 * @pages: number of pages to bind
 264 * @pagelist: pages to bind
 265 * @dma_addr: DMA addresses of pages
 266 *
 267 * Binds the requested pages to the gart page table
 268 * (all asics).
 269 * Returns 0 for success, -EINVAL for failure.
 270 */
 271int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
 272                     int pages, struct page **pagelist, dma_addr_t *dma_addr)
 273{
 274        unsigned t;
 275        unsigned p;
 276        uint64_t page_base;
 277        int i, j;
 278
 279        if (!rdev->gart.ready) {
 280                WARN(1, "trying to bind memory to uninitialized GART !\n");
 281                return -EINVAL;
 282        }
 283        t = offset / RADEON_GPU_PAGE_SIZE;
 284        p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
 285
 286        for (i = 0; i < pages; i++, p++) {
 287                rdev->gart.pages_addr[p] = dma_addr[i];
 288                rdev->gart.pages[p] = pagelist[i];
 289                if (rdev->gart.ptr) {
 290                        page_base = rdev->gart.pages_addr[p];
 291                        for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
 292                                radeon_gart_set_page(rdev, t, page_base);
 293                                page_base += RADEON_GPU_PAGE_SIZE;
 294                        }
 295                }
 296        }
 297        mb();
 298        radeon_gart_tlb_flush(rdev);
 299        return 0;
 300}
 301
 302/**
 303 * radeon_gart_restore - bind all pages in the gart page table
 304 *
 305 * @rdev: radeon_device pointer
 306 *
 307 * Binds all pages in the gart page table (all asics).
 308 * Used to rebuild the gart table on device startup or resume.
 309 */
 310void radeon_gart_restore(struct radeon_device *rdev)
 311{
 312        int i, j, t;
 313        u64 page_base;
 314
 315        if (!rdev->gart.ptr) {
 316                return;
 317        }
 318        for (i = 0, t = 0; i < rdev->gart.num_cpu_pages; i++) {
 319                page_base = rdev->gart.pages_addr[i];
 320                for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
 321                        radeon_gart_set_page(rdev, t, page_base);
 322                        page_base += RADEON_GPU_PAGE_SIZE;
 323                }
 324        }
 325        mb();
 326        radeon_gart_tlb_flush(rdev);
 327}
 328
 329/**
 330 * radeon_gart_init - init the driver info for managing the gart
 331 *
 332 * @rdev: radeon_device pointer
 333 *
 334 * Allocate the dummy page and init the gart driver info (all asics).
 335 * Returns 0 for success, error for failure.
 336 */
 337int radeon_gart_init(struct radeon_device *rdev)
 338{
 339        int r, i;
 340
 341        if (rdev->gart.pages) {
 342                return 0;
 343        }
 344        /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
 345        if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
 346                DRM_ERROR("Page size is smaller than GPU page size!\n");
 347                return -EINVAL;
 348        }
 349        r = radeon_dummy_page_init(rdev);
 350        if (r)
 351                return r;
 352        /* Compute table size */
 353        rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
 354        rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
 355        DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
 356                 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
 357        /* Allocate pages table */
 358        rdev->gart.pages = vzalloc(sizeof(void *) * rdev->gart.num_cpu_pages);
 359        if (rdev->gart.pages == NULL) {
 360                radeon_gart_fini(rdev);
 361                return -ENOMEM;
 362        }
 363        rdev->gart.pages_addr = vzalloc(sizeof(dma_addr_t) *
 364                                        rdev->gart.num_cpu_pages);
 365        if (rdev->gart.pages_addr == NULL) {
 366                radeon_gart_fini(rdev);
 367                return -ENOMEM;
 368        }
 369        /* set GART entry to point to the dummy page by default */
 370        for (i = 0; i < rdev->gart.num_cpu_pages; i++) {
 371                rdev->gart.pages_addr[i] = rdev->dummy_page.addr;
 372        }
 373        return 0;
 374}
 375
 376/**
 377 * radeon_gart_fini - tear down the driver info for managing the gart
 378 *
 379 * @rdev: radeon_device pointer
 380 *
 381 * Tear down the gart driver info and free the dummy page (all asics).
 382 */
 383void radeon_gart_fini(struct radeon_device *rdev)
 384{
 385        if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) {
 386                /* unbind pages */
 387                radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
 388        }
 389        rdev->gart.ready = false;
 390        vfree(rdev->gart.pages);
 391        vfree(rdev->gart.pages_addr);
 392        rdev->gart.pages = NULL;
 393        rdev->gart.pages_addr = NULL;
 394
 395        radeon_dummy_page_fini(rdev);
 396}
 397
 398/*
 399 * GPUVM
 400 * GPUVM is similar to the legacy gart on older asics, however
 401 * rather than there being a single global gart table
 402 * for the entire GPU, there are multiple VM page tables active
 403 * at any given time.  The VM page tables can contain a mix
 404 * vram pages and system memory pages and system memory pages
 405 * can be mapped as snooped (cached system pages) or unsnooped
 406 * (uncached system pages).
 407 * Each VM has an ID associated with it and there is a page table
 408 * associated with each VMID.  When execting a command buffer,
 409 * the kernel tells the the ring what VMID to use for that command
 410 * buffer.  VMIDs are allocated dynamically as commands are submitted.
 411 * The userspace drivers maintain their own address space and the kernel
 412 * sets up their pages tables accordingly when they submit their
 413 * command buffers and a VMID is assigned.
 414 * Cayman/Trinity support up to 8 active VMs at any given time;
 415 * SI supports 16.
 416 */
 417
 418/*
 419 * vm helpers
 420 *
 421 * TODO bind a default page at vm initialization for default address
 422 */
 423
 424/**
 425 * radeon_vm_num_pde - return the number of page directory entries
 426 *
 427 * @rdev: radeon_device pointer
 428 *
 429 * Calculate the number of page directory entries (cayman+).
 430 */
 431static unsigned radeon_vm_num_pdes(struct radeon_device *rdev)
 432{
 433        return rdev->vm_manager.max_pfn >> RADEON_VM_BLOCK_SIZE;
 434}
 435
 436/**
 437 * radeon_vm_directory_size - returns the size of the page directory in bytes
 438 *
 439 * @rdev: radeon_device pointer
 440 *
 441 * Calculate the size of the page directory in bytes (cayman+).
 442 */
 443static unsigned radeon_vm_directory_size(struct radeon_device *rdev)
 444{
 445        return RADEON_GPU_PAGE_ALIGN(radeon_vm_num_pdes(rdev) * 8);
 446}
 447
 448/**
 449 * radeon_vm_manager_init - init the vm manager
 450 *
 451 * @rdev: radeon_device pointer
 452 *
 453 * Init the vm manager (cayman+).
 454 * Returns 0 for success, error for failure.
 455 */
 456int radeon_vm_manager_init(struct radeon_device *rdev)
 457{
 458        struct radeon_vm *vm;
 459        struct radeon_bo_va *bo_va;
 460        int r;
 461        unsigned size;
 462
 463        if (!rdev->vm_manager.enabled) {
 464                /* allocate enough for 2 full VM pts */
 465                size = radeon_vm_directory_size(rdev);
 466                size += rdev->vm_manager.max_pfn * 8;
 467                size *= 2;
 468                r = radeon_sa_bo_manager_init(rdev, &rdev->vm_manager.sa_manager,
 469                                              RADEON_GPU_PAGE_ALIGN(size),
 470                                              RADEON_GEM_DOMAIN_VRAM);
 471                if (r) {
 472                        dev_err(rdev->dev, "failed to allocate vm bo (%dKB)\n",
 473                                (rdev->vm_manager.max_pfn * 8) >> 10);
 474                        return r;
 475                }
 476
 477                r = radeon_asic_vm_init(rdev);
 478                if (r)
 479                        return r;
 480
 481                rdev->vm_manager.enabled = true;
 482
 483                r = radeon_sa_bo_manager_start(rdev, &rdev->vm_manager.sa_manager);
 484                if (r)
 485                        return r;
 486        }
 487
 488        /* restore page table */
 489        list_for_each_entry(vm, &rdev->vm_manager.lru_vm, list) {
 490                if (vm->page_directory == NULL)
 491                        continue;
 492
 493                list_for_each_entry(bo_va, &vm->va, vm_list) {
 494                        bo_va->valid = false;
 495                }
 496        }
 497        return 0;
 498}
 499
 500/**
 501 * radeon_vm_free_pt - free the page table for a specific vm
 502 *
 503 * @rdev: radeon_device pointer
 504 * @vm: vm to unbind
 505 *
 506 * Free the page table of a specific vm (cayman+).
 507 *
 508 * Global and local mutex must be lock!
 509 */
 510static void radeon_vm_free_pt(struct radeon_device *rdev,
 511                                    struct radeon_vm *vm)
 512{
 513        struct radeon_bo_va *bo_va;
 514        int i;
 515
 516        if (!vm->page_directory)
 517                return;
 518
 519        list_del_init(&vm->list);
 520        radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
 521
 522        list_for_each_entry(bo_va, &vm->va, vm_list) {
 523                bo_va->valid = false;
 524        }
 525
 526        if (vm->page_tables == NULL)
 527                return;
 528
 529        for (i = 0; i < radeon_vm_num_pdes(rdev); i++)
 530                radeon_sa_bo_free(rdev, &vm->page_tables[i], vm->fence);
 531
 532        kfree(vm->page_tables);
 533}
 534
 535/**
 536 * radeon_vm_manager_fini - tear down the vm manager
 537 *
 538 * @rdev: radeon_device pointer
 539 *
 540 * Tear down the VM manager (cayman+).
 541 */
 542void radeon_vm_manager_fini(struct radeon_device *rdev)
 543{
 544        struct radeon_vm *vm, *tmp;
 545        int i;
 546
 547        if (!rdev->vm_manager.enabled)
 548                return;
 549
 550        mutex_lock(&rdev->vm_manager.lock);
 551        /* free all allocated page tables */
 552        list_for_each_entry_safe(vm, tmp, &rdev->vm_manager.lru_vm, list) {
 553                mutex_lock(&vm->mutex);
 554                radeon_vm_free_pt(rdev, vm);
 555                mutex_unlock(&vm->mutex);
 556        }
 557        for (i = 0; i < RADEON_NUM_VM; ++i) {
 558                radeon_fence_unref(&rdev->vm_manager.active[i]);
 559        }
 560        radeon_asic_vm_fini(rdev);
 561        mutex_unlock(&rdev->vm_manager.lock);
 562
 563        radeon_sa_bo_manager_suspend(rdev, &rdev->vm_manager.sa_manager);
 564        radeon_sa_bo_manager_fini(rdev, &rdev->vm_manager.sa_manager);
 565        rdev->vm_manager.enabled = false;
 566}
 567
 568/**
 569 * radeon_vm_evict - evict page table to make room for new one
 570 *
 571 * @rdev: radeon_device pointer
 572 * @vm: VM we want to allocate something for
 573 *
 574 * Evict a VM from the lru, making sure that it isn't @vm. (cayman+).
 575 * Returns 0 for success, -ENOMEM for failure.
 576 *
 577 * Global and local mutex must be locked!
 578 */
 579static int radeon_vm_evict(struct radeon_device *rdev, struct radeon_vm *vm)
 580{
 581        struct radeon_vm *vm_evict;
 582
 583        if (list_empty(&rdev->vm_manager.lru_vm))
 584                return -ENOMEM;
 585
 586        vm_evict = list_first_entry(&rdev->vm_manager.lru_vm,
 587                                    struct radeon_vm, list);
 588        if (vm_evict == vm)
 589                return -ENOMEM;
 590
 591        mutex_lock(&vm_evict->mutex);
 592        radeon_vm_free_pt(rdev, vm_evict);
 593        mutex_unlock(&vm_evict->mutex);
 594        return 0;
 595}
 596
 597/**
 598 * radeon_vm_alloc_pt - allocates a page table for a VM
 599 *
 600 * @rdev: radeon_device pointer
 601 * @vm: vm to bind
 602 *
 603 * Allocate a page table for the requested vm (cayman+).
 604 * Returns 0 for success, error for failure.
 605 *
 606 * Global and local mutex must be locked!
 607 */
 608int radeon_vm_alloc_pt(struct radeon_device *rdev, struct radeon_vm *vm)
 609{
 610        unsigned pd_size, pts_size;
 611        u64 *pd_addr;
 612        int r;
 613
 614        if (vm == NULL) {
 615                return -EINVAL;
 616        }
 617
 618        if (vm->page_directory != NULL) {
 619                return 0;
 620        }
 621
 622retry:
 623        pd_size = RADEON_GPU_PAGE_ALIGN(radeon_vm_directory_size(rdev));
 624        r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
 625                             &vm->page_directory, pd_size,
 626                             RADEON_GPU_PAGE_SIZE, false);
 627        if (r == -ENOMEM) {
 628                r = radeon_vm_evict(rdev, vm);
 629                if (r)
 630                        return r;
 631                goto retry;
 632
 633        } else if (r) {
 634                return r;
 635        }
 636
 637        vm->pd_gpu_addr = radeon_sa_bo_gpu_addr(vm->page_directory);
 638
 639        /* Initially clear the page directory */
 640        pd_addr = radeon_sa_bo_cpu_addr(vm->page_directory);
 641        memset(pd_addr, 0, pd_size);
 642
 643        pts_size = radeon_vm_num_pdes(rdev) * sizeof(struct radeon_sa_bo *);
 644        vm->page_tables = kzalloc(pts_size, GFP_KERNEL);
 645
 646        if (vm->page_tables == NULL) {
 647                DRM_ERROR("Cannot allocate memory for page table array\n");
 648                radeon_sa_bo_free(rdev, &vm->page_directory, vm->fence);
 649                return -ENOMEM;
 650        }
 651
 652        return 0;
 653}
 654
 655/**
 656 * radeon_vm_add_to_lru - add VMs page table to LRU list
 657 *
 658 * @rdev: radeon_device pointer
 659 * @vm: vm to add to LRU
 660 *
 661 * Add the allocated page table to the LRU list (cayman+).
 662 *
 663 * Global mutex must be locked!
 664 */
 665void radeon_vm_add_to_lru(struct radeon_device *rdev, struct radeon_vm *vm)
 666{
 667        list_del_init(&vm->list);
 668        list_add_tail(&vm->list, &rdev->vm_manager.lru_vm);
 669}
 670
 671/**
 672 * radeon_vm_grab_id - allocate the next free VMID
 673 *
 674 * @rdev: radeon_device pointer
 675 * @vm: vm to allocate id for
 676 * @ring: ring we want to submit job to
 677 *
 678 * Allocate an id for the vm (cayman+).
 679 * Returns the fence we need to sync to (if any).
 680 *
 681 * Global and local mutex must be locked!
 682 */
 683struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev,
 684                                       struct radeon_vm *vm, int ring)
 685{
 686        struct radeon_fence *best[RADEON_NUM_RINGS] = {};
 687        unsigned choices[2] = {};
 688        unsigned i;
 689
 690        /* check if the id is still valid */
 691        if (vm->fence && vm->fence == rdev->vm_manager.active[vm->id])
 692                return NULL;
 693
 694        /* we definately need to flush */
 695        radeon_fence_unref(&vm->last_flush);
 696
 697        /* skip over VMID 0, since it is the system VM */
 698        for (i = 1; i < rdev->vm_manager.nvm; ++i) {
 699                struct radeon_fence *fence = rdev->vm_manager.active[i];
 700
 701                if (fence == NULL) {
 702                        /* found a free one */
 703                        vm->id = i;
 704                        return NULL;
 705                }
 706
 707                if (radeon_fence_is_earlier(fence, best[fence->ring])) {
 708                        best[fence->ring] = fence;
 709                        choices[fence->ring == ring ? 0 : 1] = i;
 710                }
 711        }
 712
 713        for (i = 0; i < 2; ++i) {
 714                if (choices[i]) {
 715                        vm->id = choices[i];
 716                        return rdev->vm_manager.active[choices[i]];
 717                }
 718        }
 719
 720        /* should never happen */
 721        BUG();
 722        return NULL;
 723}
 724
 725/**
 726 * radeon_vm_fence - remember fence for vm
 727 *
 728 * @rdev: radeon_device pointer
 729 * @vm: vm we want to fence
 730 * @fence: fence to remember
 731 *
 732 * Fence the vm (cayman+).
 733 * Set the fence used to protect page table and id.
 734 *
 735 * Global and local mutex must be locked!
 736 */
 737void radeon_vm_fence(struct radeon_device *rdev,
 738                     struct radeon_vm *vm,
 739                     struct radeon_fence *fence)
 740{
 741        radeon_fence_unref(&rdev->vm_manager.active[vm->id]);
 742        rdev->vm_manager.active[vm->id] = radeon_fence_ref(fence);
 743
 744        radeon_fence_unref(&vm->fence);
 745        vm->fence = radeon_fence_ref(fence);
 746}
 747
 748/**
 749 * radeon_vm_bo_find - find the bo_va for a specific vm & bo
 750 *
 751 * @vm: requested vm
 752 * @bo: requested buffer object
 753 *
 754 * Find @bo inside the requested vm (cayman+).
 755 * Search inside the @bos vm list for the requested vm
 756 * Returns the found bo_va or NULL if none is found
 757 *
 758 * Object has to be reserved!
 759 */
 760struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm,
 761                                       struct radeon_bo *bo)
 762{
 763        struct radeon_bo_va *bo_va;
 764
 765        list_for_each_entry(bo_va, &bo->va, bo_list) {
 766                if (bo_va->vm == vm) {
 767                        return bo_va;
 768                }
 769        }
 770        return NULL;
 771}
 772
 773/**
 774 * radeon_vm_bo_add - add a bo to a specific vm
 775 *
 776 * @rdev: radeon_device pointer
 777 * @vm: requested vm
 778 * @bo: radeon buffer object
 779 *
 780 * Add @bo into the requested vm (cayman+).
 781 * Add @bo to the list of bos associated with the vm
 782 * Returns newly added bo_va or NULL for failure
 783 *
 784 * Object has to be reserved!
 785 */
 786struct radeon_bo_va *radeon_vm_bo_add(struct radeon_device *rdev,
 787                                      struct radeon_vm *vm,
 788                                      struct radeon_bo *bo)
 789{
 790        struct radeon_bo_va *bo_va;
 791
 792        bo_va = kzalloc(sizeof(struct radeon_bo_va), GFP_KERNEL);
 793        if (bo_va == NULL) {
 794                return NULL;
 795        }
 796        bo_va->vm = vm;
 797        bo_va->bo = bo;
 798        bo_va->soffset = 0;
 799        bo_va->eoffset = 0;
 800        bo_va->flags = 0;
 801        bo_va->valid = false;
 802        bo_va->ref_count = 1;
 803        INIT_LIST_HEAD(&bo_va->bo_list);
 804        INIT_LIST_HEAD(&bo_va->vm_list);
 805
 806        mutex_lock(&vm->mutex);
 807        list_add(&bo_va->vm_list, &vm->va);
 808        list_add_tail(&bo_va->bo_list, &bo->va);
 809        mutex_unlock(&vm->mutex);
 810
 811        return bo_va;
 812}
 813
 814/**
 815 * radeon_vm_bo_set_addr - set bos virtual address inside a vm
 816 *
 817 * @rdev: radeon_device pointer
 818 * @bo_va: bo_va to store the address
 819 * @soffset: requested offset of the buffer in the VM address space
 820 * @flags: attributes of pages (read/write/valid/etc.)
 821 *
 822 * Set offset of @bo_va (cayman+).
 823 * Validate and set the offset requested within the vm address space.
 824 * Returns 0 for success, error for failure.
 825 *
 826 * Object has to be reserved!
 827 */
 828int radeon_vm_bo_set_addr(struct radeon_device *rdev,
 829                          struct radeon_bo_va *bo_va,
 830                          uint64_t soffset,
 831                          uint32_t flags)
 832{
 833        uint64_t size = radeon_bo_size(bo_va->bo);
 834        uint64_t eoffset, last_offset = 0;
 835        struct radeon_vm *vm = bo_va->vm;
 836        struct radeon_bo_va *tmp;
 837        struct list_head *head;
 838        unsigned last_pfn;
 839
 840        if (soffset) {
 841                /* make sure object fit at this offset */
 842                eoffset = soffset + size;
 843                if (soffset >= eoffset) {
 844                        return -EINVAL;
 845                }
 846
 847                last_pfn = eoffset / RADEON_GPU_PAGE_SIZE;
 848                if (last_pfn > rdev->vm_manager.max_pfn) {
 849                        dev_err(rdev->dev, "va above limit (0x%08X > 0x%08X)\n",
 850                                last_pfn, rdev->vm_manager.max_pfn);
 851                        return -EINVAL;
 852                }
 853
 854        } else {
 855                eoffset = last_pfn = 0;
 856        }
 857
 858        mutex_lock(&vm->mutex);
 859        head = &vm->va;
 860        last_offset = 0;
 861        list_for_each_entry(tmp, &vm->va, vm_list) {
 862                if (bo_va == tmp) {
 863                        /* skip over currently modified bo */
 864                        continue;
 865                }
 866
 867                if (soffset >= last_offset && eoffset <= tmp->soffset) {
 868                        /* bo can be added before this one */
 869                        break;
 870                }
 871                if (eoffset > tmp->soffset && soffset < tmp->eoffset) {
 872                        /* bo and tmp overlap, invalid offset */
 873                        dev_err(rdev->dev, "bo %p va 0x%08X conflict with (bo %p 0x%08X 0x%08X)\n",
 874                                bo_va->bo, (unsigned)bo_va->soffset, tmp->bo,
 875                                (unsigned)tmp->soffset, (unsigned)tmp->eoffset);
 876                        mutex_unlock(&vm->mutex);
 877                        return -EINVAL;
 878                }
 879                last_offset = tmp->eoffset;
 880                head = &tmp->vm_list;
 881        }
 882
 883        bo_va->soffset = soffset;
 884        bo_va->eoffset = eoffset;
 885        bo_va->flags = flags;
 886        bo_va->valid = false;
 887        list_move(&bo_va->vm_list, head);
 888
 889        mutex_unlock(&vm->mutex);
 890        return 0;
 891}
 892
 893/**
 894 * radeon_vm_map_gart - get the physical address of a gart page
 895 *
 896 * @rdev: radeon_device pointer
 897 * @addr: the unmapped addr
 898 *
 899 * Look up the physical address of the page that the pte resolves
 900 * to (cayman+).
 901 * Returns the physical address of the page.
 902 */
 903uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr)
 904{
 905        uint64_t result;
 906
 907        /* page table offset */
 908        result = rdev->gart.pages_addr[addr >> PAGE_SHIFT];
 909
 910        /* in case cpu page size != gpu page size*/
 911        result |= addr & (~PAGE_MASK);
 912
 913        return result;
 914}
 915
 916/**
 917 * radeon_vm_update_pdes - make sure that page directory is valid
 918 *
 919 * @rdev: radeon_device pointer
 920 * @vm: requested vm
 921 * @start: start of GPU address range
 922 * @end: end of GPU address range
 923 *
 924 * Allocates new page tables if necessary
 925 * and updates the page directory (cayman+).
 926 * Returns 0 for success, error for failure.
 927 *
 928 * Global and local mutex must be locked!
 929 */
 930static int radeon_vm_update_pdes(struct radeon_device *rdev,
 931                                 struct radeon_vm *vm,
 932                                 struct radeon_ib *ib,
 933                                 uint64_t start, uint64_t end)
 934{
 935        static const uint32_t incr = RADEON_VM_PTE_COUNT * 8;
 936
 937        uint64_t last_pde = ~0, last_pt = ~0;
 938        unsigned count = 0;
 939        uint64_t pt_idx;
 940        int r;
 941
 942        start = (start / RADEON_GPU_PAGE_SIZE) >> RADEON_VM_BLOCK_SIZE;
 943        end = (end / RADEON_GPU_PAGE_SIZE) >> RADEON_VM_BLOCK_SIZE;
 944
 945        /* walk over the address space and update the page directory */
 946        for (pt_idx = start; pt_idx <= end; ++pt_idx) {
 947                uint64_t pde, pt;
 948
 949                if (vm->page_tables[pt_idx])
 950                        continue;
 951
 952retry:
 953                r = radeon_sa_bo_new(rdev, &rdev->vm_manager.sa_manager,
 954                                     &vm->page_tables[pt_idx],
 955                                     RADEON_VM_PTE_COUNT * 8,
 956                                     RADEON_GPU_PAGE_SIZE, false);
 957
 958                if (r == -ENOMEM) {
 959                        r = radeon_vm_evict(rdev, vm);
 960                        if (r)
 961                                return r;
 962                        goto retry;
 963                } else if (r) {
 964                        return r;
 965                }
 966
 967                pde = vm->pd_gpu_addr + pt_idx * 8;
 968
 969                pt = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
 970
 971                if (((last_pde + 8 * count) != pde) ||
 972                    ((last_pt + incr * count) != pt)) {
 973
 974                        if (count) {
 975                                radeon_asic_vm_set_page(rdev, ib, last_pde,
 976                                                        last_pt, count, incr,
 977                                                        RADEON_VM_PAGE_VALID);
 978                        }
 979
 980                        count = 1;
 981                        last_pde = pde;
 982                        last_pt = pt;
 983                } else {
 984                        ++count;
 985                }
 986        }
 987
 988        if (count) {
 989                radeon_asic_vm_set_page(rdev, ib, last_pde, last_pt, count,
 990                                        incr, RADEON_VM_PAGE_VALID);
 991
 992        }
 993
 994        return 0;
 995}
 996
 997/**
 998 * radeon_vm_update_ptes - make sure that page tables are valid
 999 *
1000 * @rdev: radeon_device pointer
1001 * @vm: requested vm
1002 * @start: start of GPU address range
1003 * @end: end of GPU address range
1004 * @dst: destination address to map to
1005 * @flags: mapping flags
1006 *
1007 * Update the page tables in the range @start - @end (cayman+).
1008 *
1009 * Global and local mutex must be locked!
1010 */
1011static void radeon_vm_update_ptes(struct radeon_device *rdev,
1012                                  struct radeon_vm *vm,
1013                                  struct radeon_ib *ib,
1014                                  uint64_t start, uint64_t end,
1015                                  uint64_t dst, uint32_t flags)
1016{
1017        static const uint64_t mask = RADEON_VM_PTE_COUNT - 1;
1018
1019        uint64_t last_pte = ~0, last_dst = ~0;
1020        unsigned count = 0;
1021        uint64_t addr;
1022
1023        start = start / RADEON_GPU_PAGE_SIZE;
1024        end = end / RADEON_GPU_PAGE_SIZE;
1025
1026        /* walk over the address space and update the page tables */
1027        for (addr = start; addr < end; ) {
1028                uint64_t pt_idx = addr >> RADEON_VM_BLOCK_SIZE;
1029                unsigned nptes;
1030                uint64_t pte;
1031
1032                if ((addr & ~mask) == (end & ~mask))
1033                        nptes = end - addr;
1034                else
1035                        nptes = RADEON_VM_PTE_COUNT - (addr & mask);
1036
1037                pte = radeon_sa_bo_gpu_addr(vm->page_tables[pt_idx]);
1038                pte += (addr & mask) * 8;
1039
1040                if ((last_pte + 8 * count) != pte) {
1041
1042                        if (count) {
1043                                radeon_asic_vm_set_page(rdev, ib, last_pte,
1044                                                        last_dst, count,
1045                                                        RADEON_GPU_PAGE_SIZE,
1046                                                        flags);
1047                        }
1048
1049                        count = nptes;
1050                        last_pte = pte;
1051                        last_dst = dst;
1052                } else {
1053                        count += nptes;
1054                }
1055
1056                addr += nptes;
1057                dst += nptes * RADEON_GPU_PAGE_SIZE;
1058        }
1059
1060        if (count) {
1061                radeon_asic_vm_set_page(rdev, ib, last_pte,
1062                                        last_dst, count,
1063                                        RADEON_GPU_PAGE_SIZE, flags);
1064        }
1065}
1066
1067/**
1068 * radeon_vm_bo_update_pte - map a bo into the vm page table
1069 *
1070 * @rdev: radeon_device pointer
1071 * @vm: requested vm
1072 * @bo: radeon buffer object
1073 * @mem: ttm mem
1074 *
1075 * Fill in the page table entries for @bo (cayman+).
1076 * Returns 0 for success, -EINVAL for failure.
1077 *
1078 * Object have to be reserved & global and local mutex must be locked!
1079 */
1080int radeon_vm_bo_update_pte(struct radeon_device *rdev,
1081                            struct radeon_vm *vm,
1082                            struct radeon_bo *bo,
1083                            struct ttm_mem_reg *mem)
1084{
1085        unsigned ridx = rdev->asic->vm.pt_ring_index;
1086        struct radeon_ib ib;
1087        struct radeon_bo_va *bo_va;
1088        unsigned nptes, npdes, ndw;
1089        uint64_t addr;
1090        int r;
1091
1092        /* nothing to do if vm isn't bound */
1093        if (vm->page_directory == NULL)
1094                return 0;
1095
1096        bo_va = radeon_vm_bo_find(vm, bo);
1097        if (bo_va == NULL) {
1098                dev_err(rdev->dev, "bo %p not in vm %p\n", bo, vm);
1099                return -EINVAL;
1100        }
1101
1102        if (!bo_va->soffset) {
1103                dev_err(rdev->dev, "bo %p don't has a mapping in vm %p\n",
1104                        bo, vm);
1105                return -EINVAL;
1106        }
1107
1108        if ((bo_va->valid && mem) || (!bo_va->valid && mem == NULL))
1109                return 0;
1110
1111        bo_va->flags &= ~RADEON_VM_PAGE_VALID;
1112        bo_va->flags &= ~RADEON_VM_PAGE_SYSTEM;
1113        if (mem) {
1114                addr = mem->start << PAGE_SHIFT;
1115                if (mem->mem_type != TTM_PL_SYSTEM) {
1116                        bo_va->flags |= RADEON_VM_PAGE_VALID;
1117                        bo_va->valid = true;
1118                }
1119                if (mem->mem_type == TTM_PL_TT) {
1120                        bo_va->flags |= RADEON_VM_PAGE_SYSTEM;
1121                } else {
1122                        addr += rdev->vm_manager.vram_base_offset;
1123                }
1124        } else {
1125                addr = 0;
1126                bo_va->valid = false;
1127        }
1128
1129        nptes = radeon_bo_ngpu_pages(bo);
1130
1131        /* assume two extra pdes in case the mapping overlaps the borders */
1132        npdes = (nptes >> RADEON_VM_BLOCK_SIZE) + 2;
1133
1134        /* padding, etc. */
1135        ndw = 64;
1136
1137        if (RADEON_VM_BLOCK_SIZE > 11)
1138                /* reserve space for one header for every 2k dwords */
1139                ndw += (nptes >> 11) * 4;
1140        else
1141                /* reserve space for one header for
1142                    every (1 << BLOCK_SIZE) entries */
1143                ndw += (nptes >> RADEON_VM_BLOCK_SIZE) * 4;
1144
1145        /* reserve space for pte addresses */
1146        ndw += nptes * 2;
1147
1148        /* reserve space for one header for every 2k dwords */
1149        ndw += (npdes >> 11) * 4;
1150
1151        /* reserve space for pde addresses */
1152        ndw += npdes * 2;
1153
1154        /* update too big for an IB */
1155        if (ndw > 0xfffff)
1156                return -ENOMEM;
1157
1158        r = radeon_ib_get(rdev, ridx, &ib, NULL, ndw * 4);
1159        ib.length_dw = 0;
1160
1161        r = radeon_vm_update_pdes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset);
1162        if (r) {
1163                radeon_ib_free(rdev, &ib);
1164                return r;
1165        }
1166
1167        radeon_vm_update_ptes(rdev, vm, &ib, bo_va->soffset, bo_va->eoffset,
1168                              addr, bo_va->flags);
1169
1170        radeon_ib_sync_to(&ib, vm->fence);
1171        r = radeon_ib_schedule(rdev, &ib, NULL);
1172        if (r) {
1173                radeon_ib_free(rdev, &ib);
1174                return r;
1175        }
1176        radeon_fence_unref(&vm->fence);
1177        vm->fence = radeon_fence_ref(ib.fence);
1178        radeon_ib_free(rdev, &ib);
1179        radeon_fence_unref(&vm->last_flush);
1180
1181        return 0;
1182}
1183
1184/**
1185 * radeon_vm_bo_rmv - remove a bo to a specific vm
1186 *
1187 * @rdev: radeon_device pointer
1188 * @bo_va: requested bo_va
1189 *
1190 * Remove @bo_va->bo from the requested vm (cayman+).
1191 * Remove @bo_va->bo from the list of bos associated with the bo_va->vm and
1192 * remove the ptes for @bo_va in the page table.
1193 * Returns 0 for success.
1194 *
1195 * Object have to be reserved!
1196 */
1197int radeon_vm_bo_rmv(struct radeon_device *rdev,
1198                     struct radeon_bo_va *bo_va)
1199{
1200        int r;
1201
1202        mutex_lock(&rdev->vm_manager.lock);
1203        mutex_lock(&bo_va->vm->mutex);
1204        r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL);
1205        mutex_unlock(&rdev->vm_manager.lock);
1206        list_del(&bo_va->vm_list);
1207        mutex_unlock(&bo_va->vm->mutex);
1208        list_del(&bo_va->bo_list);
1209
1210        kfree(bo_va);
1211        return r;
1212}
1213
1214/**
1215 * radeon_vm_bo_invalidate - mark the bo as invalid
1216 *
1217 * @rdev: radeon_device pointer
1218 * @vm: requested vm
1219 * @bo: radeon buffer object
1220 *
1221 * Mark @bo as invalid (cayman+).
1222 */
1223void radeon_vm_bo_invalidate(struct radeon_device *rdev,
1224                             struct radeon_bo *bo)
1225{
1226        struct radeon_bo_va *bo_va;
1227
1228        list_for_each_entry(bo_va, &bo->va, bo_list) {
1229                bo_va->valid = false;
1230        }
1231}
1232
1233/**
1234 * radeon_vm_init - initialize a vm instance
1235 *
1236 * @rdev: radeon_device pointer
1237 * @vm: requested vm
1238 *
1239 * Init @vm fields (cayman+).
1240 */
1241void radeon_vm_init(struct radeon_device *rdev, struct radeon_vm *vm)
1242{
1243        vm->id = 0;
1244        vm->fence = NULL;
1245        mutex_init(&vm->mutex);
1246        INIT_LIST_HEAD(&vm->list);
1247        INIT_LIST_HEAD(&vm->va);
1248}
1249
1250/**
1251 * radeon_vm_fini - tear down a vm instance
1252 *
1253 * @rdev: radeon_device pointer
1254 * @vm: requested vm
1255 *
1256 * Tear down @vm (cayman+).
1257 * Unbind the VM and remove all bos from the vm bo list
1258 */
1259void radeon_vm_fini(struct radeon_device *rdev, struct radeon_vm *vm)
1260{
1261        struct radeon_bo_va *bo_va, *tmp;
1262        int r;
1263
1264        mutex_lock(&rdev->vm_manager.lock);
1265        mutex_lock(&vm->mutex);
1266        radeon_vm_free_pt(rdev, vm);
1267        mutex_unlock(&rdev->vm_manager.lock);
1268
1269        if (!list_empty(&vm->va)) {
1270                dev_err(rdev->dev, "still active bo inside vm\n");
1271        }
1272        list_for_each_entry_safe(bo_va, tmp, &vm->va, vm_list) {
1273                list_del_init(&bo_va->vm_list);
1274                r = radeon_bo_reserve(bo_va->bo, false);
1275                if (!r) {
1276                        list_del_init(&bo_va->bo_list);
1277                        radeon_bo_unreserve(bo_va->bo);
1278                        kfree(bo_va);
1279                }
1280        }
1281        radeon_fence_unref(&vm->fence);
1282        radeon_fence_unref(&vm->last_flush);
1283        mutex_unlock(&vm->mutex);
1284}
1285