1#ifndef _BGMAC_H
2#define _BGMAC_H
3
4#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
5
6#define bgmac_err(bgmac, fmt, ...) \
7 dev_err(&(bgmac)->core->dev, fmt, ##__VA_ARGS__)
8#define bgmac_warn(bgmac, fmt, ...) \
9 dev_warn(&(bgmac)->core->dev, fmt, ##__VA_ARGS__)
10#define bgmac_info(bgmac, fmt, ...) \
11 dev_info(&(bgmac)->core->dev, fmt, ##__VA_ARGS__)
12#define bgmac_dbg(bgmac, fmt, ...) \
13 dev_dbg(&(bgmac)->core->dev, fmt, ##__VA_ARGS__)
14
15#include <linux/bcma/bcma.h>
16#include <linux/netdevice.h>
17
18#define BGMAC_DEV_CTL 0x000
19#define BGMAC_DC_TSM 0x00000002
20#define BGMAC_DC_CFCO 0x00000004
21#define BGMAC_DC_RLSS 0x00000008
22#define BGMAC_DC_MROR 0x00000010
23#define BGMAC_DC_FCM_MASK 0x00000060
24#define BGMAC_DC_FCM_SHIFT 5
25#define BGMAC_DC_NAE 0x00000080
26#define BGMAC_DC_TF 0x00000100
27#define BGMAC_DC_RDS_MASK 0x00030000
28#define BGMAC_DC_RDS_SHIFT 16
29#define BGMAC_DC_TDS_MASK 0x000c0000
30#define BGMAC_DC_TDS_SHIFT 18
31#define BGMAC_DEV_STATUS 0x004
32#define BGMAC_DS_RBF 0x00000001
33#define BGMAC_DS_RDF 0x00000002
34#define BGMAC_DS_RIF 0x00000004
35#define BGMAC_DS_TBF 0x00000008
36#define BGMAC_DS_TDF 0x00000010
37#define BGMAC_DS_TIF 0x00000020
38#define BGMAC_DS_PO 0x00000040
39#define BGMAC_DS_MM_MASK 0x00000300
40#define BGMAC_DS_MM_SHIFT 8
41#define BGMAC_BIST_STATUS 0x00c
42#define BGMAC_INT_STATUS 0x020
43#define BGMAC_IS_MRO 0x00000001
44#define BGMAC_IS_MTO 0x00000002
45#define BGMAC_IS_TFD 0x00000004
46#define BGMAC_IS_LS 0x00000008
47#define BGMAC_IS_MDIO 0x00000010
48#define BGMAC_IS_MR 0x00000020
49#define BGMAC_IS_MT 0x00000040
50#define BGMAC_IS_TO 0x00000080
51#define BGMAC_IS_DESC_ERR 0x00000400
52#define BGMAC_IS_DATA_ERR 0x00000800
53#define BGMAC_IS_DESC_PROT_ERR 0x00001000
54#define BGMAC_IS_RX_DESC_UNDERF 0x00002000
55#define BGMAC_IS_RX_F_OVERF 0x00004000
56#define BGMAC_IS_TX_F_UNDERF 0x00008000
57#define BGMAC_IS_RX 0x00010000
58#define BGMAC_IS_TX0 0x01000000
59#define BGMAC_IS_TX1 0x02000000
60#define BGMAC_IS_TX2 0x04000000
61#define BGMAC_IS_TX3 0x08000000
62#define BGMAC_IS_TX_MASK 0x0f000000
63#define BGMAC_IS_INTMASK 0x0f01fcff
64#define BGMAC_IS_ERRMASK 0x0000fc00
65#define BGMAC_INT_MASK 0x024
66#define BGMAC_GP_TIMER 0x028
67#define BGMAC_INT_RECV_LAZY 0x100
68#define BGMAC_IRL_TO_MASK 0x00ffffff
69#define BGMAC_IRL_FC_MASK 0xff000000
70#define BGMAC_IRL_FC_SHIFT 24
71#define BGMAC_FLOW_CTL_THRESH 0x104
72#define BGMAC_WRRTHRESH 0x108
73#define BGMAC_GMAC_IDLE_CNT_THRESH 0x10c
74#define BGMAC_PHY_ACCESS 0x180
75#define BGMAC_PA_DATA_MASK 0x0000ffff
76#define BGMAC_PA_ADDR_MASK 0x001f0000
77#define BGMAC_PA_ADDR_SHIFT 16
78#define BGMAC_PA_REG_MASK 0x1f000000
79#define BGMAC_PA_REG_SHIFT 24
80#define BGMAC_PA_WRITE 0x20000000
81#define BGMAC_PA_START 0x40000000
82#define BGMAC_PHY_CNTL 0x188
83#define BGMAC_PC_EPA_MASK 0x0000001f
84#define BGMAC_PC_MCT_MASK 0x007f0000
85#define BGMAC_PC_MCT_SHIFT 16
86#define BGMAC_PC_MTE 0x00800000
87#define BGMAC_TXQ_CTL 0x18c
88#define BGMAC_TXQ_CTL_DBT_MASK 0x00000fff
89#define BGMAC_TXQ_CTL_DBT_SHIFT 0
90#define BGMAC_RXQ_CTL 0x190
91#define BGMAC_RXQ_CTL_DBT_MASK 0x00000fff
92#define BGMAC_RXQ_CTL_DBT_SHIFT 0
93#define BGMAC_RXQ_CTL_PTE 0x00001000
94#define BGMAC_RXQ_CTL_MDP_MASK 0x3f000000
95#define BGMAC_RXQ_CTL_MDP_SHIFT 24
96#define BGMAC_GPIO_SELECT 0x194
97#define BGMAC_GPIO_OUTPUT_EN 0x198
98
99#define BGMAC_HW_WAR 0x1e4
100#define BGMAC_PWR_CTL 0x1e8
101#define BGMAC_DMA_BASE0 0x200
102#define BGMAC_DMA_BASE1 0x240
103#define BGMAC_DMA_BASE2 0x280
104#define BGMAC_DMA_BASE3 0x2C0
105#define BGMAC_TX_GOOD_OCTETS 0x300
106#define BGMAC_TX_GOOD_OCTETS_HIGH 0x304
107#define BGMAC_TX_GOOD_PKTS 0x308
108#define BGMAC_TX_OCTETS 0x30c
109#define BGMAC_TX_OCTETS_HIGH 0x310
110#define BGMAC_TX_PKTS 0x314
111#define BGMAC_TX_BROADCAST_PKTS 0x318
112#define BGMAC_TX_MULTICAST_PKTS 0x31c
113#define BGMAC_TX_LEN_64 0x320
114#define BGMAC_TX_LEN_65_TO_127 0x324
115#define BGMAC_TX_LEN_128_TO_255 0x328
116#define BGMAC_TX_LEN_256_TO_511 0x32c
117#define BGMAC_TX_LEN_512_TO_1023 0x330
118#define BGMAC_TX_LEN_1024_TO_1522 0x334
119#define BGMAC_TX_LEN_1523_TO_2047 0x338
120#define BGMAC_TX_LEN_2048_TO_4095 0x33c
121#define BGMAC_TX_LEN_4095_TO_8191 0x340
122#define BGMAC_TX_LEN_8192_TO_MAX 0x344
123#define BGMAC_TX_JABBER_PKTS 0x348
124#define BGMAC_TX_OVERSIZE_PKTS 0x34c
125#define BGMAC_TX_FRAGMENT_PKTS 0x350
126#define BGMAC_TX_UNDERRUNS 0x354
127#define BGMAC_TX_TOTAL_COLS 0x358
128#define BGMAC_TX_SINGLE_COLS 0x35c
129#define BGMAC_TX_MULTIPLE_COLS 0x360
130#define BGMAC_TX_EXCESSIVE_COLS 0x364
131#define BGMAC_TX_LATE_COLS 0x368
132#define BGMAC_TX_DEFERED 0x36c
133#define BGMAC_TX_CARRIER_LOST 0x370
134#define BGMAC_TX_PAUSE_PKTS 0x374
135#define BGMAC_TX_UNI_PKTS 0x378
136#define BGMAC_TX_Q0_PKTS 0x37c
137#define BGMAC_TX_Q0_OCTETS 0x380
138#define BGMAC_TX_Q0_OCTETS_HIGH 0x384
139#define BGMAC_TX_Q1_PKTS 0x388
140#define BGMAC_TX_Q1_OCTETS 0x38c
141#define BGMAC_TX_Q1_OCTETS_HIGH 0x390
142#define BGMAC_TX_Q2_PKTS 0x394
143#define BGMAC_TX_Q2_OCTETS 0x398
144#define BGMAC_TX_Q2_OCTETS_HIGH 0x39c
145#define BGMAC_TX_Q3_PKTS 0x3a0
146#define BGMAC_TX_Q3_OCTETS 0x3a4
147#define BGMAC_TX_Q3_OCTETS_HIGH 0x3a8
148#define BGMAC_RX_GOOD_OCTETS 0x3b0
149#define BGMAC_RX_GOOD_OCTETS_HIGH 0x3b4
150#define BGMAC_RX_GOOD_PKTS 0x3b8
151#define BGMAC_RX_OCTETS 0x3bc
152#define BGMAC_RX_OCTETS_HIGH 0x3c0
153#define BGMAC_RX_PKTS 0x3c4
154#define BGMAC_RX_BROADCAST_PKTS 0x3c8
155#define BGMAC_RX_MULTICAST_PKTS 0x3cc
156#define BGMAC_RX_LEN_64 0x3d0
157#define BGMAC_RX_LEN_65_TO_127 0x3d4
158#define BGMAC_RX_LEN_128_TO_255 0x3d8
159#define BGMAC_RX_LEN_256_TO_511 0x3dc
160#define BGMAC_RX_LEN_512_TO_1023 0x3e0
161#define BGMAC_RX_LEN_1024_TO_1522 0x3e4
162#define BGMAC_RX_LEN_1523_TO_2047 0x3e8
163#define BGMAC_RX_LEN_2048_TO_4095 0x3ec
164#define BGMAC_RX_LEN_4095_TO_8191 0x3f0
165#define BGMAC_RX_LEN_8192_TO_MAX 0x3f4
166#define BGMAC_RX_JABBER_PKTS 0x3f8
167#define BGMAC_RX_OVERSIZE_PKTS 0x3fc
168#define BGMAC_RX_FRAGMENT_PKTS 0x400
169#define BGMAC_RX_MISSED_PKTS 0x404
170#define BGMAC_RX_CRC_ALIGN_ERRS 0x408
171#define BGMAC_RX_UNDERSIZE 0x40c
172#define BGMAC_RX_CRC_ERRS 0x410
173#define BGMAC_RX_ALIGN_ERRS 0x414
174#define BGMAC_RX_SYMBOL_ERRS 0x418
175#define BGMAC_RX_PAUSE_PKTS 0x41c
176#define BGMAC_RX_NONPAUSE_PKTS 0x420
177#define BGMAC_RX_SACHANGES 0x424
178#define BGMAC_RX_UNI_PKTS 0x428
179#define BGMAC_UNIMAC_VERSION 0x800
180#define BGMAC_HDBKP_CTL 0x804
181#define BGMAC_CMDCFG 0x808
182#define BGMAC_CMDCFG_TE 0x00000001
183#define BGMAC_CMDCFG_RE 0x00000002
184#define BGMAC_CMDCFG_ES_MASK 0x0000000c
185#define BGMAC_CMDCFG_ES_10 0x00000000
186#define BGMAC_CMDCFG_ES_100 0x00000004
187#define BGMAC_CMDCFG_ES_1000 0x00000008
188#define BGMAC_CMDCFG_PROM 0x00000010
189#define BGMAC_CMDCFG_PAD_EN 0x00000020
190#define BGMAC_CMDCFG_CF 0x00000040
191#define BGMAC_CMDCFG_PF 0x00000080
192#define BGMAC_CMDCFG_RPI 0x00000100
193#define BGMAC_CMDCFG_TAI 0x00000200
194#define BGMAC_CMDCFG_HD 0x00000400
195#define BGMAC_CMDCFG_HD_SHIFT 10
196#define BGMAC_CMDCFG_SR 0x00000800
197#define BGMAC_CMDCFG_ML 0x00008000
198#define BGMAC_CMDCFG_AE 0x00400000
199#define BGMAC_CMDCFG_CFE 0x00800000
200#define BGMAC_CMDCFG_NLC 0x01000000
201#define BGMAC_CMDCFG_RL 0x02000000
202#define BGMAC_CMDCFG_RED 0x04000000
203#define BGMAC_CMDCFG_PE 0x08000000
204#define BGMAC_CMDCFG_TPI 0x10000000
205#define BGMAC_CMDCFG_AT 0x20000000
206#define BGMAC_MACADDR_HIGH 0x80c
207#define BGMAC_MACADDR_LOW 0x810
208#define BGMAC_RXMAX_LENGTH 0x814
209#define BGMAC_PAUSEQUANTA 0x818
210#define BGMAC_MAC_MODE 0x844
211#define BGMAC_OUTERTAG 0x848
212#define BGMAC_INNERTAG 0x84c
213#define BGMAC_TXIPG 0x85c
214#define BGMAC_PAUSE_CTL 0xb30
215#define BGMAC_TX_FLUSH 0xb34
216#define BGMAC_RX_STATUS 0xb38
217#define BGMAC_TX_STATUS 0xb3c
218
219#define BGMAC_PHY_CTL 0x00
220#define BGMAC_PHY_CTL_SPEED_MSB 0x0040
221#define BGMAC_PHY_CTL_DUPLEX 0x0100
222#define BGMAC_PHY_CTL_RESTART 0x0200
223#define BGMAC_PHY_CTL_ANENAB 0x1000
224#define BGMAC_PHY_CTL_SPEED 0x2000
225#define BGMAC_PHY_CTL_LOOP 0x4000
226#define BGMAC_PHY_CTL_RESET 0x8000
227
228#define BGMAC_PHY_CTL_SPEED_10 0
229#define BGMAC_PHY_CTL_SPEED_100 BGMAC_PHY_CTL_SPEED
230#define BGMAC_PHY_CTL_SPEED_1000 BGMAC_PHY_CTL_SPEED_MSB
231#define BGMAC_PHY_ADV 0x04
232#define BGMAC_PHY_ADV_10HALF 0x0020
233#define BGMAC_PHY_ADV_10FULL 0x0040
234#define BGMAC_PHY_ADV_100HALF 0x0080
235#define BGMAC_PHY_ADV_100FULL 0x0100
236#define BGMAC_PHY_ADV2 0x09
237#define BGMAC_PHY_ADV2_1000HALF 0x0100
238#define BGMAC_PHY_ADV2_1000FULL 0x0200
239
240
241#define BGMAC_BCMA_IOCTL_SW_CLKEN 0x00000004
242#define BGMAC_BCMA_IOCTL_SW_RESET 0x00000008
243
244
245#define BGMAC_BCMA_IOST_ATTACHED 0x00000800
246
247#define BGMAC_NUM_MIB_TX_REGS \
248 (((BGMAC_TX_Q3_OCTETS_HIGH - BGMAC_TX_GOOD_OCTETS) / 4) + 1)
249#define BGMAC_NUM_MIB_RX_REGS \
250 (((BGMAC_RX_UNI_PKTS - BGMAC_RX_GOOD_OCTETS) / 4) + 1)
251
252#define BGMAC_DMA_TX_CTL 0x00
253#define BGMAC_DMA_TX_ENABLE 0x00000001
254#define BGMAC_DMA_TX_SUSPEND 0x00000002
255#define BGMAC_DMA_TX_LOOPBACK 0x00000004
256#define BGMAC_DMA_TX_FLUSH 0x00000010
257#define BGMAC_DMA_TX_PARITY_DISABLE 0x00000800
258#define BGMAC_DMA_TX_ADDREXT_MASK 0x00030000
259#define BGMAC_DMA_TX_ADDREXT_SHIFT 16
260#define BGMAC_DMA_TX_INDEX 0x04
261#define BGMAC_DMA_TX_RINGLO 0x08
262#define BGMAC_DMA_TX_RINGHI 0x0C
263#define BGMAC_DMA_TX_STATUS 0x10
264#define BGMAC_DMA_TX_STATDPTR 0x00001FFF
265#define BGMAC_DMA_TX_STAT 0xF0000000
266#define BGMAC_DMA_TX_STAT_DISABLED 0x00000000
267#define BGMAC_DMA_TX_STAT_ACTIVE 0x10000000
268#define BGMAC_DMA_TX_STAT_IDLEWAIT 0x20000000
269#define BGMAC_DMA_TX_STAT_STOPPED 0x30000000
270#define BGMAC_DMA_TX_STAT_SUSP 0x40000000
271#define BGMAC_DMA_TX_ERROR 0x14
272#define BGMAC_DMA_TX_ERRDPTR 0x0001FFFF
273#define BGMAC_DMA_TX_ERR 0xF0000000
274#define BGMAC_DMA_TX_ERR_NOERR 0x00000000
275#define BGMAC_DMA_TX_ERR_PROT 0x10000000
276#define BGMAC_DMA_TX_ERR_UNDERRUN 0x20000000
277#define BGMAC_DMA_TX_ERR_TRANSFER 0x30000000
278#define BGMAC_DMA_TX_ERR_DESCREAD 0x40000000
279#define BGMAC_DMA_TX_ERR_CORE 0x50000000
280#define BGMAC_DMA_RX_CTL 0x20
281#define BGMAC_DMA_RX_ENABLE 0x00000001
282#define BGMAC_DMA_RX_FRAME_OFFSET_MASK 0x000000FE
283#define BGMAC_DMA_RX_FRAME_OFFSET_SHIFT 1
284#define BGMAC_DMA_RX_DIRECT_FIFO 0x00000100
285#define BGMAC_DMA_RX_OVERFLOW_CONT 0x00000400
286#define BGMAC_DMA_RX_PARITY_DISABLE 0x00000800
287#define BGMAC_DMA_RX_ADDREXT_MASK 0x00030000
288#define BGMAC_DMA_RX_ADDREXT_SHIFT 16
289#define BGMAC_DMA_RX_INDEX 0x24
290#define BGMAC_DMA_RX_RINGLO 0x28
291#define BGMAC_DMA_RX_RINGHI 0x2C
292#define BGMAC_DMA_RX_STATUS 0x30
293#define BGMAC_DMA_RX_STATDPTR 0x00001FFF
294#define BGMAC_DMA_RX_STAT 0xF0000000
295#define BGMAC_DMA_RX_STAT_DISABLED 0x00000000
296#define BGMAC_DMA_RX_STAT_ACTIVE 0x10000000
297#define BGMAC_DMA_RX_STAT_IDLEWAIT 0x20000000
298#define BGMAC_DMA_RX_STAT_STOPPED 0x30000000
299#define BGMAC_DMA_RX_STAT_SUSP 0x40000000
300#define BGMAC_DMA_RX_ERROR 0x34
301#define BGMAC_DMA_RX_ERRDPTR 0x0001FFFF
302#define BGMAC_DMA_RX_ERR 0xF0000000
303#define BGMAC_DMA_RX_ERR_NOERR 0x00000000
304#define BGMAC_DMA_RX_ERR_PROT 0x10000000
305#define BGMAC_DMA_RX_ERR_UNDERRUN 0x20000000
306#define BGMAC_DMA_RX_ERR_TRANSFER 0x30000000
307#define BGMAC_DMA_RX_ERR_DESCREAD 0x40000000
308#define BGMAC_DMA_RX_ERR_CORE 0x50000000
309
310#define BGMAC_DESC_CTL0_EOT 0x10000000
311#define BGMAC_DESC_CTL0_IOC 0x20000000
312#define BGMAC_DESC_CTL0_SOF 0x40000000
313#define BGMAC_DESC_CTL0_EOF 0x80000000
314#define BGMAC_DESC_CTL1_LEN 0x00001FFF
315
316#define BGMAC_PHY_NOREGS 0x1E
317#define BGMAC_PHY_MASK 0x1F
318
319#define BGMAC_MAX_TX_RINGS 4
320#define BGMAC_MAX_RX_RINGS 1
321
322#define BGMAC_TX_RING_SLOTS 128
323#define BGMAC_RX_RING_SLOTS 512 - 1
324
325#define BGMAC_RX_HEADER_LEN 28
326#define BGMAC_RX_FRAME_OFFSET 30
327#define BGMAC_RX_MAX_FRAME_SIZE 1536
328#define BGMAC_RX_BUF_SIZE (BGMAC_RX_FRAME_OFFSET + BGMAC_RX_MAX_FRAME_SIZE)
329
330#define BGMAC_BFL_ENETROBO 0x0010
331#define BGMAC_BFL_ENETADM 0x0080
332#define BGMAC_BFL_ENETVLAN 0x0100
333
334#define BGMAC_CHIPCTL_1_IF_TYPE_MASK 0x00000030
335#define BGMAC_CHIPCTL_1_IF_TYPE_RMII 0x00000000
336#define BGMAC_CHIPCTL_1_IF_TYPE_MI 0x00000010
337#define BGMAC_CHIPCTL_1_IF_TYPE_RGMII 0x00000020
338#define BGMAC_CHIPCTL_1_SW_TYPE_MASK 0x000000C0
339#define BGMAC_CHIPCTL_1_SW_TYPE_EPHY 0x00000000
340#define BGMAC_CHIPCTL_1_SW_TYPE_EPHYMII 0x00000040
341#define BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII 0x00000080
342#define BGMAC_CHIPCTL_1_SW_TYPE_RGMII 0x000000C0
343#define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS 0x00010000
344
345#define BGMAC_SPEED_10 0x0001
346#define BGMAC_SPEED_100 0x0002
347#define BGMAC_SPEED_1000 0x0004
348
349#define BGMAC_WEIGHT 64
350
351#define ETHER_MAX_LEN 1518
352
353struct bgmac_slot_info {
354 struct sk_buff *skb;
355 dma_addr_t dma_addr;
356};
357
358struct bgmac_dma_desc {
359 __le32 ctl0;
360 __le32 ctl1;
361 __le32 addr_low;
362 __le32 addr_high;
363} __packed;
364
365enum bgmac_dma_ring_type {
366 BGMAC_DMA_RING_TX,
367 BGMAC_DMA_RING_RX,
368};
369
370
371
372
373
374
375
376
377
378
379struct bgmac_dma_ring {
380 u16 num_slots;
381 u16 start;
382 u16 end;
383
384 u16 mmio_base;
385 struct bgmac_dma_desc *cpu_base;
386 dma_addr_t dma_base;
387
388 struct bgmac_slot_info slots[BGMAC_RX_RING_SLOTS];
389};
390
391struct bgmac_rx_header {
392 __le16 len;
393 __le16 flags;
394 __le16 pad[12];
395};
396
397struct bgmac {
398 struct bcma_device *core;
399 struct bcma_device *cmn;
400 struct net_device *net_dev;
401 struct napi_struct napi;
402
403
404 struct bgmac_dma_ring tx_ring[BGMAC_MAX_TX_RINGS];
405 struct bgmac_dma_ring rx_ring[BGMAC_MAX_RX_RINGS];
406
407
408 bool stats_grabbed;
409 u32 mib_tx_regs[BGMAC_NUM_MIB_TX_REGS];
410 u32 mib_rx_regs[BGMAC_NUM_MIB_RX_REGS];
411
412
413 u32 int_mask;
414 u32 int_status;
415
416
417 int speed;
418 bool autoneg;
419 bool full_duplex;
420
421 u8 phyaddr;
422 bool has_robosw;
423
424 bool loopback;
425};
426
427static inline u32 bgmac_read(struct bgmac *bgmac, u16 offset)
428{
429 return bcma_read32(bgmac->core, offset);
430}
431
432static inline void bgmac_write(struct bgmac *bgmac, u16 offset, u32 value)
433{
434 bcma_write32(bgmac->core, offset, value);
435}
436
437static inline void bgmac_maskset(struct bgmac *bgmac, u16 offset, u32 mask,
438 u32 set)
439{
440 bgmac_write(bgmac, offset, (bgmac_read(bgmac, offset) & mask) | set);
441}
442
443static inline void bgmac_mask(struct bgmac *bgmac, u16 offset, u32 mask)
444{
445 bgmac_maskset(bgmac, offset, mask, 0);
446}
447
448static inline void bgmac_set(struct bgmac *bgmac, u16 offset, u32 set)
449{
450 bgmac_maskset(bgmac, offset, ~0, set);
451}
452
453#endif
454