linux/drivers/net/ethernet/sfc/nic.h
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   1/****************************************************************************
   2 * Driver for Solarflare Solarstorm network controllers and boards
   3 * Copyright 2005-2006 Fen Systems Ltd.
   4 * Copyright 2006-2011 Solarflare Communications Inc.
   5 *
   6 * This program is free software; you can redistribute it and/or modify it
   7 * under the terms of the GNU General Public License version 2 as published
   8 * by the Free Software Foundation, incorporated herein by reference.
   9 */
  10
  11#ifndef EFX_NIC_H
  12#define EFX_NIC_H
  13
  14#include <linux/net_tstamp.h>
  15#include <linux/i2c-algo-bit.h>
  16#include "net_driver.h"
  17#include "efx.h"
  18#include "mcdi.h"
  19#include "spi.h"
  20
  21/*
  22 * Falcon hardware control
  23 */
  24
  25enum {
  26        EFX_REV_FALCON_A0 = 0,
  27        EFX_REV_FALCON_A1 = 1,
  28        EFX_REV_FALCON_B0 = 2,
  29        EFX_REV_SIENA_A0 = 3,
  30};
  31
  32static inline int efx_nic_rev(struct efx_nic *efx)
  33{
  34        return efx->type->revision;
  35}
  36
  37extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
  38
  39/* NIC has two interlinked PCI functions for the same port. */
  40static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
  41{
  42        return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
  43}
  44
  45enum {
  46        PHY_TYPE_NONE = 0,
  47        PHY_TYPE_TXC43128 = 1,
  48        PHY_TYPE_88E1111 = 2,
  49        PHY_TYPE_SFX7101 = 3,
  50        PHY_TYPE_QT2022C2 = 4,
  51        PHY_TYPE_PM8358 = 6,
  52        PHY_TYPE_SFT9001A = 8,
  53        PHY_TYPE_QT2025C = 9,
  54        PHY_TYPE_SFT9001B = 10,
  55};
  56
  57#define FALCON_XMAC_LOOPBACKS                   \
  58        ((1 << LOOPBACK_XGMII) |                \
  59         (1 << LOOPBACK_XGXS) |                 \
  60         (1 << LOOPBACK_XAUI))
  61
  62#define FALCON_GMAC_LOOPBACKS                   \
  63        (1 << LOOPBACK_GMAC)
  64
  65/* Alignment of PCIe DMA boundaries (4KB) */
  66#define EFX_PAGE_SIZE   4096
  67/* Size and alignment of buffer table entries (same) */
  68#define EFX_BUF_SIZE    EFX_PAGE_SIZE
  69
  70/**
  71 * struct falcon_board_type - board operations and type information
  72 * @id: Board type id, as found in NVRAM
  73 * @init: Allocate resources and initialise peripheral hardware
  74 * @init_phy: Do board-specific PHY initialisation
  75 * @fini: Shut down hardware and free resources
  76 * @set_id_led: Set state of identifying LED or revert to automatic function
  77 * @monitor: Board-specific health check function
  78 */
  79struct falcon_board_type {
  80        u8 id;
  81        int (*init) (struct efx_nic *nic);
  82        void (*init_phy) (struct efx_nic *efx);
  83        void (*fini) (struct efx_nic *nic);
  84        void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
  85        int (*monitor) (struct efx_nic *nic);
  86};
  87
  88/**
  89 * struct falcon_board - board information
  90 * @type: Type of board
  91 * @major: Major rev. ('A', 'B' ...)
  92 * @minor: Minor rev. (0, 1, ...)
  93 * @i2c_adap: I2C adapter for on-board peripherals
  94 * @i2c_data: Data for bit-banging algorithm
  95 * @hwmon_client: I2C client for hardware monitor
  96 * @ioexp_client: I2C client for power/port control
  97 */
  98struct falcon_board {
  99        const struct falcon_board_type *type;
 100        int major;
 101        int minor;
 102        struct i2c_adapter i2c_adap;
 103        struct i2c_algo_bit_data i2c_data;
 104        struct i2c_client *hwmon_client, *ioexp_client;
 105};
 106
 107/**
 108 * struct falcon_nic_data - Falcon NIC state
 109 * @pci_dev2: Secondary function of Falcon A
 110 * @board: Board state and functions
 111 * @stats_disable_count: Nest count for disabling statistics fetches
 112 * @stats_pending: Is there a pending DMA of MAC statistics.
 113 * @stats_timer: A timer for regularly fetching MAC statistics.
 114 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
 115 * @spi_flash: SPI flash device
 116 * @spi_eeprom: SPI EEPROM device
 117 * @spi_lock: SPI bus lock
 118 * @mdio_lock: MDIO bus lock
 119 * @xmac_poll_required: XMAC link state needs polling
 120 */
 121struct falcon_nic_data {
 122        struct pci_dev *pci_dev2;
 123        struct falcon_board board;
 124        unsigned int stats_disable_count;
 125        bool stats_pending;
 126        struct timer_list stats_timer;
 127        u32 *stats_dma_done;
 128        struct efx_spi_device spi_flash;
 129        struct efx_spi_device spi_eeprom;
 130        struct mutex spi_lock;
 131        struct mutex mdio_lock;
 132        bool xmac_poll_required;
 133};
 134
 135static inline struct falcon_board *falcon_board(struct efx_nic *efx)
 136{
 137        struct falcon_nic_data *data = efx->nic_data;
 138        return &data->board;
 139}
 140
 141/**
 142 * struct siena_nic_data - Siena NIC state
 143 * @mcdi: Management-Controller-to-Driver Interface
 144 * @wol_filter_id: Wake-on-LAN packet filter id
 145 * @hwmon: Hardware monitor state
 146 */
 147struct siena_nic_data {
 148        struct efx_mcdi_iface mcdi;
 149        int wol_filter_id;
 150#ifdef CONFIG_SFC_MCDI_MON
 151        struct efx_mcdi_mon hwmon;
 152#endif
 153};
 154
 155#ifdef CONFIG_SFC_MCDI_MON
 156static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
 157{
 158        struct siena_nic_data *nic_data;
 159        EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
 160        nic_data = efx->nic_data;
 161        return &nic_data->hwmon;
 162}
 163#endif
 164
 165/*
 166 * On the SFC9000 family each port is associated with 1 PCI physical
 167 * function (PF) handled by sfc and a configurable number of virtual
 168 * functions (VFs) that may be handled by some other driver, often in
 169 * a VM guest.  The queue pointer registers are mapped in both PF and
 170 * VF BARs such that an 8K region provides access to a single RX, TX
 171 * and event queue (collectively a Virtual Interface, VI or VNIC).
 172 *
 173 * The PF has access to all 1024 VIs while VFs are mapped to VIs
 174 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
 175 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
 176 * The number of VIs and the VI_SCALE value are configurable but must
 177 * be established at boot time by firmware.
 178 */
 179
 180/* Maximum VI_SCALE parameter supported by Siena */
 181#define EFX_VI_SCALE_MAX 6
 182/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
 183 * so this is the smallest allowed value. */
 184#define EFX_VI_BASE 128U
 185/* Maximum number of VFs allowed */
 186#define EFX_VF_COUNT_MAX 127
 187/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
 188#define EFX_MAX_VF_EVQ_SIZE 8192UL
 189/* The number of buffer table entries reserved for each VI on a VF */
 190#define EFX_VF_BUFTBL_PER_VI                                    \
 191        ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) *        \
 192         sizeof(efx_qword_t) / EFX_BUF_SIZE)
 193
 194#ifdef CONFIG_SFC_SRIOV
 195
 196static inline bool efx_sriov_wanted(struct efx_nic *efx)
 197{
 198        return efx->vf_count != 0;
 199}
 200static inline bool efx_sriov_enabled(struct efx_nic *efx)
 201{
 202        return efx->vf_init_count != 0;
 203}
 204static inline unsigned int efx_vf_size(struct efx_nic *efx)
 205{
 206        return 1 << efx->vi_scale;
 207}
 208
 209extern int efx_init_sriov(void);
 210extern void efx_sriov_probe(struct efx_nic *efx);
 211extern int efx_sriov_init(struct efx_nic *efx);
 212extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
 213extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
 214extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
 215extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
 216extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
 217extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
 218extern void efx_sriov_reset(struct efx_nic *efx);
 219extern void efx_sriov_fini(struct efx_nic *efx);
 220extern void efx_fini_sriov(void);
 221
 222#else
 223
 224static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
 225static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
 226static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
 227
 228static inline int efx_init_sriov(void) { return 0; }
 229static inline void efx_sriov_probe(struct efx_nic *efx) {}
 230static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
 231static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
 232static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
 233                                           efx_qword_t *event) {}
 234static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
 235                                           efx_qword_t *event) {}
 236static inline void efx_sriov_event(struct efx_channel *channel,
 237                                   efx_qword_t *event) {}
 238static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
 239static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
 240static inline void efx_sriov_reset(struct efx_nic *efx) {}
 241static inline void efx_sriov_fini(struct efx_nic *efx) {}
 242static inline void efx_fini_sriov(void) {}
 243
 244#endif
 245
 246extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
 247extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
 248                                 u16 vlan, u8 qos);
 249extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
 250                                   struct ifla_vf_info *ivf);
 251extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
 252                                     bool spoofchk);
 253
 254struct ethtool_ts_info;
 255extern void efx_ptp_probe(struct efx_nic *efx);
 256extern int efx_ptp_ioctl(struct efx_nic *efx, struct ifreq *ifr, int cmd);
 257extern int efx_ptp_get_ts_info(struct net_device *net_dev,
 258                               struct ethtool_ts_info *ts_info);
 259extern bool efx_ptp_is_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
 260extern int efx_ptp_tx(struct efx_nic *efx, struct sk_buff *skb);
 261extern void efx_ptp_event(struct efx_nic *efx, efx_qword_t *ev);
 262
 263extern const struct efx_nic_type falcon_a1_nic_type;
 264extern const struct efx_nic_type falcon_b0_nic_type;
 265extern const struct efx_nic_type siena_a0_nic_type;
 266
 267/**************************************************************************
 268 *
 269 * Externs
 270 *
 271 **************************************************************************
 272 */
 273
 274extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
 275
 276/* TX data path */
 277extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
 278extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
 279extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
 280extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
 281extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
 282
 283/* RX data path */
 284extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
 285extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
 286extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
 287extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
 288extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
 289extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
 290
 291/* Event data path */
 292extern int efx_nic_probe_eventq(struct efx_channel *channel);
 293extern void efx_nic_init_eventq(struct efx_channel *channel);
 294extern void efx_nic_fini_eventq(struct efx_channel *channel);
 295extern void efx_nic_remove_eventq(struct efx_channel *channel);
 296extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
 297extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
 298extern bool efx_nic_event_present(struct efx_channel *channel);
 299
 300/* MAC/PHY */
 301extern void falcon_drain_tx_fifo(struct efx_nic *efx);
 302extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
 303extern bool falcon_xmac_check_fault(struct efx_nic *efx);
 304extern int falcon_reconfigure_xmac(struct efx_nic *efx);
 305extern void falcon_update_stats_xmac(struct efx_nic *efx);
 306
 307/* Some statistics are computed as A - B where A and B each increase
 308 * linearly with some hardware counter(s) and the counters are read
 309 * asynchronously.  If the counters contributing to B are always read
 310 * after those contributing to A, the computed value may be lower than
 311 * the true value by some variable amount, and may decrease between
 312 * subsequent computations.
 313 *
 314 * We should never allow statistics to decrease or to exceed the true
 315 * value.  Since the computed value will never be greater than the
 316 * true value, we can achieve this by only storing the computed value
 317 * when it increases.
 318 */
 319static inline void efx_update_diff_stat(u64 *stat, u64 diff)
 320{
 321        if ((s64)(diff - *stat) > 0)
 322                *stat = diff;
 323}
 324
 325/* Interrupts and test events */
 326extern int efx_nic_init_interrupt(struct efx_nic *efx);
 327extern void efx_nic_enable_interrupts(struct efx_nic *efx);
 328extern void efx_nic_event_test_start(struct efx_channel *channel);
 329extern void efx_nic_irq_test_start(struct efx_nic *efx);
 330extern void efx_nic_disable_interrupts(struct efx_nic *efx);
 331extern void efx_nic_fini_interrupt(struct efx_nic *efx);
 332extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
 333extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
 334extern void falcon_irq_ack_a1(struct efx_nic *efx);
 335
 336static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
 337{
 338        return ACCESS_ONCE(channel->event_test_cpu);
 339}
 340static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
 341{
 342        return ACCESS_ONCE(efx->last_irq_cpu);
 343}
 344
 345/* Global Resources */
 346extern int efx_nic_flush_queues(struct efx_nic *efx);
 347extern void siena_prepare_flush(struct efx_nic *efx);
 348extern void siena_finish_flush(struct efx_nic *efx);
 349extern void falcon_start_nic_stats(struct efx_nic *efx);
 350extern void falcon_stop_nic_stats(struct efx_nic *efx);
 351extern void falcon_setup_xaui(struct efx_nic *efx);
 352extern int falcon_reset_xaui(struct efx_nic *efx);
 353extern void
 354efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
 355extern void efx_nic_init_common(struct efx_nic *efx);
 356extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
 357
 358int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
 359                         unsigned int len);
 360void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
 361
 362/* Tests */
 363struct efx_nic_register_test {
 364        unsigned address;
 365        efx_oword_t mask;
 366};
 367extern int efx_nic_test_registers(struct efx_nic *efx,
 368                                  const struct efx_nic_register_test *regs,
 369                                  size_t n_regs);
 370
 371extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
 372extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
 373
 374/**************************************************************************
 375 *
 376 * Falcon MAC stats
 377 *
 378 **************************************************************************
 379 */
 380
 381#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
 382#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
 383
 384/* Retrieve statistic from statistics block */
 385#define FALCON_STAT(efx, falcon_stat, efx_stat) do {            \
 386        if (FALCON_STAT_WIDTH(falcon_stat) == 16)               \
 387                (efx)->mac_stats.efx_stat += le16_to_cpu(       \
 388                        *((__force __le16 *)                            \
 389                          (efx->stats_buffer.addr +             \
 390                           FALCON_STAT_OFFSET(falcon_stat))));  \
 391        else if (FALCON_STAT_WIDTH(falcon_stat) == 32)          \
 392                (efx)->mac_stats.efx_stat += le32_to_cpu(       \
 393                        *((__force __le32 *)                            \
 394                          (efx->stats_buffer.addr +             \
 395                           FALCON_STAT_OFFSET(falcon_stat))));  \
 396        else                                                    \
 397                (efx)->mac_stats.efx_stat += le64_to_cpu(       \
 398                        *((__force __le64 *)                            \
 399                          (efx->stats_buffer.addr +             \
 400                           FALCON_STAT_OFFSET(falcon_stat))));  \
 401        } while (0)
 402
 403#define FALCON_MAC_STATS_SIZE 0x100
 404
 405#define MAC_DATA_LBN 0
 406#define MAC_DATA_WIDTH 32
 407
 408extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
 409                               efx_qword_t *event);
 410
 411extern void falcon_poll_xmac(struct efx_nic *efx);
 412
 413#endif /* EFX_NIC_H */
 414