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12#ifndef _EATA_GENERIC_H
13#define _EATA_GENERIC_H
14
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20
21#define R_LIMIT 0x20000
22
23#define MAXISA 4
24#define MAXEISA 16
25#define MAXPCI 16
26#define MAXIRQ 16
27#define MAXTARGET 16
28#define MAXCHANNEL 3
29
30#define IS_ISA 'I'
31#define IS_EISA 'E'
32#define IS_PCI 'P'
33
34#define BROKEN_INQUIRY 1
35
36#define BUSMASTER 0xff
37#define PIO 0xfe
38
39#define EATA_SIGNATURE 0x45415441
40
41#define DPT_ID1 0x12
42#define DPT_ID2 0x14
43
44#define ATT_ID1 0x06
45#define ATT_ID2 0x94
46#define ATT_ID3 0x0
47
48#define NEC_ID1 0x38
49#define NEC_ID2 0xa3
50#define NEC_ID3 0x82
51
52
53#define EATA_CP_SIZE 44
54
55#define MAX_PCI_DEVICES 32
56#define MAX_METHOD_2 16
57#define MAX_PCI_BUS 16
58
59#define SG_SIZE 64
60#define SG_SIZE_BIG 252
61
62#define UPPER_DEVICE_QUEUE_LIMIT 64
63
64
65
66
67
68#define TYPE_DISK_QUEUE 16
69#define TYPE_TAPE_QUEUE 4
70#define TYPE_ROM_QUEUE 4
71#define TYPE_OTHER_QUEUE 2
72
73#define FREE 0
74#define OK 0
75#define NO_TIMEOUT 0
76#define USED 1
77#define TIMEOUT 2
78#define RESET 4
79#define LOCKED 8
80#define ABORTED 16
81
82#define READ 0
83#define WRITE 1
84#define OTHER 2
85
86#define HD(cmd) ((hostdata *)&(cmd->device->host->hostdata))
87#define CD(cmd) ((struct eata_ccb *)(cmd->host_scribble))
88#define SD(host) ((hostdata *)&(host->hostdata))
89
90
91
92
93#define PCI_REG_DPTconfig 0x40
94#define PCI_REG_PumpModeAddress 0x44
95#define PCI_REG_PumpModeData 0x48
96#define PCI_REG_ConfigParam1 0x50
97#define PCI_REG_ConfigParam2 0x54
98
99
100#define EATA_CMD_PIO_SETUPTEST 0xc6
101#define EATA_CMD_PIO_READ_CONFIG 0xf0
102#define EATA_CMD_PIO_SET_CONFIG 0xf1
103#define EATA_CMD_PIO_SEND_CP 0xf2
104#define EATA_CMD_PIO_RECEIVE_SP 0xf3
105#define EATA_CMD_PIO_TRUNC 0xf4
106
107#define EATA_CMD_RESET 0xf9
108#define EATA_CMD_IMMEDIATE 0xfa
109
110#define EATA_CMD_DMA_READ_CONFIG 0xfd
111#define EATA_CMD_DMA_SET_CONFIG 0xfe
112#define EATA_CMD_DMA_SEND_CP 0xff
113
114#define ECS_EMULATE_SENSE 0xd4
115
116#define EATA_GENERIC_ABORT 0x00
117#define EATA_SPECIFIC_RESET 0x01
118#define EATA_BUS_RESET 0x02
119#define EATA_SPECIFIC_ABORT 0x03
120#define EATA_QUIET_INTR 0x04
121#define EATA_COLD_BOOT_HBA 0x06
122#define EATA_FORCE_IO 0x07
123
124#define HA_CTRLREG 0x206
125#define HA_CTRL_DISINT 0x02
126#define HA_CTRL_RESCPU 0x04
127#define HA_CTRL_8HEADS 0x08
128
129
130#define HA_WCOMMAND 0x07
131#define HA_WIFC 0x06
132#define HA_WCODE 0x05
133#define HA_WCODE2 0x04
134#define HA_WDMAADDR 0x02
135#define HA_RAUXSTAT 0x08
136#define HA_RSTATUS 0x07
137#define HA_RDATA 0x00
138#define HA_WDATA 0x00
139
140#define HA_ABUSY 0x01
141#define HA_AIRQ 0x02
142#define HA_SERROR 0x01
143#define HA_SMORE 0x02
144#define HA_SCORR 0x04
145#define HA_SDRQ 0x08
146#define HA_SSC 0x10
147#define HA_SFAULT 0x20
148#define HA_SREADY 0x40
149#define HA_SBUSY 0x80
150#define HA_SDRDY HA_SSC+HA_SREADY+HA_SDRQ
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152
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154
155
156#define HA_NO_ERROR 0x00
157#define HA_ERR_SEL_TO 0x01
158#define HA_ERR_CMD_TO 0x02
159#define HA_BUS_RESET 0x03
160#define HA_INIT_POWERUP 0x04
161#define HA_UNX_BUSPHASE 0x05
162#define HA_UNX_BUS_FREE 0x06
163#define HA_BUS_PARITY 0x07
164#define HA_SCSI_HUNG 0x08
165#define HA_UNX_MSGRJCT 0x09
166#define HA_RESET_STUCK 0x0a
167#define HA_RSENSE_FAIL 0x0b
168#define HA_PARITY_ERR 0x0c
169#define HA_CP_ABORT_NA 0x0d
170#define HA_CP_ABORTED 0x0e
171#define HA_CP_RESET_NA 0x0f
172#define HA_CP_RESET 0x10
173#define HA_ECC_ERR 0x11
174#define HA_PCI_PARITY 0x12
175#define HA_PCI_MABORT 0x13
176#define HA_PCI_TABORT 0x14
177#define HA_PCI_STABORT 0x15
178
179
180
181
182
183struct reg_bit {
184 __u8 error:1;
185 __u8 more:1;
186 __u8 corr:1;
187 __u8 drq:1;
188 __u8 sc:1;
189 __u8 fault:1;
190 __u8 ready:1;
191 __u8 busy:1;
192};
193
194struct reg_abit {
195 __u8 abusy:1;
196 __u8 irq:1;
197 __u8 dummy:6;
198};
199
200struct eata_register {
201 __u8 data_reg[2];
202 __u8 cp_addr[4];
203 union {
204 __u8 command;
205 struct reg_bit status;
206 __u8 statusbyte;
207 } ovr;
208 struct reg_abit aux_stat;
209};
210
211struct get_conf {
212 __u32 len;
213 __u32 signature;
214 __u8 version2:4,
215 version:4;
216 __u8 OCS_enabled:1,
217 TAR_support:1,
218 TRNXFR:1,
219
220 MORE_support:1,
221 DMA_support:1,
222
223 DMA_valid:1,
224 ATA:1,
225 HAA_valid:1;
226
227 __u16 cppadlen;
228
229 __u8 scsi_id[4];
230
231 __u32 cplen;
232 __u32 splen;
233
234 __u16 queuesiz;
235 __u16 dummy;
236 __u16 SGsiz;
237 __u8 IRQ:4,
238 IRQ_TR:1,
239 SECOND:1,
240 DMA_channel:2;
241 __u8 sync;
242
243 __u8 DSBLE:1,
244 FORCADR:1,
245 SG_64K:1,
246 SG_UAE:1,
247 :4;
248 __u8 MAX_ID:5,
249 MAX_CHAN:3;
250 __u8 MAX_LUN;
251 __u8 :3,
252 AUTOTRM:1,
253 M1_inst:1,
254 ID_qest:1,
255 is_PCI:1,
256 is_EISA:1;
257 __u8 RAIDNUM;
258 __u8 unused[474];
259};
260
261struct eata_sg_list
262{
263 __u32 data;
264 __u32 len;
265};
266
267struct eata_ccb {
268
269 __u8 SCSI_Reset:1,
270 HBA_Init:1,
271 Auto_Req_Sen:1,
272 scatter:1,
273 Resrvd:1,
274 Interpret:1,
275 DataOut:1,
276 DataIn:1;
277 __u8 reqlen;
278
279 __u8 unused[3];
280 __u8 FWNEST:1,
281 unused2:7;
282 __u8 Phsunit:1,
283 I_AT:1,
284 I_HBA_C:1,
285 unused3:5;
286
287 __u8 cp_id:5,
288 cp_channel:3;
289 __u8 cp_lun:3,
290 :2,
291 cp_luntar:1,
292 cp_dispri:1,
293 cp_identify:1;
294 __u8 cp_msg1;
295 __u8 cp_msg2;
296 __u8 cp_msg3;
297 __u8 cp_cdb[12];
298 __u32 cp_datalen;
299
300 void *cp_viraddr;
301 __u32 cp_dataDMA;
302
303 __u32 cp_statDMA;
304 __u32 cp_reqDMA;
305
306
307 __u32 timestamp;
308 __u32 timeout;
309 __u8 sizeindex;
310 __u8 rw_latency;
311 __u8 retries;
312 __u8 status;
313 struct scsi_cmnd *cmd;
314 struct eata_sg_list *sg_list;
315};
316
317
318struct eata_sp {
319 __u8 hba_stat:7,
320 EOC:1;
321 __u8 scsi_stat;
322 __u8 reserved[2];
323 __u32 residue_len;
324 struct eata_ccb *ccb;
325 __u8 msg[12];
326};
327
328typedef struct hstd {
329 __u8 vendor[9];
330 __u8 name[18];
331 __u8 revision[6];
332 __u8 EATA_revision;
333 __u32 firmware_revision;
334 __u8 HBA_number;
335 __u8 bustype;
336 __u8 channel;
337 __u8 state;
338 __u8 primary;
339 __u8 more_support:1,
340 immediate_support:1,
341 broken_INQUIRY:1;
342
343 __u8 do_latency;
344 __u32 reads[13];
345 __u32 writes[13];
346 __u32 reads_lat[12][4];
347 __u32 writes_lat[12][4];
348 __u32 all_lat[4];
349 __u8 resetlevel[MAXCHANNEL];
350 __u32 last_ccb;
351 __u32 cplen;
352 __u16 cppadlen;
353 __u16 queuesize;
354 __u16 sgsize;
355 __u16 devflags;
356 __u8 hostid;
357 __u8 moresupport;
358 struct Scsi_Host *next;
359 struct Scsi_Host *prev;
360 struct pci_dev *pdev;
361 struct eata_sp sp;
362 struct eata_ccb ccb[0];
363}hostdata;
364
365
366struct drive_geom_emul {
367 __u8 trans;
368 __u8 channel;
369 __u8 HBA;
370 __u8 id;
371 __u8 lun;
372 __u32 heads;
373 __u32 sectors;
374 __u32 cylinder;
375};
376
377struct geom_emul {
378 __u8 bios_drives;
379 struct drive_geom_emul drv[2];
380};
381
382#endif
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