1/* 2 * Copyright 2012 Steffen Trumtrar <s.trumtrar@pengutronix.de> 3 * 4 * description of display timings 5 * 6 * This file is released under the GPLv2 7 */ 8 9#ifndef __LINUX_DISPLAY_TIMING_H 10#define __LINUX_DISPLAY_TIMING_H 11 12#include <linux/bitops.h> 13#include <linux/types.h> 14 15/* VESA display monitor timing parameters */ 16#define VESA_DMT_HSYNC_LOW BIT(0) 17#define VESA_DMT_HSYNC_HIGH BIT(1) 18#define VESA_DMT_VSYNC_LOW BIT(2) 19#define VESA_DMT_VSYNC_HIGH BIT(3) 20 21/* display specific flags */ 22#define DISPLAY_FLAGS_DE_LOW BIT(0) /* data enable flag */ 23#define DISPLAY_FLAGS_DE_HIGH BIT(1) 24#define DISPLAY_FLAGS_PIXDATA_POSEDGE BIT(2) /* drive data on pos. edge */ 25#define DISPLAY_FLAGS_PIXDATA_NEGEDGE BIT(3) /* drive data on neg. edge */ 26#define DISPLAY_FLAGS_INTERLACED BIT(4) 27#define DISPLAY_FLAGS_DOUBLESCAN BIT(5) 28 29/* 30 * A single signal can be specified via a range of minimal and maximal values 31 * with a typical value, that lies somewhere inbetween. 32 */ 33struct timing_entry { 34 u32 min; 35 u32 typ; 36 u32 max; 37}; 38 39enum timing_entry_index { 40 TE_MIN = 0, 41 TE_TYP = 1, 42 TE_MAX = 2, 43}; 44 45/* 46 * Single "mode" entry. This describes one set of signal timings a display can 47 * have in one setting. This struct can later be converted to struct videomode 48 * (see include/video/videomode.h). As each timing_entry can be defined as a 49 * range, one struct display_timing may become multiple struct videomodes. 50 * 51 * Example: hsync active high, vsync active low 52 * 53 * Active Video 54 * Video ______________________XXXXXXXXXXXXXXXXXXXXXX_____________________ 55 * |<- sync ->|<- back ->|<----- active ----->|<- front ->|<- sync.. 56 * | | porch | | porch | 57 * 58 * HSync _|¯¯¯¯¯¯¯¯¯¯|___________________________________________|¯¯¯¯¯¯¯¯¯ 59 * 60 * VSync ¯|__________|¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯¯|_________ 61 */ 62struct display_timing { 63 struct timing_entry pixelclock; 64 65 struct timing_entry hactive; /* hor. active video */ 66 struct timing_entry hfront_porch; /* hor. front porch */ 67 struct timing_entry hback_porch; /* hor. back porch */ 68 struct timing_entry hsync_len; /* hor. sync len */ 69 70 struct timing_entry vactive; /* ver. active video */ 71 struct timing_entry vfront_porch; /* ver. front porch */ 72 struct timing_entry vback_porch; /* ver. back porch */ 73 struct timing_entry vsync_len; /* ver. sync len */ 74 75 unsigned int dmt_flags; /* VESA DMT flags */ 76 unsigned int data_flags; /* video data flags */ 77}; 78 79/* 80 * This describes all timing settings a display provides. 81 * The native_mode is the default setting for this display. 82 * Drivers that can handle multiple videomodes should work with this struct and 83 * convert each entry to the desired end result. 84 */ 85struct display_timings { 86 unsigned int num_timings; 87 unsigned int native_mode; 88 89 struct display_timing **timings; 90}; 91 92/* get value specified by index from struct timing_entry */ 93static inline u32 display_timing_get_value(const struct timing_entry *te, 94 enum timing_entry_index index) 95{ 96 switch (index) { 97 case TE_MIN: 98 return te->min; 99 break; 100 case TE_TYP: 101 return te->typ; 102 break; 103 case TE_MAX: 104 return te->max; 105 break; 106 default: 107 return te->typ; 108 } 109} 110 111/* get one entry from struct display_timings */ 112static inline struct display_timing *display_timings_get(const struct 113 display_timings *disp, 114 unsigned int index) 115{ 116 if (disp->num_timings > index) 117 return disp->timings[index]; 118 else 119 return NULL; 120} 121 122void display_timings_release(struct display_timings *disp); 123 124#endif 125