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14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pm.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
21#include <linux/regulator/consumer.h>
22#include <linux/slab.h>
23#include <linux/of_device.h>
24#include <sound/core.h>
25#include <sound/pcm.h>
26#include <sound/pcm_params.h>
27#include <sound/soc.h>
28#include <sound/initval.h>
29#include <sound/tlv.h>
30
31#include "wm8523.h"
32
33#define WM8523_NUM_SUPPLIES 2
34static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
35 "AVDD",
36 "LINEVDD",
37};
38
39#define WM8523_NUM_RATES 7
40
41
42struct wm8523_priv {
43 struct regmap *regmap;
44 struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
45 unsigned int sysclk;
46 unsigned int rate_constraint_list[WM8523_NUM_RATES];
47 struct snd_pcm_hw_constraint_list rate_constraint;
48};
49
50static const struct reg_default wm8523_reg_defaults[] = {
51 { 2, 0x0000 },
52 { 3, 0x1812 },
53 { 4, 0x0000 },
54 { 5, 0x0001 },
55 { 6, 0x0190 },
56 { 7, 0x0190 },
57 { 8, 0x0000 },
58};
59
60static bool wm8523_volatile_register(struct device *dev, unsigned int reg)
61{
62 switch (reg) {
63 case WM8523_DEVICE_ID:
64 case WM8523_REVISION:
65 return true;
66 default:
67 return false;
68 }
69}
70
71static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
72
73static const char *wm8523_zd_count_text[] = {
74 "1024",
75 "2048",
76};
77
78static const struct soc_enum wm8523_zc_count =
79 SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
80
81static const struct snd_kcontrol_new wm8523_controls[] = {
82SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
83 0, 448, 0, dac_tlv),
84SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
85SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
86SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
87SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
88SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
89SOC_ENUM("Zero Detect Count", wm8523_zc_count),
90};
91
92static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
93SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
94SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
95SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
96};
97
98static const struct snd_soc_dapm_route wm8523_dapm_routes[] = {
99 { "LINEVOUTL", NULL, "DAC" },
100 { "LINEVOUTR", NULL, "DAC" },
101};
102
103static struct {
104 int value;
105 int ratio;
106} lrclk_ratios[WM8523_NUM_RATES] = {
107 { 1, 128 },
108 { 2, 192 },
109 { 3, 256 },
110 { 4, 384 },
111 { 5, 512 },
112 { 6, 768 },
113 { 7, 1152 },
114};
115
116static int wm8523_startup(struct snd_pcm_substream *substream,
117 struct snd_soc_dai *dai)
118{
119 struct snd_soc_codec *codec = dai->codec;
120 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
121
122
123
124
125 if (!wm8523->sysclk) {
126 dev_err(codec->dev,
127 "No MCLK configured, call set_sysclk() on init\n");
128 return -EINVAL;
129 }
130
131 snd_pcm_hw_constraint_list(substream->runtime, 0,
132 SNDRV_PCM_HW_PARAM_RATE,
133 &wm8523->rate_constraint);
134
135 return 0;
136}
137
138static int wm8523_hw_params(struct snd_pcm_substream *substream,
139 struct snd_pcm_hw_params *params,
140 struct snd_soc_dai *dai)
141{
142 struct snd_soc_codec *codec = dai->codec;
143 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
144 int i;
145 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
146 u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
147
148
149 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
150 if (wm8523->sysclk / params_rate(params) ==
151 lrclk_ratios[i].ratio)
152 break;
153 }
154
155
156 if (i == ARRAY_SIZE(lrclk_ratios)) {
157 dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
158 wm8523->sysclk / params_rate(params));
159 return -EINVAL;
160 }
161
162 aifctrl2 &= ~WM8523_SR_MASK;
163 aifctrl2 |= lrclk_ratios[i].value;
164
165 aifctrl1 &= ~WM8523_WL_MASK;
166 switch (params_format(params)) {
167 case SNDRV_PCM_FORMAT_S16_LE:
168 break;
169 case SNDRV_PCM_FORMAT_S20_3LE:
170 aifctrl1 |= 0x8;
171 break;
172 case SNDRV_PCM_FORMAT_S24_LE:
173 aifctrl1 |= 0x10;
174 break;
175 case SNDRV_PCM_FORMAT_S32_LE:
176 aifctrl1 |= 0x18;
177 break;
178 }
179
180 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
181 snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
182
183 return 0;
184}
185
186static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
187 int clk_id, unsigned int freq, int dir)
188{
189 struct snd_soc_codec *codec = codec_dai->codec;
190 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
191 unsigned int val;
192 int i;
193
194 wm8523->sysclk = freq;
195
196 wm8523->rate_constraint.count = 0;
197 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
198 val = freq / lrclk_ratios[i].ratio;
199
200
201
202
203 switch (val) {
204 case 8000:
205 case 11025:
206 case 16000:
207 case 22050:
208 case 32000:
209 case 44100:
210 case 48000:
211 case 64000:
212 case 88200:
213 case 96000:
214 case 176400:
215 case 192000:
216 dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
217 val);
218 wm8523->rate_constraint_list[i] = val;
219 wm8523->rate_constraint.count++;
220 break;
221 default:
222 dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
223 val);
224 }
225 }
226
227
228 if (wm8523->rate_constraint.count == 0)
229 return -EINVAL;
230
231 return 0;
232}
233
234
235static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
236 unsigned int fmt)
237{
238 struct snd_soc_codec *codec = codec_dai->codec;
239 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
240
241 aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
242 WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
243
244 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
245 case SND_SOC_DAIFMT_CBM_CFM:
246 aifctrl1 |= WM8523_AIF_MSTR;
247 break;
248 case SND_SOC_DAIFMT_CBS_CFS:
249 break;
250 default:
251 return -EINVAL;
252 }
253
254 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
255 case SND_SOC_DAIFMT_I2S:
256 aifctrl1 |= 0x0002;
257 break;
258 case SND_SOC_DAIFMT_RIGHT_J:
259 break;
260 case SND_SOC_DAIFMT_LEFT_J:
261 aifctrl1 |= 0x0001;
262 break;
263 case SND_SOC_DAIFMT_DSP_A:
264 aifctrl1 |= 0x0003;
265 break;
266 case SND_SOC_DAIFMT_DSP_B:
267 aifctrl1 |= 0x0023;
268 break;
269 default:
270 return -EINVAL;
271 }
272
273 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
274 case SND_SOC_DAIFMT_NB_NF:
275 break;
276 case SND_SOC_DAIFMT_IB_IF:
277 aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
278 break;
279 case SND_SOC_DAIFMT_IB_NF:
280 aifctrl1 |= WM8523_BCLK_INV;
281 break;
282 case SND_SOC_DAIFMT_NB_IF:
283 aifctrl1 |= WM8523_LRCLK_INV;
284 break;
285 default:
286 return -EINVAL;
287 }
288
289 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
290
291 return 0;
292}
293
294static int wm8523_set_bias_level(struct snd_soc_codec *codec,
295 enum snd_soc_bias_level level)
296{
297 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
298 int ret;
299
300 switch (level) {
301 case SND_SOC_BIAS_ON:
302 break;
303
304 case SND_SOC_BIAS_PREPARE:
305
306 snd_soc_update_bits(codec, WM8523_PSCTRL1,
307 WM8523_SYS_ENA_MASK, 3);
308 break;
309
310 case SND_SOC_BIAS_STANDBY:
311 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
312 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
313 wm8523->supplies);
314 if (ret != 0) {
315 dev_err(codec->dev,
316 "Failed to enable supplies: %d\n",
317 ret);
318 return ret;
319 }
320
321
322 regcache_sync(wm8523->regmap);
323
324
325 snd_soc_update_bits(codec, WM8523_PSCTRL1,
326 WM8523_SYS_ENA_MASK, 1);
327
328 msleep(100);
329 }
330
331
332 snd_soc_update_bits(codec, WM8523_PSCTRL1,
333 WM8523_SYS_ENA_MASK, 2);
334
335 break;
336
337 case SND_SOC_BIAS_OFF:
338
339 snd_soc_update_bits(codec, WM8523_PSCTRL1,
340 WM8523_SYS_ENA_MASK, 0);
341 msleep(100);
342
343 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
344 wm8523->supplies);
345 break;
346 }
347 codec->dapm.bias_level = level;
348 return 0;
349}
350
351#define WM8523_RATES SNDRV_PCM_RATE_8000_192000
352
353#define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
354 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
355
356static const struct snd_soc_dai_ops wm8523_dai_ops = {
357 .startup = wm8523_startup,
358 .hw_params = wm8523_hw_params,
359 .set_sysclk = wm8523_set_dai_sysclk,
360 .set_fmt = wm8523_set_dai_fmt,
361};
362
363static struct snd_soc_dai_driver wm8523_dai = {
364 .name = "wm8523-hifi",
365 .playback = {
366 .stream_name = "Playback",
367 .channels_min = 2,
368 .channels_max = 2,
369 .rates = WM8523_RATES,
370 .formats = WM8523_FORMATS,
371 },
372 .ops = &wm8523_dai_ops,
373};
374
375#ifdef CONFIG_PM
376static int wm8523_suspend(struct snd_soc_codec *codec)
377{
378 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
379 return 0;
380}
381
382static int wm8523_resume(struct snd_soc_codec *codec)
383{
384 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
385 return 0;
386}
387#else
388#define wm8523_suspend NULL
389#define wm8523_resume NULL
390#endif
391
392static int wm8523_probe(struct snd_soc_codec *codec)
393{
394 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
395 int ret;
396
397 wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
398 wm8523->rate_constraint.count =
399 ARRAY_SIZE(wm8523->rate_constraint_list);
400
401 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
402 if (ret != 0) {
403 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
404 return ret;
405 }
406
407
408 snd_soc_update_bits(codec, WM8523_DAC_GAINR,
409 WM8523_DACR_VU, WM8523_DACR_VU);
410 snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
411
412 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
413
414 return 0;
415}
416
417static int wm8523_remove(struct snd_soc_codec *codec)
418{
419 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
420 return 0;
421}
422
423static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
424 .probe = wm8523_probe,
425 .remove = wm8523_remove,
426 .suspend = wm8523_suspend,
427 .resume = wm8523_resume,
428 .set_bias_level = wm8523_set_bias_level,
429
430 .controls = wm8523_controls,
431 .num_controls = ARRAY_SIZE(wm8523_controls),
432 .dapm_widgets = wm8523_dapm_widgets,
433 .num_dapm_widgets = ARRAY_SIZE(wm8523_dapm_widgets),
434 .dapm_routes = wm8523_dapm_routes,
435 .num_dapm_routes = ARRAY_SIZE(wm8523_dapm_routes),
436};
437
438static const struct of_device_id wm8523_of_match[] = {
439 { .compatible = "wlf,wm8523" },
440 { },
441};
442
443static const struct regmap_config wm8523_regmap = {
444 .reg_bits = 8,
445 .val_bits = 16,
446 .max_register = WM8523_ZERO_DETECT,
447
448 .reg_defaults = wm8523_reg_defaults,
449 .num_reg_defaults = ARRAY_SIZE(wm8523_reg_defaults),
450 .cache_type = REGCACHE_RBTREE,
451
452 .volatile_reg = wm8523_volatile_register,
453};
454
455#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
456static int wm8523_i2c_probe(struct i2c_client *i2c,
457 const struct i2c_device_id *id)
458{
459 struct wm8523_priv *wm8523;
460 unsigned int val;
461 int ret, i;
462
463 wm8523 = devm_kzalloc(&i2c->dev, sizeof(struct wm8523_priv),
464 GFP_KERNEL);
465 if (wm8523 == NULL)
466 return -ENOMEM;
467
468 wm8523->regmap = devm_regmap_init_i2c(i2c, &wm8523_regmap);
469 if (IS_ERR(wm8523->regmap)) {
470 ret = PTR_ERR(wm8523->regmap);
471 dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
472 return ret;
473 }
474
475 for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
476 wm8523->supplies[i].supply = wm8523_supply_names[i];
477
478 ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8523->supplies),
479 wm8523->supplies);
480 if (ret != 0) {
481 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
482 return ret;
483 }
484
485 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
486 wm8523->supplies);
487 if (ret != 0) {
488 dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
489 return ret;
490 }
491
492 ret = regmap_read(wm8523->regmap, WM8523_DEVICE_ID, &val);
493 if (ret < 0) {
494 dev_err(&i2c->dev, "Failed to read ID register\n");
495 goto err_enable;
496 }
497 if (val != 0x8523) {
498 dev_err(&i2c->dev, "Device is not a WM8523, ID is %x\n", ret);
499 ret = -EINVAL;
500 goto err_enable;
501 }
502
503 ret = regmap_read(wm8523->regmap, WM8523_REVISION, &val);
504 if (ret < 0) {
505 dev_err(&i2c->dev, "Failed to read revision register\n");
506 goto err_enable;
507 }
508 dev_info(&i2c->dev, "revision %c\n",
509 (val & WM8523_CHIP_REV_MASK) + 'A');
510
511 ret = regmap_write(wm8523->regmap, WM8523_DEVICE_ID, 0x8523);
512 if (ret != 0) {
513 dev_err(&i2c->dev, "Failed to reset device: %d\n", ret);
514 goto err_enable;
515 }
516
517 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
518
519 i2c_set_clientdata(i2c, wm8523);
520
521 ret = snd_soc_register_codec(&i2c->dev,
522 &soc_codec_dev_wm8523, &wm8523_dai, 1);
523
524 return ret;
525
526err_enable:
527 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
528 return ret;
529}
530
531static int wm8523_i2c_remove(struct i2c_client *client)
532{
533 snd_soc_unregister_codec(&client->dev);
534 return 0;
535}
536
537static const struct i2c_device_id wm8523_i2c_id[] = {
538 { "wm8523", 0 },
539 { }
540};
541MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
542
543static struct i2c_driver wm8523_i2c_driver = {
544 .driver = {
545 .name = "wm8523",
546 .owner = THIS_MODULE,
547 .of_match_table = wm8523_of_match,
548 },
549 .probe = wm8523_i2c_probe,
550 .remove = wm8523_i2c_remove,
551 .id_table = wm8523_i2c_id,
552};
553#endif
554
555static int __init wm8523_modinit(void)
556{
557 int ret;
558#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
559 ret = i2c_add_driver(&wm8523_i2c_driver);
560 if (ret != 0) {
561 printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
562 ret);
563 }
564#endif
565 return 0;
566}
567module_init(wm8523_modinit);
568
569static void __exit wm8523_exit(void)
570{
571#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
572 i2c_del_driver(&wm8523_i2c_driver);
573#endif
574}
575module_exit(wm8523_exit);
576
577MODULE_DESCRIPTION("ASoC WM8523 driver");
578MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
579MODULE_LICENSE("GPL");
580
