LXR linux/arch/arm/mach-sa1100/assabet.c

   1/*
   2 * linux/arch/arm/mach-sa1100/assabet.c
   3 *
   4 * Author: Nicolas Pitre
   5 *
   6 * This file contains all Assabet-specific tweaks.
   7 *
   8 * This program is free software; you can redistribute it and/or modify
   9 * it under the terms of the GNU General Public License version 2 as
  10 * published by the Free Software Foundation.
  11 */
  12#include <linux/init.h>
  13#include <linux/kernel.h>
  14#include <linux/module.h>
  15#include <linux/errno.h>
  16#include <linux/ioport.h>
  17#include <linux/platform_data/sa11x0-serial.h>
  18#include <linux/serial_core.h>
  19#include <linux/platform_device.h>
  20#include <linux/mfd/ucb1x00.h>
  21#include <linux/mtd/mtd.h>
  22#include <linux/mtd/partitions.h>
  23#include <linux/delay.h>
  24#include <linux/mm.h>
  25#include <linux/leds.h>
  26#include <linux/slab.h>
  27
  28#include <video/sa1100fb.h>
  29
  30#include <mach/hardware.h>
  31#include <asm/mach-types.h>
  32#include <asm/setup.h>
  33#include <asm/page.h>
  34#include <asm/pgtable-hwdef.h>
  35#include <asm/pgtable.h>
  36#include <asm/tlbflush.h>
  37
  38#include <asm/mach/arch.h>
  39#include <asm/mach/flash.h>
  40#include <linux/platform_data/irda-sa11x0.h>
  41#include <asm/mach/map.h>
  42#include <mach/assabet.h>
  43#include <linux/platform_data/mfd-mcp-sa11x0.h>
  44#include <mach/irqs.h>
  45
  46#include "generic.h"
  47
  48#define ASSABET_BCR_DB1110 \
  49        (ASSABET_BCR_SPK_OFF    | \
  50         ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  51         ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  52         ASSABET_BCR_IRDA_MD0)
  53
  54#define ASSABET_BCR_DB1111 \
  55        (ASSABET_BCR_SPK_OFF    | \
  56         ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
  57         ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
  58         ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
  59         ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)
  60
  61unsigned long SCR_value = ASSABET_SCR_INIT;
  62EXPORT_SYMBOL(SCR_value);
  63
  64static unsigned long BCR_value = ASSABET_BCR_DB1110;
  65
  66void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
  67{
  68        unsigned long flags;
  69
  70        local_irq_save(flags);
  71        BCR_value = (BCR_value & ~mask) | val;
  72        ASSABET_BCR = BCR_value;
  73        local_irq_restore(flags);
  74}
  75
  76EXPORT_SYMBOL(ASSABET_BCR_frob);
  77
  78/*
  79 * The codec reset goes to three devices, so we need to release
  80 * the rest when any one of these requests it.  However, that
  81 * causes the ADV7171 to consume around 100mA - more than half
  82 * the LCD-blanked power.
  83 *
  84 * With the ADV7171, LCD and backlight enabled, we go over
  85 * budget on the MAX846 Li-Ion charger, and if no Li-Ion battery
  86 * is connected, the Assabet crashes.
  87 */
  88#define RST_UCB1X00 (1 << 0)
  89#define RST_UDA1341 (1 << 1)
  90#define RST_ADV7171 (1 << 2)
  91
  92#define SDA GPIO_GPIO(15)
  93#define SCK GPIO_GPIO(18)
  94#define MOD GPIO_GPIO(17)
  95
  96static void adv7171_start(void)
  97{
  98        GPSR = SCK;
  99        udelay(1);
 100        GPSR = SDA;
 101        udelay(2);
 102        GPCR = SDA;
 103}
 104
 105static void adv7171_stop(void)
 106{
 107        GPSR = SCK;
 108        udelay(2);
 109        GPSR = SDA;
 110        udelay(1);
 111}
 112
 113static void adv7171_send(unsigned byte)
 114{
 115        unsigned i;
 116
 117        for (i = 0; i < 8; i++, byte <<= 1) {
 118                GPCR = SCK;
 119                udelay(1);
 120                if (byte & 0x80)
 121                        GPSR = SDA;
 122                else
 123                        GPCR = SDA;
 124                udelay(1);
 125                GPSR = SCK;
 126                udelay(1);
 127        }
 128        GPCR = SCK;
 129        udelay(1);
 130        GPSR = SDA;
 131        udelay(1);
 132        GPDR &= ~SDA;
 133        GPSR = SCK;
 134        udelay(1);
 135        if (GPLR & SDA)
 136                printk(KERN_WARNING "No ACK from ADV7171\n");
 137        udelay(1);
 138        GPCR = SCK | SDA;
 139        udelay(1);
 140        GPDR |= SDA;
 141        udelay(1);
 142}
 143
 144static void adv7171_write(unsigned reg, unsigned val)
 145{
 146        unsigned gpdr = GPDR;
 147        unsigned gplr = GPLR;
 148
 149        ASSABET_BCR = BCR_value | ASSABET_BCR_AUDIO_ON;
 150        udelay(100);
 151
 152        GPCR = SDA | SCK | MOD; /* clear L3 mode to ensure UDA1341 doesn't respond */
 153        GPDR = (GPDR | SCK | MOD) & ~SDA;
 154        udelay(10);
 155        if (!(GPLR & SDA))
 156                printk(KERN_WARNING "Something dragging SDA down?\n");
 157        GPDR |= SDA;
 158
 159        adv7171_start();
 160        adv7171_send(0x54);
 161        adv7171_send(reg);
 162        adv7171_send(val);
 163        adv7171_stop();
 164
 165        /* Restore GPIO state for L3 bus */
 166        GPSR = gplr & (SDA | SCK | MOD);
 167        GPCR = (~gplr) & (SDA | SCK | MOD);
 168        GPDR = gpdr;
 169}
 170
 171static void adv7171_sleep(void)
 172{
 173        /* Put the ADV7171 into sleep mode */
 174        adv7171_write(0x04, 0x40);
 175}
 176
 177static unsigned codec_nreset;
 178
 179static void assabet_codec_reset(unsigned mask, int set)
 180{
 181        unsigned long flags;
 182        bool old;
 183
 184        local_irq_save(flags);
 185        old = !codec_nreset;
 186        if (set)
 187                codec_nreset &= ~mask;
 188        else
 189                codec_nreset |= mask;
 190
 191        if (old != !codec_nreset) {
 192                if (codec_nreset) {
 193                        ASSABET_BCR_set(ASSABET_BCR_NCODEC_RST);
 194                        adv7171_sleep();
 195                } else {
 196                        ASSABET_BCR_clear(ASSABET_BCR_NCODEC_RST);
 197                }
 198        }
 199        local_irq_restore(flags);
 200}
 201
 202static void assabet_ucb1x00_reset(enum ucb1x00_reset state)
 203{
 204        int set = state == UCB_RST_REMOVE || state == UCB_RST_SUSPEND ||
 205                state == UCB_RST_PROBE_FAIL;
 206        assabet_codec_reset(RST_UCB1X00, set);
 207}
 208
 209void assabet_uda1341_reset(int set)
 210{
 211        assabet_codec_reset(RST_UDA1341, set);
 212}
 213EXPORT_SYMBOL(assabet_uda1341_reset);
 214
 215
 216/*
 217 * Assabet flash support code.
 218 */
 219
 220#ifdef ASSABET_REV_4
 221/*
 222 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
 223 */
 224static struct mtd_partition assabet_partitions[] = {
 225        {
 226                .name           = "bootloader",
 227                .size           = 0x00020000,
 228                .offset         = 0,
 229                .mask_flags     = MTD_WRITEABLE,
 230        }, {
 231                .name           = "bootloader params",
 232                .size           = 0x00020000,
 233                .offset         = MTDPART_OFS_APPEND,
 234                .mask_flags     = MTD_WRITEABLE,
 235        }, {
 236                .name           = "jffs",
 237                .size           = MTDPART_SIZ_FULL,
 238                .offset         = MTDPART_OFS_APPEND,
 239        }
 240};
 241#else
 242/*
 243 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
 244 */
 245static struct mtd_partition assabet_partitions[] = {
 246        {
 247                .name           = "bootloader",
 248                .size           = 0x00040000,
 249                .offset         = 0,
 250                .mask_flags     = MTD_WRITEABLE,
 251        }, {
 252                .name           = "bootloader params",
 253                .size           = 0x00040000,
 254                .offset         = MTDPART_OFS_APPEND,
 255                .mask_flags     = MTD_WRITEABLE,
 256        }, {
 257                .name           = "jffs",
 258                .size           = MTDPART_SIZ_FULL,
 259                .offset         = MTDPART_OFS_APPEND,
 260        }
 261};
 262#endif
 263
 264static struct flash_platform_data assabet_flash_data = {
 265        .map_name       = "cfi_probe",
 266        .parts          = assabet_partitions,
 267        .nr_parts       = ARRAY_SIZE(assabet_partitions),
 268};
 269
 270static struct resource assabet_flash_resources[] = {
 271        DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_32M),
 272        DEFINE_RES_MEM(SA1100_CS1_PHYS, SZ_32M),
 273};
 274
 275
 276/*
 277 * Assabet IrDA support code.
 278 */
 279
 280static int assabet_irda_set_power(struct device *dev, unsigned int state)
 281{
 282        static unsigned int bcr_state[4] = {
 283                ASSABET_BCR_IRDA_MD0,
 284                ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
 285                ASSABET_BCR_IRDA_MD1,
 286                0
 287        };
 288
 289        if (state < 4)
 290                ASSABET_BCR_frob(ASSABET_BCR_IRDA_MD1 | ASSABET_BCR_IRDA_MD0,
 291                                 bcr_state[state]);
 292        return 0;
 293}
 294
 295static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
 296{
 297        if (speed < 4000000)
 298                ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
 299        else
 300                ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
 301}
 302
 303static struct irda_platform_data assabet_irda_data = {
 304        .set_power      = assabet_irda_set_power,
 305        .set_speed      = assabet_irda_set_speed,
 306};
 307
 308static struct ucb1x00_plat_data assabet_ucb1x00_data = {
 309        .reset          = assabet_ucb1x00_reset,
 310        .gpio_base      = -1,
 311        .can_wakeup     = 1,
 312};
 313
 314static struct mcp_plat_data assabet_mcp_data = {
 315        .mccr0          = MCCR0_ADM,
 316        .sclk_rate      = 11981000,
 317        .codec_pdata    = &assabet_ucb1x00_data,
 318};
 319
 320static void assabet_lcd_set_visual(u32 visual)
 321{
 322        u_int is_true_color = visual == FB_VISUAL_TRUECOLOR;
 323
 324        if (machine_is_assabet()) {
 325#if 1           // phase 4 or newer Assabet's
 326                if (is_true_color)
 327                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
 328                else
 329                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
 330#else
 331                // older Assabet's
 332                if (is_true_color)
 333                        ASSABET_BCR_clear(ASSABET_BCR_LCD_12RGB);
 334                else
 335                        ASSABET_BCR_set(ASSABET_BCR_LCD_12RGB);
 336#endif
 337        }
 338}
 339
 340#ifndef ASSABET_PAL_VIDEO
 341static void assabet_lcd_backlight_power(int on)
 342{
 343        if (on)
 344                ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
 345        else
 346                ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
 347}
 348
 349/*
 350 * Turn on/off the backlight.  When turning the backlight on, we wait
 351 * 500us after turning it on so we don't cause the supplies to droop
 352 * when we enable the LCD controller (and cause a hard reset.)
 353 */
 354static void assabet_lcd_power(int on)
 355{
 356        if (on) {
 357                ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
 358                udelay(500);
 359        } else
 360                ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 361}
 362
 363/*
 364 * The assabet uses a sharp LQ039Q2DS54 LCD module.  It is actually
 365 * takes an RGB666 signal, but we provide it with an RGB565 signal
 366 * instead (def_rgb_16).
 367 */
 368static struct sa1100fb_mach_info lq039q2ds54_info = {
 369        .pixclock       = 171521,       .bpp            = 16,
 370        .xres           = 320,          .yres           = 240,
 371
 372        .hsync_len      = 5,            .vsync_len      = 1,
 373        .left_margin    = 61,           .upper_margin   = 3,
 374        .right_margin   = 9,            .lower_margin   = 0,
 375
 376        .sync           = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
 377
 378        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
 379        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(2),
 380
 381        .backlight_power = assabet_lcd_backlight_power,
 382        .lcd_power = assabet_lcd_power,
 383        .set_visual = assabet_lcd_set_visual,
 384};
 385#else
 386static void assabet_pal_backlight_power(int on)
 387{
 388        ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
 389}
 390
 391static void assabet_pal_power(int on)
 392{
 393        ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
 394}
 395
 396static struct sa1100fb_mach_info pal_info = {
 397        .pixclock       = 67797,        .bpp            = 16,
 398        .xres           = 640,          .yres           = 512,
 399
 400        .hsync_len      = 64,           .vsync_len      = 6,
 401        .left_margin    = 125,          .upper_margin   = 70,
 402        .right_margin   = 115,          .lower_margin   = 36,
 403
 404        .lccr0          = LCCR0_Color | LCCR0_Sngl | LCCR0_Act,
 405        .lccr3          = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512),
 406
 407        .backlight_power = assabet_pal_backlight_power,
 408        .lcd_power = assabet_pal_power,
 409        .set_visual = assabet_lcd_set_visual,
 410};
 411#endif
 412
 413#ifdef CONFIG_ASSABET_NEPONSET
 414static struct resource neponset_resources[] = {
 415        DEFINE_RES_MEM(0x10000000, 0x08000000),
 416        DEFINE_RES_MEM(0x18000000, 0x04000000),
 417        DEFINE_RES_MEM(0x40000000, SZ_8K),
 418        DEFINE_RES_IRQ(IRQ_GPIO25),
 419};
 420#endif
 421
 422static void __init assabet_init(void)
 423{
 424        /*
 425         * Ensure that the power supply is in "high power" mode.
 426         */
 427        GPSR = GPIO_GPIO16;
 428        GPDR |= GPIO_GPIO16;
 429
 430        /*
 431         * Ensure that these pins are set as outputs and are driving
 432         * logic 0.  This ensures that we won't inadvertently toggle
 433         * the WS latch in the CPLD, and we don't float causing
 434         * excessive power drain.  --rmk
 435         */
 436        GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 437        GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
 438
 439        /*
 440         * Also set GPIO27 as an output; this is used to clock UART3
 441         * via the FPGA and as otherwise has no pullups or pulldowns,
 442         * so stop it floating.
 443         */
 444        GPCR = GPIO_GPIO27;
 445        GPDR |= GPIO_GPIO27;
 446
 447        /*
 448         * Set up registers for sleep mode.
 449         */
 450        PWER = PWER_GPIO0;
 451        PGSR = 0;
 452        PCFR = 0;
 453        PSDR = 0;
 454        PPDR |= PPC_TXD3 | PPC_TXD1;
 455        PPSR |= PPC_TXD3 | PPC_TXD1;
 456
 457        sa11x0_ppc_configure_mcp();
 458
 459        if (machine_has_neponset()) {
 460                /*
 461                 * Angel sets this, but other bootloaders may not.
 462                 *
 463                 * This must precede any driver calls to BCR_set()
 464                 * or BCR_clear().
 465                 */
 466                ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
 467
 468#ifndef CONFIG_ASSABET_NEPONSET
 469                printk( "Warning: Neponset detected but full support "
 470                        "hasn't been configured in the kernel\n" );
 471#else
 472                platform_device_register_simple("neponset", 0,
 473                        neponset_resources, ARRAY_SIZE(neponset_resources));
 474#endif
 475        }
 476
 477#ifndef ASSABET_PAL_VIDEO
 478        sa11x0_register_lcd(&lq039q2ds54_info);
 479#else
 480        sa11x0_register_lcd(&pal_video);
 481#endif
 482        sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
 483                            ARRAY_SIZE(assabet_flash_resources));
 484        sa11x0_register_irda(&assabet_irda_data);
 485        sa11x0_register_mcp(&assabet_mcp_data);
 486}
 487
 488/*
 489 * On Assabet, we must probe for the Neponset board _before_
 490 * paging_init() has occurred to actually determine the amount
 491 * of RAM available.  To do so, we map the appropriate IO section
 492 * in the page table here in order to access GPIO registers.
 493 */
 494static void __init map_sa1100_gpio_regs( void )
 495{
 496        unsigned long phys = __PREG(GPLR) & PMD_MASK;
 497        unsigned long virt = (unsigned long)io_p2v(phys);
 498        int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
 499        pmd_t *pmd;
 500
 501        pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
 502        *pmd = __pmd(phys | prot);
 503        flush_pmd_entry(pmd);
 504}
 505
 506/*
 507 * Read System Configuration "Register"
 508 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
 509 * User's Guide", section 4.4.1)
 510 *
 511 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
 512 * to set up the serial port for decompression status messages. We
 513 * repeat it here because the kernel may not be loaded as a zImage, and
 514 * also because it's a hassle to communicate the SCR value to the kernel
 515 * from the decompressor.
 516 *
 517 * Note that IRQs are guaranteed to be disabled.
 518 */
 519static void __init get_assabet_scr(void)
 520{
 521        unsigned long uninitialized_var(scr), i;
 522
 523        GPDR |= 0x3fc;                  /* Configure GPIO 9:2 as outputs */
 524        GPSR = 0x3fc;                   /* Write 0xFF to GPIO 9:2 */
 525        GPDR &= ~(0x3fc);               /* Configure GPIO 9:2 as inputs */
 526        for(i = 100; i--; )             /* Read GPIO 9:2 */
 527                scr = GPLR;
 528        GPDR |= 0x3fc;                  /*  restore correct pin direction */
 529        scr &= 0x3fc;                   /* save as system configuration byte. */
 530        SCR_value = scr;
 531}
 532
 533static void __init
 534fixup_assabet(struct tag *tags, char **cmdline)
 535{
 536        /* This must be done before any call to machine_has_neponset() */
 537        map_sa1100_gpio_regs();
 538        get_assabet_scr();
 539
 540        if (machine_has_neponset())
 541                printk("Neponset expansion board detected\n");
 542}
 543
 544
 545static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
 546{
 547        if (port->mapbase == _Ser1UTCR0) {
 548                if (state)
 549                        ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
 550                                          ASSABET_BCR_COM_RTS |
 551                                          ASSABET_BCR_COM_DTR);
 552                else
 553                        ASSABET_BCR_set(ASSABET_BCR_RS232EN |
 554                                        ASSABET_BCR_COM_RTS |
 555                                        ASSABET_BCR_COM_DTR);
 556        }
 557}
 558
 559/*
 560 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
 561 * and UART3 (radio module).  We only handle them for UART1 here.
 562 */
 563static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
 564{
 565        if (port->mapbase == _Ser1UTCR0) {
 566                u_int set = 0, clear = 0;
 567
 568                if (mctrl & TIOCM_RTS)
 569                        clear |= ASSABET_BCR_COM_RTS;
 570                else
 571                        set |= ASSABET_BCR_COM_RTS;
 572
 573                if (mctrl & TIOCM_DTR)
 574                        clear |= ASSABET_BCR_COM_DTR;
 575                else
 576                        set |= ASSABET_BCR_COM_DTR;
 577
 578                ASSABET_BCR_clear(clear);
 579                ASSABET_BCR_set(set);
 580        }
 581}
 582
 583static u_int assabet_get_mctrl(struct uart_port *port)
 584{
 585        u_int ret = 0;
 586        u_int bsr = ASSABET_BSR;
 587
 588        /* need 2 reads to read current value */
 589        bsr = ASSABET_BSR;
 590
 591        if (port->mapbase == _Ser1UTCR0) {
 592                if (bsr & ASSABET_BSR_COM_DCD)
 593                        ret |= TIOCM_CD;
 594                if (bsr & ASSABET_BSR_COM_CTS)
 595                        ret |= TIOCM_CTS;
 596                if (bsr & ASSABET_BSR_COM_DSR)
 597                        ret |= TIOCM_DSR;
 598        } else if (port->mapbase == _Ser3UTCR0) {
 599                if (bsr & ASSABET_BSR_RAD_DCD)
 600                        ret |= TIOCM_CD;
 601                if (bsr & ASSABET_BSR_RAD_CTS)
 602                        ret |= TIOCM_CTS;
 603                if (bsr & ASSABET_BSR_RAD_DSR)
 604                        ret |= TIOCM_DSR;
 605                if (bsr & ASSABET_BSR_RAD_RI)
 606                        ret |= TIOCM_RI;
 607        } else {
 608                ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
 609        }
 610
 611        return ret;
 612}
 613
 614static struct sa1100_port_fns assabet_port_fns __initdata = {
 615        .set_mctrl      = assabet_set_mctrl,
 616        .get_mctrl      = assabet_get_mctrl,
 617        .pm             = assabet_uart_pm,
 618};
 619
 620static struct map_desc assabet_io_desc[] __initdata = {
 621        {       /* Board Control Register */
 622                .virtual        =  0xf1000000,
 623                .pfn            = __phys_to_pfn(0x12000000),
 624                .length         = 0x00100000,
 625                .type           = MT_DEVICE
 626        }, {    /* MQ200 */
 627                .virtual        =  0xf2800000,
 628                .pfn            = __phys_to_pfn(0x4b800000),
 629                .length         = 0x00800000,
 630                .type           = MT_DEVICE
 631        }
 632};
 633
 634static void __init assabet_map_io(void)
 635{
 636        sa1100_map_io();
 637        iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
 638
 639        /*
 640         * Set SUS bit in SDCR0 so serial port 1 functions.
 641         * Its called GPCLKR0 in my SA1110 manual.
 642         */
 643        Ser1SDCR0 |= SDCR0_SUS;
 644        MSC1 = (MSC1 & ~0xffff) |
 645                MSC_NonBrst | MSC_32BitStMem |
 646                MSC_RdAcc(2) | MSC_WrAcc(2) | MSC_Rec(0);
 647
 648        if (!machine_has_neponset())
 649                sa1100_register_uart_fns(&assabet_port_fns);
 650
 651        /*
 652         * When Neponset is attached, the first UART should be
 653         * UART3.  That's what Angel is doing and many documents
 654         * are stating this.
 655         *
 656         * We do the Neponset mapping even if Neponset support
 657         * isn't compiled in so the user will still get something on
 658         * the expected physical serial port.
 659         *
 660         * We no longer do this; not all boot loaders support it,
 661         * and UART3 appears to be somewhat unreliable with blob.
 662         */
 663        sa1100_register_uart(0, 1);
 664        sa1100_register_uart(2, 3);
 665}
 666
 667/* LEDs */
 668#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
 669struct assabet_led {
 670        struct led_classdev cdev;
 671        u32 mask;
 672};
 673
 674/*
 675 * The triggers lines up below will only be used if the
 676 * LED triggers are compiled in.
 677 */
 678static const struct {
 679        const char *name;
 680        const char *trigger;
 681} assabet_leds[] = {
 682        { "assabet:red", "cpu0",},
 683        { "assabet:green", "heartbeat", },
 684};
 685
 686/*
 687 * The LED control in Assabet is reversed:
 688 *  - setting bit means turn off LED
 689 *  - clearing bit means turn on LED
 690 */
 691static void assabet_led_set(struct led_classdev *cdev,
 692                enum led_brightness b)
 693{
 694        struct assabet_led *led = container_of(cdev,
 695                        struct assabet_led, cdev);
 696
 697        if (b != LED_OFF)
 698                ASSABET_BCR_clear(led->mask);
 699        else
 700                ASSABET_BCR_set(led->mask);
 701}
 702
 703static enum led_brightness assabet_led_get(struct led_classdev *cdev)
 704{
 705        struct assabet_led *led = container_of(cdev,
 706                        struct assabet_led, cdev);
 707
 708        return (ASSABET_BCR & led->mask) ? LED_OFF : LED_FULL;
 709}
 710
 711static int __init assabet_leds_init(void)
 712{
 713        int i;
 714
 715        if (!machine_is_assabet())
 716                return -ENODEV;
 717
 718        for (i = 0; i < ARRAY_SIZE(assabet_leds); i++) {
 719                struct assabet_led *led;
 720
 721                led = kzalloc(sizeof(*led), GFP_KERNEL);
 722                if (!led)
 723                        break;
 724
 725                led->cdev.name = assabet_leds[i].name;
 726                led->cdev.brightness_set = assabet_led_set;
 727                led->cdev.brightness_get = assabet_led_get;
 728                led->cdev.default_trigger = assabet_leds[i].trigger;
 729
 730                if (!i)
 731                        led->mask = ASSABET_BCR_LED_RED;
 732                else
 733                        led->mask = ASSABET_BCR_LED_GREEN;
 734
 735                if (led_classdev_register(NULL, &led->cdev) < 0) {
 736                        kfree(led);
 737                        break;
 738                }
 739        }
 740
 741        return 0;
 742}
 743
 744/*
 745 * Since we may have triggers on any subsystem, defer registration
 746 * until after subsystem_init.
 747 */
 748fs_initcall(assabet_leds_init);
 749#endif
 750
 751MACHINE_START(ASSABET, "Intel-Assabet")
 752        .atag_offset    = 0x100,
 753        .fixup          = fixup_assabet,
 754        .map_io         = assabet_map_io,
 755        .nr_irqs        = SA1100_NR_IRQS,
 756        .init_irq       = sa1100_init_irq,
 757        .init_time      = sa1100_timer_init,
 758        .init_machine   = assabet_init,
 759        .init_late      = sa11x0_init_late,
 760#ifdef CONFIG_SA1111
 761        .dma_zone_size  = SZ_1M,
 762#endif
 763        .restart        = sa11x0_restart,
 764MACHINE_END
 765