1#ifndef __ASM_SH73A0_H__
2#define __ASM_SH73A0_H__
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5enum {
6 SHDMA_SLAVE_INVALID,
7 SHDMA_SLAVE_SCIF0_TX,
8 SHDMA_SLAVE_SCIF0_RX,
9 SHDMA_SLAVE_SCIF1_TX,
10 SHDMA_SLAVE_SCIF1_RX,
11 SHDMA_SLAVE_SCIF2_TX,
12 SHDMA_SLAVE_SCIF2_RX,
13 SHDMA_SLAVE_SCIF3_TX,
14 SHDMA_SLAVE_SCIF3_RX,
15 SHDMA_SLAVE_SCIF4_TX,
16 SHDMA_SLAVE_SCIF4_RX,
17 SHDMA_SLAVE_SCIF5_TX,
18 SHDMA_SLAVE_SCIF5_RX,
19 SHDMA_SLAVE_SCIF6_TX,
20 SHDMA_SLAVE_SCIF6_RX,
21 SHDMA_SLAVE_SCIF7_TX,
22 SHDMA_SLAVE_SCIF7_RX,
23 SHDMA_SLAVE_SCIF8_TX,
24 SHDMA_SLAVE_SCIF8_RX,
25 SHDMA_SLAVE_SDHI0_TX,
26 SHDMA_SLAVE_SDHI0_RX,
27 SHDMA_SLAVE_SDHI1_TX,
28 SHDMA_SLAVE_SDHI1_RX,
29 SHDMA_SLAVE_SDHI2_TX,
30 SHDMA_SLAVE_SDHI2_RX,
31 SHDMA_SLAVE_MMCIF_TX,
32 SHDMA_SLAVE_MMCIF_RX,
33 SHDMA_SLAVE_FSI2A_TX,
34 SHDMA_SLAVE_FSI2A_RX,
35 SHDMA_SLAVE_FSI2B_TX,
36 SHDMA_SLAVE_FSI2B_RX,
37 SHDMA_SLAVE_FSI2C_TX,
38 SHDMA_SLAVE_FSI2C_RX,
39 SHDMA_SLAVE_FSI2D_RX,
40};
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71#define SH73A0_PINT0_IRQ(irq) ((irq) + 700)
72#define SH73A0_PINT1_IRQ(irq) ((irq) + 732)
73
74extern void sh73a0_init_irq(void);
75extern void sh73a0_init_irq_dt(void);
76extern void sh73a0_map_io(void);
77extern void sh73a0_earlytimer_init(void);
78extern void sh73a0_add_early_devices(void);
79extern void sh73a0_add_standard_devices(void);
80extern void sh73a0_add_standard_devices_dt(void);
81extern void sh73a0_clock_init(void);
82extern void sh73a0_pinmux_init(void);
83extern void sh73a0_pm_init(void);
84extern struct clk sh73a0_extal1_clk;
85extern struct clk sh73a0_extal2_clk;
86extern struct clk sh73a0_extcki_clk;
87extern struct clk sh73a0_extalr_clk;
88extern struct smp_operations sh73a0_smp_ops;
89
90#endif
91