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21#include <linux/export.h>
22#include <linux/jiffies.h>
23#include <linux/init.h>
24#include <linux/io.h>
25#include <asm/cacheflush.h>
26#include <asm/smp_scu.h>
27#include <linux/irqchip/arm-gic.h>
28#include "common.h"
29
30
31
32
33
34
35static int ncores;
36
37int zynq_cpun_start(u32 address, int cpu)
38{
39 u32 trampoline_code_size = &zynq_secondary_trampoline_end -
40 &zynq_secondary_trampoline;
41
42
43
44 if (!(address & 3) && (!address || (address >= trampoline_code_size))) {
45
46 static u8 __iomem *zero;
47 u32 trampoline_size = &zynq_secondary_trampoline_jump -
48 &zynq_secondary_trampoline;
49
50 zynq_slcr_cpu_stop(cpu);
51 if (address) {
52 if (__pa(PAGE_OFFSET)) {
53 zero = ioremap(0, trampoline_code_size);
54 if (!zero) {
55 pr_warn("BOOTUP jump vectors not accessible\n");
56 return -1;
57 }
58 } else {
59 zero = (__force u8 __iomem *)PAGE_OFFSET;
60 }
61
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66
67
68 memcpy((__force void *)zero, &zynq_secondary_trampoline,
69 trampoline_size);
70 writel(address, zero + trampoline_size);
71
72 flush_cache_all();
73 outer_flush_range(0, trampoline_code_size);
74 smp_wmb();
75
76 if (__pa(PAGE_OFFSET))
77 iounmap(zero);
78 }
79 zynq_slcr_cpu_start(cpu);
80
81 return 0;
82 }
83
84 pr_warn("Can't start CPU%d: Wrong starting address %x\n", cpu, address);
85
86 return -1;
87}
88EXPORT_SYMBOL(zynq_cpun_start);
89
90static int zynq_boot_secondary(unsigned int cpu,
91 struct task_struct *idle)
92{
93 return zynq_cpun_start(virt_to_phys(zynq_secondary_startup), cpu);
94}
95
96
97
98
99
100static void __init zynq_smp_init_cpus(void)
101{
102 int i;
103
104 ncores = scu_get_core_count(zynq_scu_base);
105
106 for (i = 0; i < ncores && i < CONFIG_NR_CPUS; i++)
107 set_cpu_possible(i, true);
108}
109
110static void __init zynq_smp_prepare_cpus(unsigned int max_cpus)
111{
112 scu_enable(zynq_scu_base);
113}
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121
122static void zynq_secondary_init(unsigned int cpu)
123{
124 zynq_core_pm_init();
125}
126
127#ifdef CONFIG_HOTPLUG_CPU
128static int zynq_cpu_kill(unsigned cpu)
129{
130 unsigned long timeout = jiffies + msecs_to_jiffies(50);
131
132 while (zynq_slcr_cpu_state_read(cpu))
133 if (time_after(jiffies, timeout))
134 return 0;
135
136 zynq_slcr_cpu_stop(cpu);
137 return 1;
138}
139
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145
146
147static void zynq_cpu_die(unsigned int cpu)
148{
149 zynq_slcr_cpu_state_write(cpu, true);
150
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154
155
156 for (;;)
157 cpu_do_idle();
158}
159#endif
160
161struct smp_operations zynq_smp_ops __initdata = {
162 .smp_init_cpus = zynq_smp_init_cpus,
163 .smp_prepare_cpus = zynq_smp_prepare_cpus,
164 .smp_boot_secondary = zynq_boot_secondary,
165 .smp_secondary_init = zynq_secondary_init,
166#ifdef CONFIG_HOTPLUG_CPU
167 .cpu_die = zynq_cpu_die,
168 .cpu_kill = zynq_cpu_kill,
169#endif
170};
171