1#ifndef _ASM_IA64_BITOPS_H
2#define _ASM_IA64_BITOPS_H
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12#ifndef _LINUX_BITOPS_H
13#error only <linux/bitops.h> can be included directly
14#endif
15
16#include <linux/compiler.h>
17#include <linux/types.h>
18#include <asm/intrinsics.h>
19#include <asm/barrier.h>
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38static __inline__ void
39set_bit (int nr, volatile void *addr)
40{
41 __u32 bit, old, new;
42 volatile __u32 *m;
43 CMPXCHG_BUGCHECK_DECL
44
45 m = (volatile __u32 *) addr + (nr >> 5);
46 bit = 1 << (nr & 31);
47 do {
48 CMPXCHG_BUGCHECK(m);
49 old = *m;
50 new = old | bit;
51 } while (cmpxchg_acq(m, old, new) != old);
52}
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62
63static __inline__ void
64__set_bit (int nr, volatile void *addr)
65{
66 *((__u32 *) addr + (nr >> 5)) |= (1 << (nr & 31));
67}
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78
79static __inline__ void
80clear_bit (int nr, volatile void *addr)
81{
82 __u32 mask, old, new;
83 volatile __u32 *m;
84 CMPXCHG_BUGCHECK_DECL
85
86 m = (volatile __u32 *) addr + (nr >> 5);
87 mask = ~(1 << (nr & 31));
88 do {
89 CMPXCHG_BUGCHECK(m);
90 old = *m;
91 new = old & mask;
92 } while (cmpxchg_acq(m, old, new) != old);
93}
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102
103static __inline__ void
104clear_bit_unlock (int nr, volatile void *addr)
105{
106 __u32 mask, old, new;
107 volatile __u32 *m;
108 CMPXCHG_BUGCHECK_DECL
109
110 m = (volatile __u32 *) addr + (nr >> 5);
111 mask = ~(1 << (nr & 31));
112 do {
113 CMPXCHG_BUGCHECK(m);
114 old = *m;
115 new = old & mask;
116 } while (cmpxchg_rel(m, old, new) != old);
117}
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126
127static __inline__ void
128__clear_bit_unlock(int nr, void *addr)
129{
130 __u32 * const m = (__u32 *) addr + (nr >> 5);
131 __u32 const new = *m & ~(1 << (nr & 31));
132
133 ia64_st4_rel_nta(m, new);
134}
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145static __inline__ void
146__clear_bit (int nr, volatile void *addr)
147{
148 *((__u32 *) addr + (nr >> 5)) &= ~(1 << (nr & 31));
149}
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160static __inline__ void
161change_bit (int nr, volatile void *addr)
162{
163 __u32 bit, old, new;
164 volatile __u32 *m;
165 CMPXCHG_BUGCHECK_DECL
166
167 m = (volatile __u32 *) addr + (nr >> 5);
168 bit = (1 << (nr & 31));
169 do {
170 CMPXCHG_BUGCHECK(m);
171 old = *m;
172 new = old ^ bit;
173 } while (cmpxchg_acq(m, old, new) != old);
174}
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185static __inline__ void
186__change_bit (int nr, volatile void *addr)
187{
188 *((__u32 *) addr + (nr >> 5)) ^= (1 << (nr & 31));
189}
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199static __inline__ int
200test_and_set_bit (int nr, volatile void *addr)
201{
202 __u32 bit, old, new;
203 volatile __u32 *m;
204 CMPXCHG_BUGCHECK_DECL
205
206 m = (volatile __u32 *) addr + (nr >> 5);
207 bit = 1 << (nr & 31);
208 do {
209 CMPXCHG_BUGCHECK(m);
210 old = *m;
211 new = old | bit;
212 } while (cmpxchg_acq(m, old, new) != old);
213 return (old & bit) != 0;
214}
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222
223#define test_and_set_bit_lock test_and_set_bit
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234static __inline__ int
235__test_and_set_bit (int nr, volatile void *addr)
236{
237 __u32 *p = (__u32 *) addr + (nr >> 5);
238 __u32 m = 1 << (nr & 31);
239 int oldbitset = (*p & m) != 0;
240
241 *p |= m;
242 return oldbitset;
243}
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252
253static __inline__ int
254test_and_clear_bit (int nr, volatile void *addr)
255{
256 __u32 mask, old, new;
257 volatile __u32 *m;
258 CMPXCHG_BUGCHECK_DECL
259
260 m = (volatile __u32 *) addr + (nr >> 5);
261 mask = ~(1 << (nr & 31));
262 do {
263 CMPXCHG_BUGCHECK(m);
264 old = *m;
265 new = old & mask;
266 } while (cmpxchg_acq(m, old, new) != old);
267 return (old & ~mask) != 0;
268}
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278
279static __inline__ int
280__test_and_clear_bit(int nr, volatile void * addr)
281{
282 __u32 *p = (__u32 *) addr + (nr >> 5);
283 __u32 m = 1 << (nr & 31);
284 int oldbitset = (*p & m) != 0;
285
286 *p &= ~m;
287 return oldbitset;
288}
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297
298static __inline__ int
299test_and_change_bit (int nr, volatile void *addr)
300{
301 __u32 bit, old, new;
302 volatile __u32 *m;
303 CMPXCHG_BUGCHECK_DECL
304
305 m = (volatile __u32 *) addr + (nr >> 5);
306 bit = (1 << (nr & 31));
307 do {
308 CMPXCHG_BUGCHECK(m);
309 old = *m;
310 new = old ^ bit;
311 } while (cmpxchg_acq(m, old, new) != old);
312 return (old & bit) != 0;
313}
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321
322static __inline__ int
323__test_and_change_bit (int nr, void *addr)
324{
325 __u32 old, bit = (1 << (nr & 31));
326 __u32 *m = (__u32 *) addr + (nr >> 5);
327
328 old = *m;
329 *m = old ^ bit;
330 return (old & bit) != 0;
331}
332
333static __inline__ int
334test_bit (int nr, const volatile void *addr)
335{
336 return 1 & (((const volatile __u32 *) addr)[nr >> 5] >> (nr & 31));
337}
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345
346static inline unsigned long
347ffz (unsigned long x)
348{
349 unsigned long result;
350
351 result = ia64_popcnt(x & (~x - 1));
352 return result;
353}
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361static __inline__ unsigned long
362__ffs (unsigned long x)
363{
364 unsigned long result;
365
366 result = ia64_popcnt((x-1) & ~x);
367 return result;
368}
369
370#ifdef __KERNEL__
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376static inline unsigned long
377ia64_fls (unsigned long x)
378{
379 long double d = x;
380 long exp;
381
382 exp = ia64_getf_exp(d);
383 return exp - 0xffff;
384}
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390static inline int
391fls (int t)
392{
393 unsigned long x = t & 0xffffffffu;
394
395 if (!x)
396 return 0;
397 x |= x >> 1;
398 x |= x >> 2;
399 x |= x >> 4;
400 x |= x >> 8;
401 x |= x >> 16;
402 return ia64_popcnt(x);
403}
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408
409static inline unsigned long
410__fls (unsigned long x)
411{
412 x |= x >> 1;
413 x |= x >> 2;
414 x |= x >> 4;
415 x |= x >> 8;
416 x |= x >> 16;
417 x |= x >> 32;
418 return ia64_popcnt(x) - 1;
419}
420
421#include <asm-generic/bitops/fls64.h>
422
423#include <asm-generic/bitops/builtin-ffs.h>
424
425
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428
429static __inline__ unsigned long __arch_hweight64(unsigned long x)
430{
431 unsigned long result;
432 result = ia64_popcnt(x);
433 return result;
434}
435
436#define __arch_hweight32(x) ((unsigned int) __arch_hweight64((x) & 0xfffffffful))
437#define __arch_hweight16(x) ((unsigned int) __arch_hweight64((x) & 0xfffful))
438#define __arch_hweight8(x) ((unsigned int) __arch_hweight64((x) & 0xfful))
439
440#include <asm-generic/bitops/const_hweight.h>
441
442#endif
443
444#include <asm-generic/bitops/find.h>
445
446#ifdef __KERNEL__
447
448#include <asm-generic/bitops/le.h>
449
450#include <asm-generic/bitops/ext2-atomic-setbit.h>
451
452#include <asm-generic/bitops/sched.h>
453
454#endif
455
456#endif
457