linux/arch/m68k/lib/udivsi3.S
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   1/* libgcc1 routines for 68000 w/o floating-point hardware.
   2   Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
   3
   4This file is part of GNU CC.
   5
   6GNU CC is free software; you can redistribute it and/or modify it
   7under the terms of the GNU General Public License as published by the
   8Free Software Foundation; either version 2, or (at your option) any
   9later version.
  10
  11In addition to the permissions in the GNU General Public License, the
  12Free Software Foundation gives you unlimited permission to link the
  13compiled version of this file with other programs, and to distribute
  14those programs without any restriction coming from the use of this
  15file.  (The General Public License restrictions do apply in other
  16respects; for example, they cover modification of the file, and
  17distribution when not linked into another program.)
  18
  19This file is distributed in the hope that it will be useful, but
  20WITHOUT ANY WARRANTY; without even the implied warranty of
  21MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  22General Public License for more details.
  23
  24You should have received a copy of the GNU General Public License
  25along with this program; see the file COPYING.  If not, write to
  26the Free Software Foundation, 59 Temple Place - Suite 330,
  27Boston, MA 02111-1307, USA.  */
  28
  29/* As a special exception, if you link this library with files
  30   compiled with GCC to produce an executable, this does not cause
  31   the resulting executable to be covered by the GNU General Public License.
  32   This exception does not however invalidate any other reasons why
  33   the executable file might be covered by the GNU General Public License.  */
  34
  35/* Use this one for any 680x0; assumes no floating point hardware.
  36   The trailing " '" appearing on some lines is for ANSI preprocessors.  Yuk.
  37   Some of this code comes from MINIX, via the folks at ericsson.
  38   D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
  39*/
  40
  41/* These are predefined by new versions of GNU cpp.  */
  42
  43#ifndef __USER_LABEL_PREFIX__
  44#define __USER_LABEL_PREFIX__ _
  45#endif
  46
  47#ifndef __REGISTER_PREFIX__
  48#define __REGISTER_PREFIX__
  49#endif
  50
  51#ifndef __IMMEDIATE_PREFIX__
  52#define __IMMEDIATE_PREFIX__ #
  53#endif
  54
  55/* ANSI concatenation macros.  */
  56
  57#define CONCAT1(a, b) CONCAT2(a, b)
  58#define CONCAT2(a, b) a ## b
  59
  60/* Use the right prefix for global labels.  */
  61
  62#define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
  63
  64/* Use the right prefix for registers.  */
  65
  66#define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
  67
  68/* Use the right prefix for immediate values.  */
  69
  70#define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
  71
  72#define d0 REG (d0)
  73#define d1 REG (d1)
  74#define d2 REG (d2)
  75#define d3 REG (d3)
  76#define d4 REG (d4)
  77#define d5 REG (d5)
  78#define d6 REG (d6)
  79#define d7 REG (d7)
  80#define a0 REG (a0)
  81#define a1 REG (a1)
  82#define a2 REG (a2)
  83#define a3 REG (a3)
  84#define a4 REG (a4)
  85#define a5 REG (a5)
  86#define a6 REG (a6)
  87#define fp REG (fp)
  88#define sp REG (sp)
  89
  90        .text
  91        .proc
  92        .globl  SYM (__udivsi3)
  93SYM (__udivsi3):
  94#if !(defined(__mcf5200__) || defined(__mcoldfire__))
  95        movel   d2, sp@-
  96        movel   sp@(12), d1     /* d1 = divisor */
  97        movel   sp@(8), d0      /* d0 = dividend */
  98
  99        cmpl    IMM (0x10000), d1 /* divisor >= 2 ^ 16 ?   */
 100        jcc     L3              /* then try next algorithm */
 101        movel   d0, d2
 102        clrw    d2
 103        swap    d2
 104        divu    d1, d2          /* high quotient in lower word */
 105        movew   d2, d0          /* save high quotient */
 106        swap    d0
 107        movew   sp@(10), d2     /* get low dividend + high rest */
 108        divu    d1, d2          /* low quotient */
 109        movew   d2, d0
 110        jra     L6
 111
 112L3:     movel   d1, d2          /* use d2 as divisor backup */
 113L4:     lsrl    IMM (1), d1     /* shift divisor */
 114        lsrl    IMM (1), d0     /* shift dividend */
 115        cmpl    IMM (0x10000), d1 /* still divisor >= 2 ^ 16 ?  */
 116        jcc     L4
 117        divu    d1, d0          /* now we have 16 bit divisor */
 118        andl    IMM (0xffff), d0 /* mask out divisor, ignore remainder */
 119
 120/* Multiply the 16 bit tentative quotient with the 32 bit divisor.  Because of
 121   the operand ranges, this might give a 33 bit product.  If this product is
 122   greater than the dividend, the tentative quotient was too large. */
 123        movel   d2, d1
 124        mulu    d0, d1          /* low part, 32 bits */
 125        swap    d2
 126        mulu    d0, d2          /* high part, at most 17 bits */
 127        swap    d2              /* align high part with low part */
 128        tstw    d2              /* high part 17 bits? */
 129        jne     L5              /* if 17 bits, quotient was too large */
 130        addl    d2, d1          /* add parts */
 131        jcs     L5              /* if sum is 33 bits, quotient was too large */
 132        cmpl    sp@(8), d1      /* compare the sum with the dividend */
 133        jls     L6              /* if sum > dividend, quotient was too large */
 134L5:     subql   IMM (1), d0     /* adjust quotient */
 135
 136L6:     movel   sp@+, d2
 137        rts
 138
 139#else /* __mcf5200__ || __mcoldfire__ */
 140
 141/* Coldfire implementation of non-restoring division algorithm from
 142   Hennessy & Patterson, Appendix A. */
 143        link    a6,IMM (-12)
 144        moveml  d2-d4,sp@
 145        movel   a6@(8),d0
 146        movel   a6@(12),d1
 147        clrl    d2              | clear p
 148        moveq   IMM (31),d4
 149L1:     addl    d0,d0           | shift reg pair (p,a) one bit left
 150        addxl   d2,d2
 151        movl    d2,d3           | subtract b from p, store in tmp.
 152        subl    d1,d3
 153        jcs     L2              | if no carry,
 154        bset    IMM (0),d0      | set the low order bit of a to 1,
 155        movl    d3,d2           | and store tmp in p.
 156L2:     subql   IMM (1),d4
 157        jcc     L1
 158        moveml  sp@,d2-d4       | restore data registers
 159        unlk    a6              | and return
 160        rts
 161#endif /* __mcf5200__ || __mcoldfire__ */
 162
 163