LXR linux/arch/mips/include/asm/pci.h

   1/*
   2 * This file is subject to the terms and conditions of the GNU General Public
   3 * License.  See the file "COPYING" in the main directory of this archive
   4 * for more details.
   5 */
   6#ifndef _ASM_PCI_H
   7#define _ASM_PCI_H
   8
   9#include <linux/mm.h>
  10
  11#ifdef __KERNEL__
  12
  13/*
  14 * This file essentially defines the interface between board
  15 * specific PCI code and MIPS common PCI code.  Should potentially put
  16 * into include/asm/pci.h file.
  17 */
  18
  19#include <linux/ioport.h>
  20#include <linux/of.h>
  21
  22/*
  23 * Each pci channel is a top-level PCI bus seem by CPU.  A machine  with
  24 * multiple PCI channels may have multiple PCI host controllers or a
  25 * single controller supporting multiple channels.
  26 */
  27struct pci_controller {
  28        struct pci_controller *next;
  29        struct pci_bus *bus;
  30        struct device_node *of_node;
  31
  32        struct pci_ops *pci_ops;
  33        struct resource *mem_resource;
  34        unsigned long mem_offset;
  35        struct resource *io_resource;
  36        unsigned long io_offset;
  37        unsigned long io_map_base;
  38
  39        unsigned int index;
  40        /* For compatibility with current (as of July 2003) pciutils
  41           and XFree86. Eventually will be removed. */
  42        unsigned int need_domain_info;
  43
  44        int iommu;
  45
  46        /* Optional access methods for reading/writing the bus number
  47           of the PCI controller */
  48        int (*get_busno)(void);
  49        void (*set_busno)(int busno);
  50};
  51
  52/*
  53 * Used by boards to register their PCI busses before the actual scanning.
  54 */
  55extern void register_pci_controller(struct pci_controller *hose);
  56
  57/*
  58 * board supplied pci irq fixup routine
  59 */
  60extern int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin);
  61
  62
  63/* Can be used to override the logic in pci_scan_bus for skipping
  64   already-configured bus numbers - to be used for buggy BIOSes
  65   or architectures with incomplete PCI setup by the loader */
  66
  67extern unsigned int pcibios_assign_all_busses(void);
  68
  69extern unsigned long PCIBIOS_MIN_IO;
  70extern unsigned long PCIBIOS_MIN_MEM;
  71
  72#define PCIBIOS_MIN_CARDBUS_IO  0x4000
  73
  74extern void pcibios_set_master(struct pci_dev *dev);
  75
  76#define HAVE_PCI_MMAP
  77
  78extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
  79        enum pci_mmap_state mmap_state, int write_combine);
  80
  81#define HAVE_ARCH_PCI_RESOURCE_TO_USER
  82
  83static inline void pci_resource_to_user(const struct pci_dev *dev, int bar,
  84                const struct resource *rsrc, resource_size_t *start,
  85                resource_size_t *end)
  86{
  87        phys_addr_t size = resource_size(rsrc);
  88
  89        *start = fixup_bigphys_addr(rsrc->start, size);
  90        *end = rsrc->start + size;
  91}
  92
  93/*
  94 * Dynamic DMA mapping stuff.
  95 * MIPS has everything mapped statically.
  96 */
  97
  98#include <linux/types.h>
  99#include <linux/slab.h>
 100#include <asm/scatterlist.h>
 101#include <linux/string.h>
 102#include <asm/io.h>
 103#include <asm-generic/pci-bridge.h>
 104
 105struct pci_dev;
 106
 107/*
 108 * The PCI address space does equal the physical memory address space.  The
 109 * networking and block device layers use this boolean for bounce buffer
 110 * decisions.  This is set if any hose does not have an IOMMU.
 111 */
 112extern unsigned int PCI_DMA_BUS_IS_PHYS;
 113
 114#ifdef CONFIG_PCI
 115static inline void pci_dma_burst_advice(struct pci_dev *pdev,
 116                                        enum pci_dma_burst_strategy *strat,
 117                                        unsigned long *strategy_parameter)
 118{
 119        *strat = PCI_DMA_BURST_INFINITY;
 120        *strategy_parameter = ~0UL;
 121}
 122#endif
 123
 124#ifdef CONFIG_PCI_DOMAINS
 125#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
 126
 127static inline int pci_proc_domain(struct pci_bus *bus)
 128{
 129        struct pci_controller *hose = bus->sysdata;
 130        return hose->need_domain_info;
 131}
 132#endif /* CONFIG_PCI_DOMAINS */
 133
 134#endif /* __KERNEL__ */
 135
 136/* implement the pci_ DMA API in terms of the generic device dma_ one */
 137#include <asm-generic/pci-dma-compat.h>
 138
 139/* Do platform specific device initialization at pci_enable_device() time */
 140extern int pcibios_plat_dev_init(struct pci_dev *dev);
 141
 142/* Chances are this interrupt is wired PC-style ...  */
 143static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
 144{
 145        return channel ? 15 : 14;
 146}
 147
 148extern char * (*pcibios_plat_setup)(char *str);
 149
 150#ifdef CONFIG_OF
 151/* this function parses memory ranges from a device node */
 152extern void pci_load_of_ranges(struct pci_controller *hose,
 153                               struct device_node *node);
 154#else
 155static inline void pci_load_of_ranges(struct pci_controller *hose,
 156                                      struct device_node *node) {}
 157#endif
 158
 159#endif /* _ASM_PCI_H */
 160