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36#ifndef _ASM_POWERPC_BITOPS_H
37#define _ASM_POWERPC_BITOPS_H
38
39#ifdef __KERNEL__
40
41#ifndef _LINUX_BITOPS_H
42#error only <linux/bitops.h> can be included directly
43#endif
44
45#include <linux/compiler.h>
46#include <asm/asm-compat.h>
47#include <asm/synch.h>
48
49
50#define PPC_BITLSHIFT(be) (BITS_PER_LONG - 1 - (be))
51#define PPC_BIT(bit) (1UL << PPC_BITLSHIFT(bit))
52#define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs))
53
54#include <asm/barrier.h>
55
56
57#define DEFINE_BITOP(fn, op, prefix) \
58static __inline__ void fn(unsigned long mask, \
59 volatile unsigned long *_p) \
60{ \
61 unsigned long old; \
62 unsigned long *p = (unsigned long *)_p; \
63 __asm__ __volatile__ ( \
64 prefix \
65"1:" PPC_LLARX(%0,0,%3,0) "\n" \
66 stringify_in_c(op) "%0,%0,%2\n" \
67 PPC405_ERR77(0,%3) \
68 PPC_STLCX "%0,0,%3\n" \
69 "bne- 1b\n" \
70 : "=&r" (old), "+m" (*p) \
71 : "r" (mask), "r" (p) \
72 : "cc", "memory"); \
73}
74
75DEFINE_BITOP(set_bits, or, "")
76DEFINE_BITOP(clear_bits, andc, "")
77DEFINE_BITOP(clear_bits_unlock, andc, PPC_RELEASE_BARRIER)
78DEFINE_BITOP(change_bits, xor, "")
79
80static __inline__ void set_bit(int nr, volatile unsigned long *addr)
81{
82 set_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
83}
84
85static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
86{
87 clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
88}
89
90static __inline__ void clear_bit_unlock(int nr, volatile unsigned long *addr)
91{
92 clear_bits_unlock(BIT_MASK(nr), addr + BIT_WORD(nr));
93}
94
95static __inline__ void change_bit(int nr, volatile unsigned long *addr)
96{
97 change_bits(BIT_MASK(nr), addr + BIT_WORD(nr));
98}
99
100
101
102#define DEFINE_TESTOP(fn, op, prefix, postfix, eh) \
103static __inline__ unsigned long fn( \
104 unsigned long mask, \
105 volatile unsigned long *_p) \
106{ \
107 unsigned long old, t; \
108 unsigned long *p = (unsigned long *)_p; \
109 __asm__ __volatile__ ( \
110 prefix \
111"1:" PPC_LLARX(%0,0,%3,eh) "\n" \
112 stringify_in_c(op) "%1,%0,%2\n" \
113 PPC405_ERR77(0,%3) \
114 PPC_STLCX "%1,0,%3\n" \
115 "bne- 1b\n" \
116 postfix \
117 : "=&r" (old), "=&r" (t) \
118 : "r" (mask), "r" (p) \
119 : "cc", "memory"); \
120 return (old & mask); \
121}
122
123DEFINE_TESTOP(test_and_set_bits, or, PPC_ATOMIC_ENTRY_BARRIER,
124 PPC_ATOMIC_EXIT_BARRIER, 0)
125DEFINE_TESTOP(test_and_set_bits_lock, or, "",
126 PPC_ACQUIRE_BARRIER, 1)
127DEFINE_TESTOP(test_and_clear_bits, andc, PPC_ATOMIC_ENTRY_BARRIER,
128 PPC_ATOMIC_EXIT_BARRIER, 0)
129DEFINE_TESTOP(test_and_change_bits, xor, PPC_ATOMIC_ENTRY_BARRIER,
130 PPC_ATOMIC_EXIT_BARRIER, 0)
131
132static __inline__ int test_and_set_bit(unsigned long nr,
133 volatile unsigned long *addr)
134{
135 return test_and_set_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
136}
137
138static __inline__ int test_and_set_bit_lock(unsigned long nr,
139 volatile unsigned long *addr)
140{
141 return test_and_set_bits_lock(BIT_MASK(nr),
142 addr + BIT_WORD(nr)) != 0;
143}
144
145static __inline__ int test_and_clear_bit(unsigned long nr,
146 volatile unsigned long *addr)
147{
148 return test_and_clear_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
149}
150
151static __inline__ int test_and_change_bit(unsigned long nr,
152 volatile unsigned long *addr)
153{
154 return test_and_change_bits(BIT_MASK(nr), addr + BIT_WORD(nr)) != 0;
155}
156
157#include <asm-generic/bitops/non-atomic.h>
158
159static __inline__ void __clear_bit_unlock(int nr, volatile unsigned long *addr)
160{
161 __asm__ __volatile__(PPC_RELEASE_BARRIER "" ::: "memory");
162 __clear_bit(nr, addr);
163}
164
165
166
167
168
169static __inline__ __attribute__((const))
170int __ilog2(unsigned long x)
171{
172 int lz;
173
174 asm (PPC_CNTLZL "%0,%1" : "=r" (lz) : "r" (x));
175 return BITS_PER_LONG - 1 - lz;
176}
177
178static inline __attribute__((const))
179int __ilog2_u32(u32 n)
180{
181 int bit;
182 asm ("cntlzw %0,%1" : "=r" (bit) : "r" (n));
183 return 31 - bit;
184}
185
186#ifdef __powerpc64__
187static inline __attribute__((const))
188int __ilog2_u64(u64 n)
189{
190 int bit;
191 asm ("cntlzd %0,%1" : "=r" (bit) : "r" (n));
192 return 63 - bit;
193}
194#endif
195
196
197
198
199
200
201static __inline__ unsigned long ffz(unsigned long x)
202{
203
204 if ((x = ~x) == 0)
205 return BITS_PER_LONG;
206
207
208
209
210
211
212
213 return __ilog2(x & -x);
214}
215
216static __inline__ unsigned long __ffs(unsigned long x)
217{
218 return __ilog2(x & -x);
219}
220
221
222
223
224
225
226static __inline__ int ffs(int x)
227{
228 unsigned long i = (unsigned long)x;
229 return __ilog2(i & -i) + 1;
230}
231
232
233
234
235
236static __inline__ int fls(unsigned int x)
237{
238 int lz;
239
240 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
241 return 32 - lz;
242}
243
244static __inline__ unsigned long __fls(unsigned long x)
245{
246 return __ilog2(x);
247}
248
249
250
251
252
253
254#ifdef __powerpc64__
255static __inline__ int fls64(__u64 x)
256{
257 int lz;
258
259 asm ("cntlzd %0,%1" : "=r" (lz) : "r" (x));
260 return 64 - lz;
261}
262#else
263#include <asm-generic/bitops/fls64.h>
264#endif
265
266#ifdef CONFIG_PPC64
267unsigned int __arch_hweight8(unsigned int w);
268unsigned int __arch_hweight16(unsigned int w);
269unsigned int __arch_hweight32(unsigned int w);
270unsigned long __arch_hweight64(__u64 w);
271#include <asm-generic/bitops/const_hweight.h>
272#else
273#include <asm-generic/bitops/hweight.h>
274#endif
275
276#include <asm-generic/bitops/find.h>
277
278
279#include <asm-generic/bitops/le.h>
280
281
282
283#include <asm-generic/bitops/ext2-atomic-setbit.h>
284
285#include <asm-generic/bitops/sched.h>
286
287#endif
288
289#endif
290