LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/hdmigt215.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "nv50.h"
  25#include "outp.h"
  26
  27#include <core/client.h>
  28
  29#include <nvif/class.h>
  30#include <nvif/unpack.h>
  31
  32int
  33gt215_hdmi_ctrl(NV50_DISP_MTHD_V1)
  34{
  35        const u32 soff = outp->or * 0x800;
  36        union {
  37                struct nv50_disp_sor_hdmi_pwr_v0 v0;
  38        } *args = data;
  39        u32 ctrl;
  40        int ret;
  41
  42        nv_ioctl(object, "disp sor hdmi ctrl size %d\n", size);
  43        if (nvif_unpack(args->v0, 0, 0, false)) {
  44                nv_ioctl(object, "disp sor hdmi ctrl vers %d state %d "
  45                                 "max_ac_packet %d rekey %d\n",
  46                         args->v0.version, args->v0.state,
  47                         args->v0.max_ac_packet, args->v0.rekey);
  48                if (args->v0.max_ac_packet > 0x1f || args->v0.rekey > 0x7f)
  49                        return -EINVAL;
  50                ctrl  = 0x40000000 * !!args->v0.state;
  51                ctrl |= args->v0.max_ac_packet << 16;
  52                ctrl |= args->v0.rekey;
  53                ctrl |= 0x1f000000; /* ??? */
  54        } else
  55                return ret;
  56
  57        if (!(ctrl & 0x40000000)) {
  58                nv_mask(priv, 0x61c5a4 + soff, 0x40000000, 0x00000000);
  59                nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000000);
  60                nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000000);
  61                return 0;
  62        }
  63
  64        /* AVI InfoFrame */
  65        nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000000);
  66        nv_wr32(priv, 0x61c528 + soff, 0x000d0282);
  67        nv_wr32(priv, 0x61c52c + soff, 0x0000006f);
  68        nv_wr32(priv, 0x61c530 + soff, 0x00000000);
  69        nv_wr32(priv, 0x61c534 + soff, 0x00000000);
  70        nv_wr32(priv, 0x61c538 + soff, 0x00000000);
  71        nv_mask(priv, 0x61c520 + soff, 0x00000001, 0x00000001);
  72
  73        /* Audio InfoFrame */
  74        nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000000);
  75        nv_wr32(priv, 0x61c508 + soff, 0x000a0184);
  76        nv_wr32(priv, 0x61c50c + soff, 0x00000071);
  77        nv_wr32(priv, 0x61c510 + soff, 0x00000000);
  78        nv_mask(priv, 0x61c500 + soff, 0x00000001, 0x00000001);
  79
  80        nv_mask(priv, 0x61c5d0 + soff, 0x00070001, 0x00010001); /* SPARE, HW_CTS */
  81        nv_mask(priv, 0x61c568 + soff, 0x00010101, 0x00000000); /* ACR_CTRL, ?? */
  82        nv_mask(priv, 0x61c578 + soff, 0x80000000, 0x80000000); /* ACR_0441_ENABLE */
  83
  84        /* ??? */
  85        nv_mask(priv, 0x61733c, 0x00100000, 0x00100000); /* RESETF */
  86        nv_mask(priv, 0x61733c, 0x10000000, 0x10000000); /* LOOKUP_EN */
  87        nv_mask(priv, 0x61733c, 0x00100000, 0x00000000); /* !RESETF */
  88
  89        /* HDMI_CTRL */
  90        nv_mask(priv, 0x61c5a4 + soff, 0x5f1f007f, ctrl);
  91        return 0;
  92}
  93