LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/msppp/gf100.c

   1/*
   2 * Copyright 2012 Maarten Lankhorst
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Maarten Lankhorst
  23 */
  24#include <engine/msppp.h>
  25#include <engine/falcon.h>
  26
  27struct gf100_msppp_priv {
  28        struct nvkm_falcon base;
  29};
  30
  31/*******************************************************************************
  32 * MSPPP object classes
  33 ******************************************************************************/
  34
  35static struct nvkm_oclass
  36gf100_msppp_sclass[] = {
  37        { 0x90b3, &nvkm_object_ofuncs },
  38        {},
  39};
  40
  41/*******************************************************************************
  42 * PMSPPP context
  43 ******************************************************************************/
  44
  45static struct nvkm_oclass
  46gf100_msppp_cclass = {
  47        .handle = NV_ENGCTX(MSPPP, 0xc0),
  48        .ofuncs = &(struct nvkm_ofuncs) {
  49                .ctor = _nvkm_falcon_context_ctor,
  50                .dtor = _nvkm_falcon_context_dtor,
  51                .init = _nvkm_falcon_context_init,
  52                .fini = _nvkm_falcon_context_fini,
  53                .rd32 = _nvkm_falcon_context_rd32,
  54                .wr32 = _nvkm_falcon_context_wr32,
  55        },
  56};
  57
  58/*******************************************************************************
  59 * PMSPPP engine/subdev functions
  60 ******************************************************************************/
  61
  62static int
  63gf100_msppp_init(struct nvkm_object *object)
  64{
  65        struct gf100_msppp_priv *priv = (void *)object;
  66        int ret;
  67
  68        ret = nvkm_falcon_init(&priv->base);
  69        if (ret)
  70                return ret;
  71
  72        nv_wr32(priv, 0x086010, 0x0000fff2);
  73        nv_wr32(priv, 0x08601c, 0x0000fff2);
  74        return 0;
  75}
  76
  77static int
  78gf100_msppp_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  79                 struct nvkm_oclass *oclass, void *data, u32 size,
  80                 struct nvkm_object **pobject)
  81{
  82        struct gf100_msppp_priv *priv;
  83        int ret;
  84
  85        ret = nvkm_falcon_create(parent, engine, oclass, 0x086000, true,
  86                                 "PMSPPP", "msppp", &priv);
  87        *pobject = nv_object(priv);
  88        if (ret)
  89                return ret;
  90
  91        nv_subdev(priv)->unit = 0x00000002;
  92        nv_subdev(priv)->intr = nvkm_falcon_intr;
  93        nv_engine(priv)->cclass = &gf100_msppp_cclass;
  94        nv_engine(priv)->sclass = gf100_msppp_sclass;
  95        return 0;
  96}
  97
  98struct nvkm_oclass
  99gf100_msppp_oclass = {
 100        .handle = NV_ENGINE(MSPPP, 0xc0),
 101        .ofuncs = &(struct nvkm_ofuncs) {
 102                .ctor = gf100_msppp_ctor,
 103                .dtor = _nvkm_falcon_dtor,
 104                .init = gf100_msppp_init,
 105                .fini = _nvkm_falcon_fini,
 106                .rd32 = _nvkm_falcon_rd32,
 107                .wr32 = _nvkm_falcon_wr32,
 108        },
 109};
 110