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17#include <linux/errno.h>
18#include <linux/io.h>
19#include <linux/irq.h>
20#include <linux/irqdomain.h>
21#include <linux/of.h>
22#include <linux/of_address.h>
23#include <linux/slab.h>
24
25#include "irq-atmel-aic-common.h"
26
27#define AT91_AIC_PRIOR GENMASK(2, 0)
28#define AT91_AIC_IRQ_MIN_PRIORITY 0
29#define AT91_AIC_IRQ_MAX_PRIORITY 7
30
31#define AT91_AIC_SRCTYPE GENMASK(6, 5)
32#define AT91_AIC_SRCTYPE_LOW (0 << 5)
33#define AT91_AIC_SRCTYPE_FALLING (1 << 5)
34#define AT91_AIC_SRCTYPE_HIGH (2 << 5)
35#define AT91_AIC_SRCTYPE_RISING (3 << 5)
36
37struct aic_chip_data {
38 u32 ext_irqs;
39};
40
41static void aic_common_shutdown(struct irq_data *d)
42{
43 struct irq_chip_type *ct = irq_data_get_chip_type(d);
44
45 ct->chip.irq_mask(d);
46}
47
48int aic_common_set_type(struct irq_data *d, unsigned type, unsigned *val)
49{
50 struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d);
51 struct aic_chip_data *aic = gc->private;
52 unsigned aic_type;
53
54 switch (type) {
55 case IRQ_TYPE_LEVEL_HIGH:
56 aic_type = AT91_AIC_SRCTYPE_HIGH;
57 break;
58 case IRQ_TYPE_EDGE_RISING:
59 aic_type = AT91_AIC_SRCTYPE_RISING;
60 break;
61 case IRQ_TYPE_LEVEL_LOW:
62 if (!(d->mask & aic->ext_irqs))
63 return -EINVAL;
64
65 aic_type = AT91_AIC_SRCTYPE_LOW;
66 break;
67 case IRQ_TYPE_EDGE_FALLING:
68 if (!(d->mask & aic->ext_irqs))
69 return -EINVAL;
70
71 aic_type = AT91_AIC_SRCTYPE_FALLING;
72 break;
73 default:
74 return -EINVAL;
75 }
76
77 *val &= ~AT91_AIC_SRCTYPE;
78 *val |= aic_type;
79
80 return 0;
81}
82
83int aic_common_set_priority(int priority, unsigned *val)
84{
85 if (priority < AT91_AIC_IRQ_MIN_PRIORITY ||
86 priority > AT91_AIC_IRQ_MAX_PRIORITY)
87 return -EINVAL;
88
89 *val &= AT91_AIC_PRIOR;
90 *val |= priority;
91
92 return 0;
93}
94
95int aic_common_irq_domain_xlate(struct irq_domain *d,
96 struct device_node *ctrlr,
97 const u32 *intspec,
98 unsigned int intsize,
99 irq_hw_number_t *out_hwirq,
100 unsigned int *out_type)
101{
102 if (WARN_ON(intsize < 3))
103 return -EINVAL;
104
105 if (WARN_ON((intspec[2] < AT91_AIC_IRQ_MIN_PRIORITY) ||
106 (intspec[2] > AT91_AIC_IRQ_MAX_PRIORITY)))
107 return -EINVAL;
108
109 *out_hwirq = intspec[0];
110 *out_type = intspec[1] & IRQ_TYPE_SENSE_MASK;
111
112 return 0;
113}
114
115static void __init aic_common_ext_irq_of_init(struct irq_domain *domain)
116{
117 struct device_node *node = domain->of_node;
118 struct irq_chip_generic *gc;
119 struct aic_chip_data *aic;
120 struct property *prop;
121 const __be32 *p;
122 u32 hwirq;
123
124 gc = irq_get_domain_generic_chip(domain, 0);
125
126 aic = gc->private;
127 aic->ext_irqs |= 1;
128
129 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, hwirq) {
130 gc = irq_get_domain_generic_chip(domain, hwirq);
131 if (!gc) {
132 pr_warn("AIC: external irq %d >= %d skip it\n",
133 hwirq, domain->revmap_size);
134 continue;
135 }
136
137 aic = gc->private;
138 aic->ext_irqs |= (1 << (hwirq % 32));
139 }
140}
141
142#define AT91_RTC_IDR 0x24
143#define AT91_RTC_IMR 0x28
144#define AT91_RTC_IRQ_MASK 0x1f
145
146void __init aic_common_rtc_irq_fixup(struct device_node *root)
147{
148 struct device_node *np;
149 void __iomem *regs;
150
151 np = of_find_compatible_node(root, NULL, "atmel,at91rm9200-rtc");
152 if (!np)
153 np = of_find_compatible_node(root, NULL,
154 "atmel,at91sam9x5-rtc");
155
156 if (!np)
157 return;
158
159 regs = of_iomap(np, 0);
160 of_node_put(np);
161
162 if (!regs)
163 return;
164
165 writel(AT91_RTC_IRQ_MASK, regs + AT91_RTC_IDR);
166
167 iounmap(regs);
168}
169
170#define AT91_RTT_MR 0x00
171#define AT91_RTT_ALMIEN (1 << 16)
172#define AT91_RTT_RTTINCIEN (1 << 17)
173
174void __init aic_common_rtt_irq_fixup(struct device_node *root)
175{
176 struct device_node *np;
177 void __iomem *regs;
178
179
180
181
182
183 for_each_compatible_node(np, NULL, "atmel,at91sam9260-rtt") {
184 regs = of_iomap(np, 0);
185 if (!regs)
186 continue;
187
188 writel(readl(regs + AT91_RTT_MR) &
189 ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN),
190 regs + AT91_RTT_MR);
191
192 iounmap(regs);
193 }
194}
195
196void __init aic_common_irq_fixup(const struct of_device_id *matches)
197{
198 struct device_node *root = of_find_node_by_path("/");
199 const struct of_device_id *match;
200
201 if (!root)
202 return;
203
204 match = of_match_node(matches, root);
205 of_node_put(root);
206
207 if (match) {
208 void (*fixup)(struct device_node *) = match->data;
209 fixup(root);
210 }
211
212 of_node_put(root);
213}
214
215struct irq_domain *__init aic_common_of_init(struct device_node *node,
216 const struct irq_domain_ops *ops,
217 const char *name, int nirqs)
218{
219 struct irq_chip_generic *gc;
220 struct irq_domain *domain;
221 struct aic_chip_data *aic;
222 void __iomem *reg_base;
223 int nchips;
224 int ret;
225 int i;
226
227 nchips = DIV_ROUND_UP(nirqs, 32);
228
229 reg_base = of_iomap(node, 0);
230 if (!reg_base)
231 return ERR_PTR(-ENOMEM);
232
233 aic = kcalloc(nchips, sizeof(*aic), GFP_KERNEL);
234 if (!aic) {
235 ret = -ENOMEM;
236 goto err_iounmap;
237 }
238
239 domain = irq_domain_add_linear(node, nchips * 32, ops, aic);
240 if (!domain) {
241 ret = -ENOMEM;
242 goto err_free_aic;
243 }
244
245 ret = irq_alloc_domain_generic_chips(domain, 32, 1, name,
246 handle_fasteoi_irq,
247 IRQ_NOREQUEST | IRQ_NOPROBE |
248 IRQ_NOAUTOEN, 0, 0);
249 if (ret)
250 goto err_domain_remove;
251
252 for (i = 0; i < nchips; i++) {
253 gc = irq_get_domain_generic_chip(domain, i * 32);
254
255 gc->reg_base = reg_base;
256
257 gc->unused = 0;
258 gc->wake_enabled = ~0;
259 gc->chip_types[0].type = IRQ_TYPE_SENSE_MASK;
260 gc->chip_types[0].chip.irq_eoi = irq_gc_eoi;
261 gc->chip_types[0].chip.irq_set_wake = irq_gc_set_wake;
262 gc->chip_types[0].chip.irq_shutdown = aic_common_shutdown;
263 gc->private = &aic[i];
264 }
265
266 aic_common_ext_irq_of_init(domain);
267
268 return domain;
269
270err_domain_remove:
271 irq_domain_remove(domain);
272
273err_free_aic:
274 kfree(aic);
275
276err_iounmap:
277 iounmap(reg_base);
278
279 return ERR_PTR(ret);
280}
281
