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21#ifndef __SOLO6X10_H
22#define __SOLO6X10_H
23
24#include <linux/pci.h>
25#include <linux/i2c.h>
26#include <linux/mutex.h>
27#include <linux/list.h>
28#include <linux/wait.h>
29#include <linux/stringify.h>
30#include <linux/io.h>
31#include <linux/atomic.h>
32#include <linux/slab.h>
33#include <linux/videodev2.h>
34
35#include <media/v4l2-dev.h>
36#include <media/v4l2-device.h>
37#include <media/v4l2-ctrls.h>
38#include <media/videobuf2-core.h>
39
40#include "solo6x10-regs.h"
41
42#ifndef PCI_VENDOR_ID_SOFTLOGIC
43#define PCI_VENDOR_ID_SOFTLOGIC 0x9413
44#define PCI_DEVICE_ID_SOLO6010 0x6010
45#define PCI_DEVICE_ID_SOLO6110 0x6110
46#endif
47
48#ifndef PCI_VENDOR_ID_BLUECHERRY
49#define PCI_VENDOR_ID_BLUECHERRY 0x1BB3
50
51#define PCI_DEVICE_ID_NEUSOLO_4 0x4304
52#define PCI_DEVICE_ID_NEUSOLO_9 0x4309
53#define PCI_DEVICE_ID_NEUSOLO_16 0x4310
54
55#define PCI_DEVICE_ID_BC_SOLO_4 0x4E04
56#define PCI_DEVICE_ID_BC_SOLO_9 0x4E09
57#define PCI_DEVICE_ID_BC_SOLO_16 0x4E10
58
59#define PCI_DEVICE_ID_BC_6110_4 0x5304
60#define PCI_DEVICE_ID_BC_6110_8 0x5308
61#define PCI_DEVICE_ID_BC_6110_16 0x5310
62#endif
63
64
65#define SOLO_DEV_6010 0
66#define SOLO_DEV_6110 1
67
68#define SOLO6X10_NAME "solo6x10"
69
70#define SOLO_MAX_CHANNELS 16
71
72#define SOLO6X10_VERSION "3.0.0"
73
74
75
76
77
78
79#define SOLO_I2C_ADAPTERS 2
80#define SOLO_I2C_TW 0
81#define SOLO_I2C_SAA 1
82
83
84#define SOLO_NR_P2M 4
85#define SOLO_NR_P2M_DESC 256
86#define SOLO_P2M_DESC_SIZE (SOLO_NR_P2M_DESC * 16)
87
88
89#define SOLO_ENC_MODE_CIF 2
90#define SOLO_ENC_MODE_HD1 1
91#define SOLO_ENC_MODE_D1 9
92
93#define SOLO_DEFAULT_QP 3
94
95#define SOLO_CID_CUSTOM_BASE (V4L2_CID_USER_BASE | 0xf000)
96#define V4L2_CID_MOTION_TRACE (SOLO_CID_CUSTOM_BASE+2)
97#define V4L2_CID_OSD_TEXT (SOLO_CID_CUSTOM_BASE+3)
98
99
100
101
102
103
104
105
106
107
108#define SOLO_MOTION_SZ (45)
109
110enum SOLO_I2C_STATE {
111 IIC_STATE_IDLE,
112 IIC_STATE_START,
113 IIC_STATE_READ,
114 IIC_STATE_WRITE,
115 IIC_STATE_STOP
116};
117
118
119struct solo_p2m_desc {
120 u32 ctrl;
121 u32 cfg;
122 u32 dma_addr;
123 u32 ext_addr;
124};
125
126struct solo_p2m_dev {
127 struct mutex mutex;
128 struct completion completion;
129 int desc_count;
130 int desc_idx;
131 struct solo_p2m_desc *descs;
132 int error;
133};
134
135#define OSD_TEXT_MAX 44
136
137struct solo_vb2_buf {
138 struct vb2_buffer vb;
139 struct list_head list;
140};
141
142enum solo_enc_types {
143 SOLO_ENC_TYPE_STD,
144 SOLO_ENC_TYPE_EXT,
145};
146
147struct solo_enc_dev {
148 struct solo_dev *solo_dev;
149
150 struct v4l2_ctrl_handler hdl;
151 struct v4l2_ctrl *md_thresholds;
152 struct video_device *vfd;
153
154 struct mutex lock;
155 spinlock_t motion_lock;
156 u8 ch;
157 u8 mode, gop, qp, interlaced, interval;
158 u8 bw_weight;
159 u16 motion_thresh;
160 bool motion_global;
161 bool motion_enabled;
162 u16 width;
163 u16 height;
164
165
166 char osd_text[OSD_TEXT_MAX + 1];
167 u8 osd_buf[SOLO_EOSD_EXT_SIZE_MAX]
168 __aligned(4);
169
170
171 u8 vop[64];
172 int vop_len;
173 u8 jpeg_header[1024];
174 int jpeg_len;
175
176 u32 fmt;
177 enum solo_enc_types type;
178 u32 sequence;
179 struct vb2_queue vidq;
180 struct list_head vidq_active;
181 void *alloc_ctx;
182 int desc_count;
183 int desc_nelts;
184 struct solo_p2m_desc *desc_items;
185 dma_addr_t desc_dma;
186 spinlock_t av_lock;
187};
188
189
190struct solo_dev {
191
192 struct pci_dev *pdev;
193 int type;
194 unsigned int time_sync;
195 unsigned int usec_lsb;
196 unsigned int clock_mhz;
197 u8 __iomem *reg_base;
198 int nr_chans;
199 int nr_ext;
200 u32 irq_mask;
201 u32 motion_mask;
202 spinlock_t reg_io_lock;
203 struct v4l2_device v4l2_dev;
204
205
206 u8 tw2865, tw2864, tw2815;
207 u8 tw28_cnt;
208
209
210 struct i2c_adapter i2c_adap[SOLO_I2C_ADAPTERS];
211 enum SOLO_I2C_STATE i2c_state;
212 struct mutex i2c_mutex;
213 int i2c_id;
214 wait_queue_head_t i2c_wait;
215 struct i2c_msg *i2c_msg;
216 unsigned int i2c_msg_num;
217 unsigned int i2c_msg_ptr;
218
219
220 struct solo_p2m_dev p2m_dev[SOLO_NR_P2M];
221 atomic_t p2m_count;
222 int p2m_jiffies;
223 unsigned int p2m_timeouts;
224
225
226 struct video_device *vfd;
227 unsigned int erasing;
228 unsigned int frame_blank;
229 u8 cur_disp_ch;
230 wait_queue_head_t disp_thread_wait;
231 struct v4l2_ctrl_handler disp_hdl;
232
233
234 struct solo_enc_dev *v4l2_enc[SOLO_MAX_CHANNELS];
235 u16 enc_bw_remain;
236
237 u8 enc_idx;
238
239
240 u32 video_type;
241 u16 video_hsize, video_vsize;
242 u16 vout_hstart, vout_vstart;
243 u16 vin_hstart, vin_vstart;
244 u8 fps;
245
246
247 spinlock_t jpeg_qp_lock;
248 u32 jpeg_qp[2];
249
250
251 struct snd_card *snd_card;
252 struct snd_pcm *snd_pcm;
253 atomic_t snd_users;
254 int g723_hw_idx;
255
256
257 struct device dev;
258 int sdram_size;
259 struct bin_attribute sdram_attr;
260 unsigned int sys_config;
261
262
263 struct task_struct *ring_thread;
264 wait_queue_head_t ring_thread_wait;
265
266
267 void *vh_buf;
268 dma_addr_t vh_dma;
269 int vh_size;
270
271
272 struct vb2_queue vidq;
273 struct vb2_alloc_ctx *alloc_ctx;
274 u32 sequence;
275 struct task_struct *kthread;
276 struct mutex lock;
277 spinlock_t slock;
278 int old_write;
279 struct list_head vidq_active;
280};
281
282static inline u32 solo_reg_read(struct solo_dev *solo_dev, int reg)
283{
284 unsigned long flags;
285 u32 ret;
286 u16 val;
287
288 spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
289
290 ret = readl(solo_dev->reg_base + reg);
291 rmb();
292 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
293 rmb();
294
295 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
296
297 return ret;
298}
299
300static inline void solo_reg_write(struct solo_dev *solo_dev, int reg,
301 u32 data)
302{
303 unsigned long flags;
304 u16 val;
305
306 spin_lock_irqsave(&solo_dev->reg_io_lock, flags);
307
308 writel(data, solo_dev->reg_base + reg);
309 wmb();
310 pci_read_config_word(solo_dev->pdev, PCI_STATUS, &val);
311 rmb();
312
313 spin_unlock_irqrestore(&solo_dev->reg_io_lock, flags);
314}
315
316static inline void solo_irq_on(struct solo_dev *dev, u32 mask)
317{
318 dev->irq_mask |= mask;
319 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
320}
321
322static inline void solo_irq_off(struct solo_dev *dev, u32 mask)
323{
324 dev->irq_mask &= ~mask;
325 solo_reg_write(dev, SOLO_IRQ_MASK, dev->irq_mask);
326}
327
328
329int solo_disp_init(struct solo_dev *solo_dev);
330void solo_disp_exit(struct solo_dev *solo_dev);
331
332int solo_gpio_init(struct solo_dev *solo_dev);
333void solo_gpio_exit(struct solo_dev *solo_dev);
334
335int solo_i2c_init(struct solo_dev *solo_dev);
336void solo_i2c_exit(struct solo_dev *solo_dev);
337
338int solo_p2m_init(struct solo_dev *solo_dev);
339void solo_p2m_exit(struct solo_dev *solo_dev);
340
341int solo_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
342void solo_v4l2_exit(struct solo_dev *solo_dev);
343
344int solo_enc_init(struct solo_dev *solo_dev);
345void solo_enc_exit(struct solo_dev *solo_dev);
346
347int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr);
348void solo_enc_v4l2_exit(struct solo_dev *solo_dev);
349
350int solo_g723_init(struct solo_dev *solo_dev);
351void solo_g723_exit(struct solo_dev *solo_dev);
352
353
354int solo_i2c_isr(struct solo_dev *solo_dev);
355void solo_p2m_isr(struct solo_dev *solo_dev, int id);
356void solo_p2m_error_isr(struct solo_dev *solo_dev);
357void solo_enc_v4l2_isr(struct solo_dev *solo_dev);
358void solo_g723_isr(struct solo_dev *solo_dev);
359void solo_motion_isr(struct solo_dev *solo_dev);
360void solo_video_in_isr(struct solo_dev *solo_dev);
361
362
363u8 solo_i2c_readbyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off);
364void solo_i2c_writebyte(struct solo_dev *solo_dev, int id, u8 addr, u8 off,
365 u8 data);
366
367
368int solo_p2m_dma_t(struct solo_dev *solo_dev, int wr,
369 dma_addr_t dma_addr, u32 ext_addr, u32 size,
370 int repeat, u32 ext_size);
371int solo_p2m_dma(struct solo_dev *solo_dev, int wr,
372 void *sys_addr, u32 ext_addr, u32 size,
373 int repeat, u32 ext_size);
374void solo_p2m_fill_desc(struct solo_p2m_desc *desc, int wr,
375 dma_addr_t dma_addr, u32 ext_addr, u32 size,
376 int repeat, u32 ext_size);
377int solo_p2m_dma_desc(struct solo_dev *solo_dev,
378 struct solo_p2m_desc *desc, dma_addr_t desc_dma,
379 int desc_cnt);
380
381
382int solo_set_video_type(struct solo_dev *solo_dev, bool is_50hz);
383void solo_update_mode(struct solo_enc_dev *solo_enc);
384
385
386int solo_set_motion_threshold(struct solo_dev *solo_dev, u8 ch, u16 val);
387int solo_set_motion_block(struct solo_dev *solo_dev, u8 ch,
388 const u16 *thresholds);
389#define SOLO_DEF_MOT_THRESH 0x0300
390
391
392int solo_osd_print(struct solo_enc_dev *solo_enc);
393
394
395unsigned int solo_eeprom_ewen(struct solo_dev *solo_dev, int w_en);
396__be16 solo_eeprom_read(struct solo_dev *solo_dev, int loc);
397int solo_eeprom_write(struct solo_dev *solo_dev, int loc,
398 __be16 data);
399
400
401void solo_s_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch,
402 unsigned int qp);
403int solo_g_jpeg_qp(struct solo_dev *solo_dev, unsigned int ch);
404
405#define CHK_FLAGS(v, flags) (((v) & (flags)) == (flags))
406
407#endif
408