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18#ifndef __BNAD_H__
19#define __BNAD_H__
20
21#include <linux/rtnetlink.h>
22#include <linux/workqueue.h>
23#include <linux/ipv6.h>
24#include <linux/etherdevice.h>
25#include <linux/mutex.h>
26#include <linux/firmware.h>
27#include <linux/if_vlan.h>
28
29
30#include <asm/checksum.h>
31#include <net/ip6_checksum.h>
32
33#include <net/ip.h>
34#include <net/tcp.h>
35
36#include "bna.h"
37
38#define BNAD_TXQ_DEPTH 2048
39#define BNAD_RXQ_DEPTH 2048
40
41#define BNAD_MAX_TX 1
42#define BNAD_MAX_TXQ_PER_TX 8
43#define BNAD_TXQ_NUM 1
44
45#define BNAD_MAX_RX 1
46#define BNAD_MAX_RXP_PER_RX 16
47#define BNAD_MAX_RXQ_PER_RXP 2
48
49
50
51
52
53
54struct bnad_rx_ctrl {
55 struct bna_ccb *ccb;
56 struct bnad *bnad;
57 unsigned long flags;
58 struct napi_struct napi;
59 u64 rx_intr_ctr;
60 u64 rx_poll_ctr;
61 u64 rx_schedule;
62 u64 rx_keep_poll;
63 u64 rx_complete;
64};
65
66#define BNAD_RXMODE_PROMISC_DEFAULT BNA_RXMODE_PROMISC
67
68
69
70
71#define BNAD_NAME "bna"
72#define BNAD_NAME_LEN 64
73
74#define BNAD_VERSION "3.2.23.0"
75
76#define BNAD_MAILBOX_MSIX_INDEX 0
77#define BNAD_MAILBOX_MSIX_VECTORS 1
78#define BNAD_INTX_TX_IB_BITMASK 0x1
79#define BNAD_INTX_RX_IB_BITMASK 0x2
80
81#define BNAD_STATS_TIMER_FREQ 1000
82#define BNAD_DIM_TIMER_FREQ 1000
83
84#define BNAD_IOCETH_TIMEOUT 10000
85
86#define BNAD_MIN_Q_DEPTH 512
87#define BNAD_MAX_RXQ_DEPTH 16384
88#define BNAD_MAX_TXQ_DEPTH 2048
89
90#define BNAD_JUMBO_MTU 9000
91
92#define BNAD_NETIF_WAKE_THRESHOLD 8
93
94#define BNAD_RXQ_REFILL_THRESHOLD_SHIFT 3
95
96
97#define BNAD_TXQ_FREE_SENT 0
98#define BNAD_TXQ_TX_STARTED 1
99
100
101#define BNAD_RXQ_STARTED 0
102#define BNAD_RXQ_POST_OK 1
103
104
105#define BNAD_NUM_TXQ (bnad->num_tx * bnad->num_txq_per_tx)
106#define BNAD_NUM_RXP (bnad->num_rx * bnad->num_rxp_per_rx)
107
108#define BNAD_FRAME_SIZE(_mtu) \
109 (ETH_HLEN + VLAN_HLEN + (_mtu) + ETH_FCS_LEN)
110
111
112
113
114
115
116enum bnad_intr_source {
117 BNAD_INTR_TX = 1,
118 BNAD_INTR_RX = 2
119};
120
121enum bnad_link_state {
122 BNAD_LS_DOWN = 0,
123 BNAD_LS_UP = 1
124};
125
126struct bnad_iocmd_comp {
127 struct bnad *bnad;
128 struct completion comp;
129 int comp_status;
130};
131
132struct bnad_completion {
133 struct completion ioc_comp;
134 struct completion ucast_comp;
135 struct completion mcast_comp;
136 struct completion tx_comp;
137 struct completion rx_comp;
138 struct completion stats_comp;
139 struct completion enet_comp;
140 struct completion mtu_comp;
141
142 u8 ioc_comp_status;
143 u8 ucast_comp_status;
144 u8 mcast_comp_status;
145 u8 tx_comp_status;
146 u8 rx_comp_status;
147 u8 stats_comp_status;
148 u8 port_comp_status;
149 u8 mtu_comp_status;
150};
151
152
153struct bnad_drv_stats {
154 u64 netif_queue_stop;
155 u64 netif_queue_wakeup;
156 u64 netif_queue_stopped;
157 u64 tso4;
158 u64 tso6;
159 u64 tso_err;
160 u64 tcpcsum_offload;
161 u64 udpcsum_offload;
162 u64 csum_help;
163 u64 tx_skb_too_short;
164 u64 tx_skb_stopping;
165 u64 tx_skb_max_vectors;
166 u64 tx_skb_mss_too_long;
167 u64 tx_skb_tso_too_short;
168 u64 tx_skb_tso_prepare;
169 u64 tx_skb_non_tso_too_long;
170 u64 tx_skb_tcp_hdr;
171 u64 tx_skb_udp_hdr;
172 u64 tx_skb_csum_err;
173 u64 tx_skb_headlen_too_long;
174 u64 tx_skb_headlen_zero;
175 u64 tx_skb_frag_zero;
176 u64 tx_skb_len_mismatch;
177
178 u64 hw_stats_updates;
179 u64 netif_rx_dropped;
180
181 u64 link_toggle;
182 u64 cee_toggle;
183
184 u64 rxp_info_alloc_failed;
185 u64 mbox_intr_disabled;
186 u64 mbox_intr_enabled;
187 u64 tx_unmap_q_alloc_failed;
188 u64 rx_unmap_q_alloc_failed;
189
190 u64 rxbuf_alloc_failed;
191};
192
193
194struct bnad_stats {
195 struct bnad_drv_stats drv_stats;
196 struct bna_stats *bna_stats;
197};
198
199
200struct bnad_tx_res_info {
201 struct bna_res_info res_info[BNA_TX_RES_T_MAX];
202};
203
204struct bnad_rx_res_info {
205 struct bna_res_info res_info[BNA_RX_RES_T_MAX];
206};
207
208struct bnad_tx_info {
209 struct bna_tx *tx;
210 struct bna_tcb *tcb[BNAD_MAX_TXQ_PER_TX];
211 u32 tx_id;
212 struct delayed_work tx_cleanup_work;
213} ____cacheline_aligned;
214
215struct bnad_rx_info {
216 struct bna_rx *rx;
217
218 struct bnad_rx_ctrl rx_ctrl[BNAD_MAX_RXP_PER_RX];
219 u32 rx_id;
220 struct work_struct rx_cleanup_work;
221} ____cacheline_aligned;
222
223struct bnad_tx_vector {
224 DEFINE_DMA_UNMAP_ADDR(dma_addr);
225 DEFINE_DMA_UNMAP_LEN(dma_len);
226};
227
228struct bnad_tx_unmap {
229 struct sk_buff *skb;
230 u32 nvecs;
231 struct bnad_tx_vector vectors[BFI_TX_MAX_VECTORS_PER_WI];
232};
233
234struct bnad_rx_vector {
235 DEFINE_DMA_UNMAP_ADDR(dma_addr);
236 u32 len;
237};
238
239struct bnad_rx_unmap {
240 struct page *page;
241 struct sk_buff *skb;
242 struct bnad_rx_vector vector;
243 u32 page_offset;
244};
245
246enum bnad_rxbuf_type {
247 BNAD_RXBUF_NONE = 0,
248 BNAD_RXBUF_SK_BUFF = 1,
249 BNAD_RXBUF_PAGE = 2,
250 BNAD_RXBUF_MULTI_BUFF = 3
251};
252
253#define BNAD_RXBUF_IS_SK_BUFF(_type) ((_type) == BNAD_RXBUF_SK_BUFF)
254#define BNAD_RXBUF_IS_MULTI_BUFF(_type) ((_type) == BNAD_RXBUF_MULTI_BUFF)
255
256struct bnad_rx_unmap_q {
257 int reuse_pi;
258 int alloc_order;
259 u32 map_size;
260 enum bnad_rxbuf_type type;
261 struct bnad_rx_unmap unmap[0] ____cacheline_aligned;
262};
263
264#define BNAD_PCI_DEV_IS_CAT2(_bnad) \
265 ((_bnad)->pcidev->device == BFA_PCI_DEVICE_ID_CT2)
266
267
268#define BNAD_CF_DIM_ENABLED 0x01
269#define BNAD_CF_PROMISC 0x02
270#define BNAD_CF_ALLMULTI 0x04
271#define BNAD_CF_DEFAULT 0x08
272#define BNAD_CF_MSIX 0x10
273
274
275
276
277#define BNAD_RF_CEE_RUNNING 0
278#define BNAD_RF_MTU_SET 1
279#define BNAD_RF_MBOX_IRQ_DISABLED 2
280#define BNAD_RF_NETDEV_REGISTERED 3
281#define BNAD_RF_DIM_TIMER_RUNNING 4
282#define BNAD_RF_STATS_TIMER_RUNNING 5
283#define BNAD_RF_TX_PRIO_SET 6
284
285struct bnad {
286 struct net_device *netdev;
287 u32 id;
288 struct list_head list_entry;
289
290
291 struct bnad_tx_info tx_info[BNAD_MAX_TX];
292 struct bnad_rx_info rx_info[BNAD_MAX_RX];
293
294 unsigned long active_vlans[BITS_TO_LONGS(VLAN_N_VID)];
295
296
297
298
299
300
301 u32 num_tx;
302 u32 num_rx;
303 u32 num_txq_per_tx;
304 u32 num_rxp_per_rx;
305
306 u32 txq_depth;
307 u32 rxq_depth;
308
309 u8 tx_coalescing_timeo;
310 u8 rx_coalescing_timeo;
311
312 struct bna_rx_config rx_config[BNAD_MAX_RX] ____cacheline_aligned;
313 struct bna_tx_config tx_config[BNAD_MAX_TX] ____cacheline_aligned;
314
315 void __iomem *bar0;
316
317 struct bna bna;
318
319 u32 cfg_flags;
320 unsigned long run_flags;
321
322 struct pci_dev *pcidev;
323 u64 mmio_start;
324 u64 mmio_len;
325
326 u32 msix_num;
327 struct msix_entry *msix_table;
328
329 struct mutex conf_mutex;
330 spinlock_t bna_lock ____cacheline_aligned;
331
332
333 struct timer_list ioc_timer;
334 struct timer_list dim_timer;
335 struct timer_list stats_timer;
336
337
338 struct bna_res_info res_info[BNA_RES_T_MAX];
339 struct bna_res_info mod_res_info[BNA_MOD_RES_T_MAX];
340 struct bnad_tx_res_info tx_res_info[BNAD_MAX_TX];
341 struct bnad_rx_res_info rx_res_info[BNAD_MAX_RX];
342
343 struct bnad_completion bnad_completions;
344
345
346 mac_t perm_addr;
347
348 struct workqueue_struct *work_q;
349
350
351 struct bnad_stats stats;
352
353 struct bnad_diag *diag;
354
355 char adapter_name[BNAD_NAME_LEN];
356 char port_name[BNAD_NAME_LEN];
357 char mbox_irq_name[BNAD_NAME_LEN];
358 char wq_name[BNAD_NAME_LEN];
359
360
361 char *regdata;
362 u32 reglen;
363 struct dentry *bnad_dentry_files[5];
364 struct dentry *port_debugfs_root;
365};
366
367struct bnad_drvinfo {
368 struct bfa_ioc_attr ioc_attr;
369 struct bfa_cee_attr cee_attr;
370 struct bfa_flash_attr flash_attr;
371 u32 cee_status;
372 u32 flash_status;
373};
374
375
376
377
378extern const struct firmware *bfi_fw;
379
380
381
382
383u32 *cna_get_firmware_buf(struct pci_dev *pdev);
384
385void bnad_set_rx_mode(struct net_device *netdev);
386struct net_device_stats *bnad_get_netdev_stats(struct net_device *netdev);
387int bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr);
388int bnad_enable_default_bcast(struct bnad *bnad);
389void bnad_restore_vlans(struct bnad *bnad, u32 rx_id);
390void bnad_set_ethtool_ops(struct net_device *netdev);
391void bnad_cb_completion(void *arg, enum bfa_status status);
392
393
394void bnad_tx_coalescing_timeo_set(struct bnad *bnad);
395void bnad_rx_coalescing_timeo_set(struct bnad *bnad);
396
397int bnad_setup_rx(struct bnad *bnad, u32 rx_id);
398int bnad_setup_tx(struct bnad *bnad, u32 tx_id);
399void bnad_destroy_tx(struct bnad *bnad, u32 tx_id);
400void bnad_destroy_rx(struct bnad *bnad, u32 rx_id);
401
402
403void bnad_dim_timer_start(struct bnad *bnad);
404
405
406void bnad_netdev_qstats_fill(struct bnad *bnad,
407 struct rtnl_link_stats64 *stats);
408void bnad_netdev_hwstats_fill(struct bnad *bnad,
409 struct rtnl_link_stats64 *stats);
410
411
412void bnad_debugfs_init(struct bnad *bnad);
413void bnad_debugfs_uninit(struct bnad *bnad);
414
415
416
417#define BNAD_UPDATE_CTR(_bnad, _ctr) \
418 (((_bnad)->stats.drv_stats._ctr)++)
419
420#define BNAD_GET_CTR(_bnad, _ctr) ((_bnad)->stats.drv_stats._ctr)
421
422#define bnad_enable_rx_irq_unsafe(_ccb) \
423{ \
424 if (likely(test_bit(BNAD_RXQ_STARTED, &(_ccb)->rcb[0]->flags))) {\
425 bna_ib_coalescing_timer_set((_ccb)->i_dbell, \
426 (_ccb)->rx_coalescing_timeo); \
427 bna_ib_ack((_ccb)->i_dbell, 0); \
428 } \
429}
430
431#endif
432
