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18#ifndef _HTT_H_
19#define _HTT_H_
20
21#include <linux/bug.h>
22#include <linux/interrupt.h>
23#include <linux/dmapool.h>
24#include <linux/hashtable.h>
25#include <net/mac80211.h>
26
27#include "htc.h"
28#include "rx_desc.h"
29
30enum htt_dbg_stats_type {
31 HTT_DBG_STATS_WAL_PDEV_TXRX = 1 << 0,
32 HTT_DBG_STATS_RX_REORDER = 1 << 1,
33 HTT_DBG_STATS_RX_RATE_INFO = 1 << 2,
34 HTT_DBG_STATS_TX_PPDU_LOG = 1 << 3,
35 HTT_DBG_STATS_TX_RATE_INFO = 1 << 4,
36
37
38 HTT_DBG_NUM_STATS
39};
40
41enum htt_h2t_msg_type {
42 HTT_H2T_MSG_TYPE_VERSION_REQ = 0,
43 HTT_H2T_MSG_TYPE_TX_FRM = 1,
44 HTT_H2T_MSG_TYPE_RX_RING_CFG = 2,
45 HTT_H2T_MSG_TYPE_STATS_REQ = 3,
46 HTT_H2T_MSG_TYPE_SYNC = 4,
47 HTT_H2T_MSG_TYPE_AGGR_CFG = 5,
48 HTT_H2T_MSG_TYPE_FRAG_DESC_BANK_CFG = 6,
49
50
51
52 HTT_H2T_MSG_TYPE_MGMT_TX = 7,
53
54 HTT_H2T_NUM_MSGS
55};
56
57struct htt_cmd_hdr {
58 u8 msg_type;
59} __packed;
60
61struct htt_ver_req {
62 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)];
63} __packed;
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82
83struct htt_data_tx_desc_frag {
84 __le32 paddr;
85 __le32 len;
86} __packed;
87
88enum htt_data_tx_desc_flags0 {
89 HTT_DATA_TX_DESC_FLAGS0_MAC_HDR_PRESENT = 1 << 0,
90 HTT_DATA_TX_DESC_FLAGS0_NO_AGGR = 1 << 1,
91 HTT_DATA_TX_DESC_FLAGS0_NO_ENCRYPT = 1 << 2,
92 HTT_DATA_TX_DESC_FLAGS0_NO_CLASSIFY = 1 << 3,
93 HTT_DATA_TX_DESC_FLAGS0_RSVD0 = 1 << 4
94#define HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE_MASK 0xE0
95#define HTT_DATA_TX_DESC_FLAGS0_PKT_TYPE_LSB 5
96};
97
98enum htt_data_tx_desc_flags1 {
99#define HTT_DATA_TX_DESC_FLAGS1_VDEV_ID_BITS 6
100#define HTT_DATA_TX_DESC_FLAGS1_VDEV_ID_MASK 0x003F
101#define HTT_DATA_TX_DESC_FLAGS1_VDEV_ID_LSB 0
102#define HTT_DATA_TX_DESC_FLAGS1_EXT_TID_BITS 5
103#define HTT_DATA_TX_DESC_FLAGS1_EXT_TID_MASK 0x07C0
104#define HTT_DATA_TX_DESC_FLAGS1_EXT_TID_LSB 6
105 HTT_DATA_TX_DESC_FLAGS1_POSTPONED = 1 << 11,
106 HTT_DATA_TX_DESC_FLAGS1_MORE_IN_BATCH = 1 << 12,
107 HTT_DATA_TX_DESC_FLAGS1_CKSUM_L3_OFFLOAD = 1 << 13,
108 HTT_DATA_TX_DESC_FLAGS1_CKSUM_L4_OFFLOAD = 1 << 14,
109 HTT_DATA_TX_DESC_FLAGS1_RSVD1 = 1 << 15
110};
111
112enum htt_data_tx_ext_tid {
113 HTT_DATA_TX_EXT_TID_NON_QOS_MCAST_BCAST = 16,
114 HTT_DATA_TX_EXT_TID_MGMT = 17,
115 HTT_DATA_TX_EXT_TID_INVALID = 31
116};
117
118#define HTT_INVALID_PEERID 0xFFFF
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131
132struct htt_data_tx_desc {
133 u8 flags0;
134 __le16 flags1;
135 __le16 len;
136 __le16 id;
137 __le32 frags_paddr;
138 __le16 peerid;
139 __le16 freq;
140 u8 prefetch[0];
141} __packed;
142
143enum htt_rx_ring_flags {
144 HTT_RX_RING_FLAGS_MAC80211_HDR = 1 << 0,
145 HTT_RX_RING_FLAGS_MSDU_PAYLOAD = 1 << 1,
146 HTT_RX_RING_FLAGS_PPDU_START = 1 << 2,
147 HTT_RX_RING_FLAGS_PPDU_END = 1 << 3,
148 HTT_RX_RING_FLAGS_MPDU_START = 1 << 4,
149 HTT_RX_RING_FLAGS_MPDU_END = 1 << 5,
150 HTT_RX_RING_FLAGS_MSDU_START = 1 << 6,
151 HTT_RX_RING_FLAGS_MSDU_END = 1 << 7,
152 HTT_RX_RING_FLAGS_RX_ATTENTION = 1 << 8,
153 HTT_RX_RING_FLAGS_FRAG_INFO = 1 << 9,
154 HTT_RX_RING_FLAGS_UNICAST_RX = 1 << 10,
155 HTT_RX_RING_FLAGS_MULTICAST_RX = 1 << 11,
156 HTT_RX_RING_FLAGS_CTRL_RX = 1 << 12,
157 HTT_RX_RING_FLAGS_MGMT_RX = 1 << 13,
158 HTT_RX_RING_FLAGS_NULL_RX = 1 << 14,
159 HTT_RX_RING_FLAGS_PHY_DATA_RX = 1 << 15
160};
161
162#define HTT_RX_RING_SIZE_MIN 128
163#define HTT_RX_RING_SIZE_MAX 2048
164
165struct htt_rx_ring_setup_ring {
166 __le32 fw_idx_shadow_reg_paddr;
167 __le32 rx_ring_base_paddr;
168 __le16 rx_ring_len;
169 __le16 rx_ring_bufsize;
170 __le16 flags;
171 __le16 fw_idx_init_val;
172
173
174 __le16 mac80211_hdr_offset;
175 __le16 msdu_payload_offset;
176 __le16 ppdu_start_offset;
177 __le16 ppdu_end_offset;
178 __le16 mpdu_start_offset;
179 __le16 mpdu_end_offset;
180 __le16 msdu_start_offset;
181 __le16 msdu_end_offset;
182 __le16 rx_attention_offset;
183 __le16 frag_info_offset;
184} __packed;
185
186struct htt_rx_ring_setup_hdr {
187 u8 num_rings;
188 __le16 rsvd0;
189} __packed;
190
191struct htt_rx_ring_setup {
192 struct htt_rx_ring_setup_hdr hdr;
193 struct htt_rx_ring_setup_ring rings[0];
194} __packed;
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209struct htt_stats_req {
210 u8 upload_types[3];
211 u8 rsvd0;
212 u8 reset_types[3];
213 struct {
214 u8 mpdu_bytes;
215 u8 mpdu_num_msdus;
216 u8 msdu_bytes;
217 } __packed;
218 u8 stat_type;
219 __le32 cookie_lsb;
220 __le32 cookie_msb;
221} __packed;
222
223#define HTT_STATS_REQ_CFG_STAT_TYPE_INVALID 0xff
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244struct htt_oob_sync_req {
245 u8 sync_count;
246 __le16 rsvd0;
247} __packed;
248
249struct htt_aggr_conf {
250 u8 max_num_ampdu_subframes;
251
252 u8 max_num_amsdu_subframes;
253} __packed;
254
255#define HTT_MGMT_FRM_HDR_DOWNLOAD_LEN 32
256
257struct htt_mgmt_tx_desc {
258 u8 pad[sizeof(u32) - sizeof(struct htt_cmd_hdr)];
259 __le32 msdu_paddr;
260 __le32 desc_id;
261 __le32 len;
262 __le32 vdev_id;
263 u8 hdr[HTT_MGMT_FRM_HDR_DOWNLOAD_LEN];
264} __packed;
265
266enum htt_mgmt_tx_status {
267 HTT_MGMT_TX_STATUS_OK = 0,
268 HTT_MGMT_TX_STATUS_RETRY = 1,
269 HTT_MGMT_TX_STATUS_DROP = 2
270};
271
272
273
274enum htt_t2h_msg_type {
275 HTT_T2H_MSG_TYPE_VERSION_CONF = 0x0,
276 HTT_T2H_MSG_TYPE_RX_IND = 0x1,
277 HTT_T2H_MSG_TYPE_RX_FLUSH = 0x2,
278 HTT_T2H_MSG_TYPE_PEER_MAP = 0x3,
279 HTT_T2H_MSG_TYPE_PEER_UNMAP = 0x4,
280 HTT_T2H_MSG_TYPE_RX_ADDBA = 0x5,
281 HTT_T2H_MSG_TYPE_RX_DELBA = 0x6,
282 HTT_T2H_MSG_TYPE_TX_COMPL_IND = 0x7,
283 HTT_T2H_MSG_TYPE_PKTLOG = 0x8,
284 HTT_T2H_MSG_TYPE_STATS_CONF = 0x9,
285 HTT_T2H_MSG_TYPE_RX_FRAG_IND = 0xa,
286 HTT_T2H_MSG_TYPE_SEC_IND = 0xb,
287 HTT_T2H_MSG_TYPE_RC_UPDATE_IND = 0xc,
288 HTT_T2H_MSG_TYPE_TX_INSPECT_IND = 0xd,
289 HTT_T2H_MSG_TYPE_MGMT_TX_COMPLETION = 0xe,
290 HTT_T2H_MSG_TYPE_TX_CREDIT_UPDATE_IND = 0xf,
291 HTT_T2H_MSG_TYPE_RX_PN_IND = 0x10,
292 HTT_T2H_MSG_TYPE_RX_OFFLOAD_DELIVER_IND = 0x11,
293 HTT_T2H_MSG_TYPE_RX_IN_ORD_PADDR_IND = 0x12,
294
295 HTT_T2H_MSG_TYPE_WDI_IPA_OP_RESPONSE = 0x14,
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300
301 HTT_T2H_MSG_TYPE_TEST,
302
303
304 HTT_T2H_NUM_MSGS
305};
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311
312struct htt_resp_hdr {
313 u8 msg_type;
314} __packed;
315
316#define HTT_RESP_HDR_MSG_TYPE_OFFSET 0
317#define HTT_RESP_HDR_MSG_TYPE_MASK 0xff
318#define HTT_RESP_HDR_MSG_TYPE_LSB 0
319
320
321struct htt_ver_resp {
322 u8 minor;
323 u8 major;
324 u8 rsvd0;
325} __packed;
326
327struct htt_mgmt_tx_completion {
328 u8 rsvd0;
329 u8 rsvd1;
330 u8 rsvd2;
331 __le32 desc_id;
332 __le32 status;
333} __packed;
334
335#define HTT_RX_INDICATION_INFO0_EXT_TID_MASK (0x3F)
336#define HTT_RX_INDICATION_INFO0_EXT_TID_LSB (0)
337#define HTT_RX_INDICATION_INFO0_FLUSH_VALID (1 << 6)
338#define HTT_RX_INDICATION_INFO0_RELEASE_VALID (1 << 7)
339
340#define HTT_RX_INDICATION_INFO1_FLUSH_START_SEQNO_MASK 0x0000003F
341#define HTT_RX_INDICATION_INFO1_FLUSH_START_SEQNO_LSB 0
342#define HTT_RX_INDICATION_INFO1_FLUSH_END_SEQNO_MASK 0x00000FC0
343#define HTT_RX_INDICATION_INFO1_FLUSH_END_SEQNO_LSB 6
344#define HTT_RX_INDICATION_INFO1_RELEASE_START_SEQNO_MASK 0x0003F000
345#define HTT_RX_INDICATION_INFO1_RELEASE_START_SEQNO_LSB 12
346#define HTT_RX_INDICATION_INFO1_RELEASE_END_SEQNO_MASK 0x00FC0000
347#define HTT_RX_INDICATION_INFO1_RELEASE_END_SEQNO_LSB 18
348#define HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES_MASK 0xFF000000
349#define HTT_RX_INDICATION_INFO1_NUM_MPDU_RANGES_LSB 24
350
351struct htt_rx_indication_hdr {
352 u8 info0;
353 __le16 peer_id;
354 __le32 info1;
355} __packed;
356
357#define HTT_RX_INDICATION_INFO0_PHY_ERR_VALID (1 << 0)
358#define HTT_RX_INDICATION_INFO0_LEGACY_RATE_MASK (0x1E)
359#define HTT_RX_INDICATION_INFO0_LEGACY_RATE_LSB (1)
360#define HTT_RX_INDICATION_INFO0_LEGACY_RATE_CCK (1 << 5)
361#define HTT_RX_INDICATION_INFO0_END_VALID (1 << 6)
362#define HTT_RX_INDICATION_INFO0_START_VALID (1 << 7)
363
364#define HTT_RX_INDICATION_INFO1_VHT_SIG_A1_MASK 0x00FFFFFF
365#define HTT_RX_INDICATION_INFO1_VHT_SIG_A1_LSB 0
366#define HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE_MASK 0xFF000000
367#define HTT_RX_INDICATION_INFO1_PREAMBLE_TYPE_LSB 24
368
369#define HTT_RX_INDICATION_INFO2_VHT_SIG_A1_MASK 0x00FFFFFF
370#define HTT_RX_INDICATION_INFO2_VHT_SIG_A1_LSB 0
371#define HTT_RX_INDICATION_INFO2_SERVICE_MASK 0xFF000000
372#define HTT_RX_INDICATION_INFO2_SERVICE_LSB 24
373
374enum htt_rx_legacy_rate {
375 HTT_RX_OFDM_48 = 0,
376 HTT_RX_OFDM_24 = 1,
377 HTT_RX_OFDM_12,
378 HTT_RX_OFDM_6,
379 HTT_RX_OFDM_54,
380 HTT_RX_OFDM_36,
381 HTT_RX_OFDM_18,
382 HTT_RX_OFDM_9,
383
384
385 HTT_RX_CCK_11_LP = 0,
386 HTT_RX_CCK_5_5_LP = 1,
387 HTT_RX_CCK_2_LP,
388 HTT_RX_CCK_1_LP,
389
390 HTT_RX_CCK_11_SP,
391 HTT_RX_CCK_5_5_SP,
392 HTT_RX_CCK_2_SP
393};
394
395enum htt_rx_legacy_rate_type {
396 HTT_RX_LEGACY_RATE_OFDM = 0,
397 HTT_RX_LEGACY_RATE_CCK
398};
399
400enum htt_rx_preamble_type {
401 HTT_RX_LEGACY = 0x4,
402 HTT_RX_HT = 0x8,
403 HTT_RX_HT_WITH_TXBF = 0x9,
404 HTT_RX_VHT = 0xC,
405 HTT_RX_VHT_WITH_TXBF = 0xD,
406};
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418struct htt_rx_indication_ppdu {
419 u8 combined_rssi;
420 u8 sub_usec_timestamp;
421 u8 phy_err_code;
422 u8 info0;
423 struct {
424 u8 pri20_db;
425 u8 ext20_db;
426 u8 ext40_db;
427 u8 ext80_db;
428 } __packed rssi_chains[4];
429 __le32 tsf;
430 __le32 usec_timestamp;
431 __le32 info1;
432 __le32 info2;
433} __packed;
434
435enum htt_rx_mpdu_status {
436 HTT_RX_IND_MPDU_STATUS_UNKNOWN = 0x0,
437 HTT_RX_IND_MPDU_STATUS_OK,
438 HTT_RX_IND_MPDU_STATUS_ERR_FCS,
439 HTT_RX_IND_MPDU_STATUS_ERR_DUP,
440 HTT_RX_IND_MPDU_STATUS_ERR_REPLAY,
441 HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER,
442
443 HTT_RX_IND_MPDU_STATUS_UNAUTH_PEER,
444 HTT_RX_IND_MPDU_STATUS_OUT_OF_SYNC,
445
446 HTT_RX_IND_MPDU_STATUS_MGMT_CTRL,
447 HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR,
448 HTT_RX_IND_MPDU_STATUS_DECRYPT_ERR,
449 HTT_RX_IND_MPDU_STATUS_MPDU_LENGTH_ERR,
450 HTT_RX_IND_MPDU_STATUS_ENCRYPT_REQUIRED_ERR,
451 HTT_RX_IND_MPDU_STATUS_PRIVACY_ERR,
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457 HTT_RX_IND_MPDU_STATUS_ERR_MISC = 0xFF
458};
459
460struct htt_rx_indication_mpdu_range {
461 u8 mpdu_count;
462 u8 mpdu_range_status;
463 u8 pad0;
464 u8 pad1;
465} __packed;
466
467struct htt_rx_indication_prefix {
468 __le16 fw_rx_desc_bytes;
469 u8 pad0;
470 u8 pad1;
471};
472
473struct htt_rx_indication {
474 struct htt_rx_indication_hdr hdr;
475 struct htt_rx_indication_ppdu ppdu;
476 struct htt_rx_indication_prefix prefix;
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484 struct fw_rx_desc_base fw_desc;
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490 struct htt_rx_indication_mpdu_range mpdu_ranges[0];
491} __packed;
492
493static inline struct htt_rx_indication_mpdu_range *
494 htt_rx_ind_get_mpdu_ranges(struct htt_rx_indication *rx_ind)
495{
496 void *ptr = rx_ind;
497
498 ptr += sizeof(rx_ind->hdr)
499 + sizeof(rx_ind->ppdu)
500 + sizeof(rx_ind->prefix)
501 + roundup(__le16_to_cpu(rx_ind->prefix.fw_rx_desc_bytes), 4);
502 return ptr;
503}
504
505enum htt_rx_flush_mpdu_status {
506 HTT_RX_FLUSH_MPDU_DISCARD = 0,
507 HTT_RX_FLUSH_MPDU_REORDER = 1,
508};
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516struct htt_rx_flush {
517 __le16 peer_id;
518 u8 tid;
519 u8 rsvd0;
520 u8 mpdu_status;
521 u8 seq_num_start;
522 u8 seq_num_end;
523};
524
525struct htt_rx_peer_map {
526 u8 vdev_id;
527 __le16 peer_id;
528 u8 addr[6];
529 u8 rsvd0;
530 u8 rsvd1;
531} __packed;
532
533struct htt_rx_peer_unmap {
534 u8 rsvd0;
535 __le16 peer_id;
536} __packed;
537
538enum htt_security_types {
539 HTT_SECURITY_NONE,
540 HTT_SECURITY_WEP128,
541 HTT_SECURITY_WEP104,
542 HTT_SECURITY_WEP40,
543 HTT_SECURITY_TKIP,
544 HTT_SECURITY_TKIP_NOMIC,
545 HTT_SECURITY_AES_CCMP,
546 HTT_SECURITY_WAPI,
547
548 HTT_NUM_SECURITY_TYPES
549};
550
551enum htt_security_flags {
552#define HTT_SECURITY_TYPE_MASK 0x7F
553#define HTT_SECURITY_TYPE_LSB 0
554 HTT_SECURITY_IS_UNICAST = 1 << 7
555};
556
557struct htt_security_indication {
558 union {
559
560 u8 flags;
561 struct {
562 u8 security_type:7,
563 is_unicast:1;
564 } __packed;
565 } __packed;
566 __le16 peer_id;
567 u8 michael_key[8];
568 u8 wapi_rsc[16];
569} __packed;
570
571#define HTT_RX_BA_INFO0_TID_MASK 0x000F
572#define HTT_RX_BA_INFO0_TID_LSB 0
573#define HTT_RX_BA_INFO0_PEER_ID_MASK 0xFFF0
574#define HTT_RX_BA_INFO0_PEER_ID_LSB 4
575
576struct htt_rx_addba {
577 u8 window_size;
578 __le16 info0;
579} __packed;
580
581struct htt_rx_delba {
582 u8 rsvd0;
583 __le16 info0;
584} __packed;
585
586enum htt_data_tx_status {
587 HTT_DATA_TX_STATUS_OK = 0,
588 HTT_DATA_TX_STATUS_DISCARD = 1,
589 HTT_DATA_TX_STATUS_NO_ACK = 2,
590 HTT_DATA_TX_STATUS_POSTPONE = 3,
591 HTT_DATA_TX_STATUS_DOWNLOAD_FAIL = 128
592};
593
594enum htt_data_tx_flags {
595#define HTT_DATA_TX_STATUS_MASK 0x07
596#define HTT_DATA_TX_STATUS_LSB 0
597#define HTT_DATA_TX_TID_MASK 0x78
598#define HTT_DATA_TX_TID_LSB 3
599 HTT_DATA_TX_TID_INVALID = 1 << 7
600};
601
602#define HTT_TX_COMPL_INV_MSDU_ID 0xFFFF
603
604struct htt_data_tx_completion {
605 union {
606 u8 flags;
607 struct {
608 u8 status:3,
609 tid:4,
610 tid_invalid:1;
611 } __packed;
612 } __packed;
613 u8 num_msdus;
614 u8 rsvd0;
615 __le16 msdus[0];
616} __packed;
617
618struct htt_tx_compl_ind_base {
619 u32 hdr;
620 u16 payload[1];
621} __packed;
622
623struct htt_rc_tx_done_params {
624 u32 rate_code;
625 u32 rate_code_flags;
626 u32 flags;
627 u32 num_enqued;
628 u32 num_retries;
629 u32 num_failed;
630 u32 ack_rssi;
631 u32 time_stamp;
632 u32 is_probe;
633};
634
635struct htt_rc_update {
636 u8 vdev_id;
637 __le16 peer_id;
638 u8 addr[6];
639 u8 num_elems;
640 u8 rsvd0;
641 struct htt_rc_tx_done_params params[0];
642} __packed;
643
644
645struct htt_rx_fragment_indication {
646 union {
647 u8 info0;
648 struct {
649 u8 ext_tid:5,
650 flush_valid:1;
651 } __packed;
652 } __packed;
653 __le16 peer_id;
654 __le32 info1;
655 __le16 fw_rx_desc_bytes;
656 __le16 rsvd0;
657
658 u8 fw_msdu_rx_desc[0];
659} __packed;
660
661#define HTT_RX_FRAG_IND_INFO0_EXT_TID_MASK 0x1F
662#define HTT_RX_FRAG_IND_INFO0_EXT_TID_LSB 0
663#define HTT_RX_FRAG_IND_INFO0_FLUSH_VALID_MASK 0x20
664#define HTT_RX_FRAG_IND_INFO0_FLUSH_VALID_LSB 5
665
666#define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_START_MASK 0x0000003F
667#define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_START_LSB 0
668#define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_END_MASK 0x00000FC0
669#define HTT_RX_FRAG_IND_INFO1_FLUSH_SEQ_NUM_END_LSB 6
670
671struct htt_rx_pn_ind {
672 __le16 peer_id;
673 u8 tid;
674 u8 seqno_start;
675 u8 seqno_end;
676 u8 pn_ie_count;
677 u8 reserved;
678 u8 pn_ies[0];
679} __packed;
680
681struct htt_rx_offload_msdu {
682 __le16 msdu_len;
683 __le16 peer_id;
684 u8 vdev_id;
685 u8 tid;
686 u8 fw_desc;
687 u8 payload[0];
688} __packed;
689
690struct htt_rx_offload_ind {
691 u8 reserved;
692 __le16 msdu_count;
693} __packed;
694
695struct htt_rx_in_ord_msdu_desc {
696 __le32 msdu_paddr;
697 __le16 msdu_len;
698 u8 fw_desc;
699 u8 reserved;
700} __packed;
701
702struct htt_rx_in_ord_ind {
703 u8 info;
704 __le16 peer_id;
705 u8 vdev_id;
706 u8 reserved;
707 __le16 msdu_count;
708 struct htt_rx_in_ord_msdu_desc msdu_descs[0];
709} __packed;
710
711#define HTT_RX_IN_ORD_IND_INFO_TID_MASK 0x0000001f
712#define HTT_RX_IN_ORD_IND_INFO_TID_LSB 0
713#define HTT_RX_IN_ORD_IND_INFO_OFFLOAD_MASK 0x00000020
714#define HTT_RX_IN_ORD_IND_INFO_OFFLOAD_LSB 5
715#define HTT_RX_IN_ORD_IND_INFO_FRAG_MASK 0x00000040
716#define HTT_RX_IN_ORD_IND_INFO_FRAG_LSB 6
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752struct htt_rx_test {
753 u8 num_ints;
754 __le16 num_chars;
755
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759 u8 payload[0];
760} __packed;
761
762static inline __le32 *htt_rx_test_get_ints(struct htt_rx_test *rx_test)
763{
764 return (__le32 *)rx_test->payload;
765}
766
767static inline u8 *htt_rx_test_get_chars(struct htt_rx_test *rx_test)
768{
769 return rx_test->payload + (rx_test->num_ints * sizeof(__le32));
770}
771
772
773
774
775
776
777
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785
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787
788
789
790
791struct htt_pktlog_msg {
792 u8 pad[3];
793 u8 payload[0];
794} __packed;
795
796struct htt_dbg_stats_rx_reorder_stats {
797
798 __le32 deliver_non_qos;
799
800
801 __le32 deliver_in_order;
802
803
804 __le32 deliver_flush_timeout;
805
806
807 __le32 deliver_flush_oow;
808
809
810 __le32 deliver_flush_delba;
811
812
813 __le32 fcs_error;
814
815
816 __le32 mgmt_ctrl;
817
818
819 __le32 invalid_peer;
820
821
822 __le32 dup_non_aggr;
823
824
825 __le32 dup_past;
826
827
828 __le32 dup_in_reorder;
829
830
831 __le32 reorder_timeout;
832
833
834 __le32 invalid_bar_ssn;
835
836
837 __le32 ssn_reset;
838};
839
840struct htt_dbg_stats_wal_tx_stats {
841
842 __le32 comp_queued;
843
844
845 __le32 comp_delivered;
846
847
848 __le32 msdu_enqued;
849
850
851 __le32 mpdu_enqued;
852
853
854 __le32 wmm_drop;
855
856
857 __le32 local_enqued;
858
859
860 __le32 local_freed;
861
862
863 __le32 hw_queued;
864
865
866 __le32 hw_reaped;
867
868
869 __le32 underrun;
870
871
872 __le32 tx_abort;
873
874
875 __le32 mpdus_requed;
876
877
878 __le32 tx_ko;
879
880
881 __le32 data_rc;
882
883
884 __le32 self_triggers;
885
886
887 __le32 sw_retry_failure;
888
889
890 __le32 illgl_rate_phy_err;
891
892
893 __le32 pdev_cont_xretry;
894
895
896 __le32 pdev_tx_timeout;
897
898
899 __le32 pdev_resets;
900
901 __le32 phy_underrun;
902
903
904 __le32 txop_ovf;
905} __packed;
906
907struct htt_dbg_stats_wal_rx_stats {
908
909 __le32 mid_ppdu_route_change;
910
911
912 __le32 status_rcvd;
913
914
915 __le32 r0_frags;
916 __le32 r1_frags;
917 __le32 r2_frags;
918 __le32 r3_frags;
919
920
921 __le32 htt_msdus;
922 __le32 htt_mpdus;
923
924
925 __le32 loc_msdus;
926 __le32 loc_mpdus;
927
928
929 __le32 oversize_amsdu;
930
931
932 __le32 phy_errs;
933
934
935 __le32 phy_err_drop;
936
937
938 __le32 mpdu_errs;
939} __packed;
940
941struct htt_dbg_stats_wal_peer_stats {
942 __le32 dummy;
943} __packed;
944
945struct htt_dbg_stats_wal_pdev_txrx {
946 struct htt_dbg_stats_wal_tx_stats tx_stats;
947 struct htt_dbg_stats_wal_rx_stats rx_stats;
948 struct htt_dbg_stats_wal_peer_stats peer_stats;
949} __packed;
950
951struct htt_dbg_stats_rx_rate_info {
952 __le32 mcs[10];
953 __le32 sgi[10];
954 __le32 nss[4];
955 __le32 stbc[10];
956 __le32 bw[3];
957 __le32 pream[6];
958 __le32 ldpc;
959 __le32 txbf;
960};
961
962
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970
971
972
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980
981
982
983enum htt_dbg_stats_status {
984 HTT_DBG_STATS_STATUS_PRESENT = 0,
985 HTT_DBG_STATS_STATUS_PARTIAL = 1,
986 HTT_DBG_STATS_STATUS_ERROR = 2,
987 HTT_DBG_STATS_STATUS_INVALID = 3,
988 HTT_DBG_STATS_STATUS_SERIES_DONE = 7
989};
990
991
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1066
1067#define HTT_STATS_CONF_ITEM_INFO_STAT_TYPE_MASK 0x1F
1068#define HTT_STATS_CONF_ITEM_INFO_STAT_TYPE_LSB 0
1069#define HTT_STATS_CONF_ITEM_INFO_STATUS_MASK 0xE0
1070#define HTT_STATS_CONF_ITEM_INFO_STATUS_LSB 5
1071
1072struct htt_stats_conf_item {
1073 union {
1074 u8 info;
1075 struct {
1076 u8 stat_type:5;
1077 u8 status:3;
1078 } __packed;
1079 } __packed;
1080 u8 pad;
1081 __le16 length;
1082 u8 payload[0];
1083} __packed;
1084
1085struct htt_stats_conf {
1086 u8 pad[3];
1087 __le32 cookie_lsb;
1088 __le32 cookie_msb;
1089
1090
1091 struct htt_stats_conf_item items[0];
1092} __packed;
1093
1094static inline struct htt_stats_conf_item *htt_stats_conf_next_item(
1095 const struct htt_stats_conf_item *item)
1096{
1097 return (void *)item + sizeof(*item) + roundup(item->length, 4);
1098}
1099
1100
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1128
1129
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1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149struct htt_frag_desc_bank_id {
1150 __le16 bank_min_id;
1151 __le16 bank_max_id;
1152} __packed;
1153
1154
1155
1156#define HTT_FRAG_DESC_BANK_MAX 4
1157
1158#define HTT_FRAG_DESC_BANK_CFG_INFO_PDEV_ID_MASK 0x03
1159#define HTT_FRAG_DESC_BANK_CFG_INFO_PDEV_ID_LSB 0
1160#define HTT_FRAG_DESC_BANK_CFG_INFO_SWAP (1 << 2)
1161
1162struct htt_frag_desc_bank_cfg {
1163 u8 info;
1164 u8 num_banks;
1165 u8 desc_size;
1166 __le32 bank_base_addrs[HTT_FRAG_DESC_BANK_MAX];
1167 struct htt_frag_desc_bank_id bank_id[HTT_FRAG_DESC_BANK_MAX];
1168} __packed;
1169
1170union htt_rx_pn_t {
1171
1172 u32 pn24;
1173
1174
1175 u_int64_t pn48;
1176
1177
1178 u_int64_t pn128[2];
1179};
1180
1181struct htt_cmd {
1182 struct htt_cmd_hdr hdr;
1183 union {
1184 struct htt_ver_req ver_req;
1185 struct htt_mgmt_tx_desc mgmt_tx;
1186 struct htt_data_tx_desc data_tx;
1187 struct htt_rx_ring_setup rx_setup;
1188 struct htt_stats_req stats_req;
1189 struct htt_oob_sync_req oob_sync_req;
1190 struct htt_aggr_conf aggr_conf;
1191 struct htt_frag_desc_bank_cfg frag_desc_bank_cfg;
1192 };
1193} __packed;
1194
1195struct htt_resp {
1196 struct htt_resp_hdr hdr;
1197 union {
1198 struct htt_ver_resp ver_resp;
1199 struct htt_mgmt_tx_completion mgmt_tx_completion;
1200 struct htt_data_tx_completion data_tx_completion;
1201 struct htt_rx_indication rx_ind;
1202 struct htt_rx_fragment_indication rx_frag_ind;
1203 struct htt_rx_peer_map peer_map;
1204 struct htt_rx_peer_unmap peer_unmap;
1205 struct htt_rx_flush rx_flush;
1206 struct htt_rx_addba rx_addba;
1207 struct htt_rx_delba rx_delba;
1208 struct htt_security_indication security_indication;
1209 struct htt_rc_update rc_update;
1210 struct htt_rx_test rx_test;
1211 struct htt_pktlog_msg pktlog_msg;
1212 struct htt_stats_conf stats_conf;
1213 struct htt_rx_pn_ind rx_pn_ind;
1214 struct htt_rx_offload_ind rx_offload_ind;
1215 struct htt_rx_in_ord_ind rx_in_ord_ind;
1216 };
1217} __packed;
1218
1219
1220
1221struct htt_tx_done {
1222 u32 msdu_id;
1223 bool discard;
1224 bool no_ack;
1225};
1226
1227struct htt_peer_map_event {
1228 u8 vdev_id;
1229 u16 peer_id;
1230 u8 addr[ETH_ALEN];
1231};
1232
1233struct htt_peer_unmap_event {
1234 u16 peer_id;
1235};
1236
1237struct ath10k_htt_txbuf {
1238 struct htt_data_tx_desc_frag frags[2];
1239 struct ath10k_htc_hdr htc_hdr;
1240 struct htt_cmd_hdr cmd_hdr;
1241 struct htt_data_tx_desc cmd_tx;
1242} __packed;
1243
1244struct ath10k_htt {
1245 struct ath10k *ar;
1246 enum ath10k_htc_ep_id eid;
1247
1248 u8 target_version_major;
1249 u8 target_version_minor;
1250 struct completion target_version_received;
1251
1252 struct {
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262 struct sk_buff **netbufs_ring;
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274 bool in_ord_rx;
1275 DECLARE_HASHTABLE(skb_table, 4);
1276
1277
1278
1279
1280
1281
1282
1283 __le32 *paddrs_ring;
1284
1285
1286
1287
1288
1289 dma_addr_t base_paddr;
1290
1291
1292 int size;
1293
1294
1295 unsigned size_mask;
1296
1297
1298 int fill_level;
1299
1300
1301 int fill_cnt;
1302
1303
1304
1305
1306
1307
1308
1309 struct {
1310 __le32 *vaddr;
1311 dma_addr_t paddr;
1312 } alloc_idx;
1313
1314
1315 struct {
1316 unsigned msdu_payld;
1317 } sw_rd_idx;
1318
1319
1320
1321
1322
1323 struct timer_list refill_retry_timer;
1324
1325
1326 spinlock_t lock;
1327 } rx_ring;
1328
1329 unsigned int prefetch_len;
1330
1331
1332 spinlock_t tx_lock;
1333 int max_num_pending_tx;
1334 int num_pending_tx;
1335 struct idr pending_tx;
1336 wait_queue_head_t empty_tx_wq;
1337 struct dma_pool *tx_pool;
1338
1339
1340
1341 bool rx_confused;
1342 struct tasklet_struct rx_replenish_task;
1343
1344
1345
1346 struct tasklet_struct txrx_compl_task;
1347 struct sk_buff_head tx_compl_q;
1348 struct sk_buff_head rx_compl_q;
1349 struct sk_buff_head rx_in_ord_compl_q;
1350
1351
1352 struct ieee80211_rx_status rx_status;
1353};
1354
1355#define RX_HTT_HDR_STATUS_LEN 64
1356
1357
1358
1359
1360struct htt_rx_desc {
1361 union {
1362
1363
1364 struct fw_rx_desc_base fw_desc;
1365 u32 pad;
1366 } __packed;
1367 struct {
1368 struct rx_attention attention;
1369 struct rx_frag_info frag_info;
1370 struct rx_mpdu_start mpdu_start;
1371 struct rx_msdu_start msdu_start;
1372 struct rx_msdu_end msdu_end;
1373 struct rx_mpdu_end mpdu_end;
1374 struct rx_ppdu_start ppdu_start;
1375 struct rx_ppdu_end ppdu_end;
1376 } __packed;
1377 u8 rx_hdr_status[RX_HTT_HDR_STATUS_LEN];
1378 u8 msdu_payload[0];
1379};
1380
1381#define HTT_RX_DESC_ALIGN 8
1382
1383#define HTT_MAC_ADDR_LEN 6
1384
1385
1386
1387
1388
1389
1390#define HTT_RX_BUF_SIZE 1920
1391#define HTT_RX_MSDU_SIZE (HTT_RX_BUF_SIZE - (int)sizeof(struct htt_rx_desc))
1392
1393
1394
1395#define ATH10K_HTT_MAX_NUM_REFILL 16
1396
1397
1398
1399
1400
1401
1402#define HTT_LOG2_MAX_CACHE_LINE_SIZE 7
1403#define HTT_MAX_CACHE_LINE_SIZE_MASK ((1 << HTT_LOG2_MAX_CACHE_LINE_SIZE) - 1)
1404
1405int ath10k_htt_connect(struct ath10k_htt *htt);
1406int ath10k_htt_init(struct ath10k *ar);
1407int ath10k_htt_setup(struct ath10k_htt *htt);
1408
1409int ath10k_htt_tx_alloc(struct ath10k_htt *htt);
1410void ath10k_htt_tx_free(struct ath10k_htt *htt);
1411
1412int ath10k_htt_rx_alloc(struct ath10k_htt *htt);
1413int ath10k_htt_rx_ring_refill(struct ath10k *ar);
1414void ath10k_htt_rx_free(struct ath10k_htt *htt);
1415
1416void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb);
1417void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb);
1418int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt);
1419int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie);
1420int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt);
1421int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
1422 u8 max_subfrms_ampdu,
1423 u8 max_subfrms_amsdu);
1424
1425void __ath10k_htt_tx_dec_pending(struct ath10k_htt *htt);
1426int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt, struct sk_buff *skb);
1427void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id);
1428int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *);
1429int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *);
1430
1431#endif
1432