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18#ifndef _WMI_H_
19#define _WMI_H_
20
21#include <linux/types.h>
22#include <net/mac80211.h>
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64struct wmi_cmd_hdr {
65 __le32 cmd_id;
66} __packed;
67
68#define WMI_CMD_HDR_CMD_ID_MASK 0x00FFFFFF
69#define WMI_CMD_HDR_CMD_ID_LSB 0
70#define WMI_CMD_HDR_PLT_PRIV_MASK 0xFF000000
71#define WMI_CMD_HDR_PLT_PRIV_LSB 24
72
73#define HTC_PROTOCOL_VERSION 0x0002
74#define WMI_PROTOCOL_VERSION 0x0002
75
76enum wmi_service {
77 WMI_SERVICE_BEACON_OFFLOAD = 0,
78 WMI_SERVICE_SCAN_OFFLOAD,
79 WMI_SERVICE_ROAM_OFFLOAD,
80 WMI_SERVICE_BCN_MISS_OFFLOAD,
81 WMI_SERVICE_STA_PWRSAVE,
82 WMI_SERVICE_STA_ADVANCED_PWRSAVE,
83 WMI_SERVICE_AP_UAPSD,
84 WMI_SERVICE_AP_DFS,
85 WMI_SERVICE_11AC,
86 WMI_SERVICE_BLOCKACK,
87 WMI_SERVICE_PHYERR,
88 WMI_SERVICE_BCN_FILTER,
89 WMI_SERVICE_RTT,
90 WMI_SERVICE_RATECTRL,
91 WMI_SERVICE_WOW,
92 WMI_SERVICE_RATECTRL_CACHE,
93 WMI_SERVICE_IRAM_TIDS,
94 WMI_SERVICE_ARPNS_OFFLOAD,
95 WMI_SERVICE_NLO,
96 WMI_SERVICE_GTK_OFFLOAD,
97 WMI_SERVICE_SCAN_SCH,
98 WMI_SERVICE_CSA_OFFLOAD,
99 WMI_SERVICE_CHATTER,
100 WMI_SERVICE_COEX_FREQAVOID,
101 WMI_SERVICE_PACKET_POWER_SAVE,
102 WMI_SERVICE_FORCE_FW_HANG,
103 WMI_SERVICE_GPIO,
104 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
105 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
106 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
107 WMI_SERVICE_STA_KEEP_ALIVE,
108 WMI_SERVICE_TX_ENCAP,
109 WMI_SERVICE_BURST,
110 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT,
111 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT,
112 WMI_SERVICE_ROAM_SCAN_OFFLOAD,
113 WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC,
114 WMI_SERVICE_EARLY_RX,
115 WMI_SERVICE_STA_SMPS,
116 WMI_SERVICE_FWTEST,
117 WMI_SERVICE_STA_WMMAC,
118 WMI_SERVICE_TDLS,
119 WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE,
120 WMI_SERVICE_ADAPTIVE_OCS,
121 WMI_SERVICE_BA_SSN_SUPPORT,
122 WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE,
123 WMI_SERVICE_WLAN_HB,
124 WMI_SERVICE_LTE_ANT_SHARE_SUPPORT,
125 WMI_SERVICE_BATCH_SCAN,
126 WMI_SERVICE_QPOWER,
127 WMI_SERVICE_PLMREQ,
128 WMI_SERVICE_THERMAL_MGMT,
129 WMI_SERVICE_RMC,
130 WMI_SERVICE_MHF_OFFLOAD,
131 WMI_SERVICE_COEX_SAR,
132 WMI_SERVICE_BCN_TXRATE_OVERRIDE,
133 WMI_SERVICE_NAN,
134 WMI_SERVICE_L1SS_STAT,
135 WMI_SERVICE_ESTIMATE_LINKSPEED,
136 WMI_SERVICE_OBSS_SCAN,
137 WMI_SERVICE_TDLS_OFFCHAN,
138 WMI_SERVICE_TDLS_UAPSD_BUFFER_STA,
139 WMI_SERVICE_TDLS_UAPSD_SLEEP_STA,
140 WMI_SERVICE_IBSS_PWRSAVE,
141 WMI_SERVICE_LPASS,
142 WMI_SERVICE_EXTSCAN,
143 WMI_SERVICE_D0WOW,
144 WMI_SERVICE_HSOFFLOAD,
145 WMI_SERVICE_ROAM_HO_OFFLOAD,
146 WMI_SERVICE_RX_FULL_REORDER,
147 WMI_SERVICE_DHCP_OFFLOAD,
148 WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT,
149 WMI_SERVICE_MDNS_OFFLOAD,
150 WMI_SERVICE_SAP_AUTH_OFFLOAD,
151
152
153 WMI_SERVICE_MAX,
154};
155
156enum wmi_10x_service {
157 WMI_10X_SERVICE_BEACON_OFFLOAD = 0,
158 WMI_10X_SERVICE_SCAN_OFFLOAD,
159 WMI_10X_SERVICE_ROAM_OFFLOAD,
160 WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
161 WMI_10X_SERVICE_STA_PWRSAVE,
162 WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
163 WMI_10X_SERVICE_AP_UAPSD,
164 WMI_10X_SERVICE_AP_DFS,
165 WMI_10X_SERVICE_11AC,
166 WMI_10X_SERVICE_BLOCKACK,
167 WMI_10X_SERVICE_PHYERR,
168 WMI_10X_SERVICE_BCN_FILTER,
169 WMI_10X_SERVICE_RTT,
170 WMI_10X_SERVICE_RATECTRL,
171 WMI_10X_SERVICE_WOW,
172 WMI_10X_SERVICE_RATECTRL_CACHE,
173 WMI_10X_SERVICE_IRAM_TIDS,
174 WMI_10X_SERVICE_BURST,
175
176
177 WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
178 WMI_10X_SERVICE_FORCE_FW_HANG,
179 WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
180};
181
182enum wmi_main_service {
183 WMI_MAIN_SERVICE_BEACON_OFFLOAD = 0,
184 WMI_MAIN_SERVICE_SCAN_OFFLOAD,
185 WMI_MAIN_SERVICE_ROAM_OFFLOAD,
186 WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
187 WMI_MAIN_SERVICE_STA_PWRSAVE,
188 WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
189 WMI_MAIN_SERVICE_AP_UAPSD,
190 WMI_MAIN_SERVICE_AP_DFS,
191 WMI_MAIN_SERVICE_11AC,
192 WMI_MAIN_SERVICE_BLOCKACK,
193 WMI_MAIN_SERVICE_PHYERR,
194 WMI_MAIN_SERVICE_BCN_FILTER,
195 WMI_MAIN_SERVICE_RTT,
196 WMI_MAIN_SERVICE_RATECTRL,
197 WMI_MAIN_SERVICE_WOW,
198 WMI_MAIN_SERVICE_RATECTRL_CACHE,
199 WMI_MAIN_SERVICE_IRAM_TIDS,
200 WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
201 WMI_MAIN_SERVICE_NLO,
202 WMI_MAIN_SERVICE_GTK_OFFLOAD,
203 WMI_MAIN_SERVICE_SCAN_SCH,
204 WMI_MAIN_SERVICE_CSA_OFFLOAD,
205 WMI_MAIN_SERVICE_CHATTER,
206 WMI_MAIN_SERVICE_COEX_FREQAVOID,
207 WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
208 WMI_MAIN_SERVICE_FORCE_FW_HANG,
209 WMI_MAIN_SERVICE_GPIO,
210 WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
211 WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
212 WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
213 WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
214 WMI_MAIN_SERVICE_TX_ENCAP,
215};
216
217static inline char *wmi_service_name(int service_id)
218{
219#define SVCSTR(x) case x: return #x
220
221 switch (service_id) {
222 SVCSTR(WMI_SERVICE_BEACON_OFFLOAD);
223 SVCSTR(WMI_SERVICE_SCAN_OFFLOAD);
224 SVCSTR(WMI_SERVICE_ROAM_OFFLOAD);
225 SVCSTR(WMI_SERVICE_BCN_MISS_OFFLOAD);
226 SVCSTR(WMI_SERVICE_STA_PWRSAVE);
227 SVCSTR(WMI_SERVICE_STA_ADVANCED_PWRSAVE);
228 SVCSTR(WMI_SERVICE_AP_UAPSD);
229 SVCSTR(WMI_SERVICE_AP_DFS);
230 SVCSTR(WMI_SERVICE_11AC);
231 SVCSTR(WMI_SERVICE_BLOCKACK);
232 SVCSTR(WMI_SERVICE_PHYERR);
233 SVCSTR(WMI_SERVICE_BCN_FILTER);
234 SVCSTR(WMI_SERVICE_RTT);
235 SVCSTR(WMI_SERVICE_RATECTRL);
236 SVCSTR(WMI_SERVICE_WOW);
237 SVCSTR(WMI_SERVICE_RATECTRL_CACHE);
238 SVCSTR(WMI_SERVICE_IRAM_TIDS);
239 SVCSTR(WMI_SERVICE_ARPNS_OFFLOAD);
240 SVCSTR(WMI_SERVICE_NLO);
241 SVCSTR(WMI_SERVICE_GTK_OFFLOAD);
242 SVCSTR(WMI_SERVICE_SCAN_SCH);
243 SVCSTR(WMI_SERVICE_CSA_OFFLOAD);
244 SVCSTR(WMI_SERVICE_CHATTER);
245 SVCSTR(WMI_SERVICE_COEX_FREQAVOID);
246 SVCSTR(WMI_SERVICE_PACKET_POWER_SAVE);
247 SVCSTR(WMI_SERVICE_FORCE_FW_HANG);
248 SVCSTR(WMI_SERVICE_GPIO);
249 SVCSTR(WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM);
250 SVCSTR(WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG);
251 SVCSTR(WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG);
252 SVCSTR(WMI_SERVICE_STA_KEEP_ALIVE);
253 SVCSTR(WMI_SERVICE_TX_ENCAP);
254 SVCSTR(WMI_SERVICE_BURST);
255 SVCSTR(WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT);
256 SVCSTR(WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT);
257 SVCSTR(WMI_SERVICE_ROAM_SCAN_OFFLOAD);
258 SVCSTR(WMI_SERVICE_AP_PS_DETECT_OUT_OF_SYNC);
259 SVCSTR(WMI_SERVICE_EARLY_RX);
260 SVCSTR(WMI_SERVICE_STA_SMPS);
261 SVCSTR(WMI_SERVICE_FWTEST);
262 SVCSTR(WMI_SERVICE_STA_WMMAC);
263 SVCSTR(WMI_SERVICE_TDLS);
264 SVCSTR(WMI_SERVICE_MCC_BCN_INTERVAL_CHANGE);
265 SVCSTR(WMI_SERVICE_ADAPTIVE_OCS);
266 SVCSTR(WMI_SERVICE_BA_SSN_SUPPORT);
267 SVCSTR(WMI_SERVICE_FILTER_IPSEC_NATKEEPALIVE);
268 SVCSTR(WMI_SERVICE_WLAN_HB);
269 SVCSTR(WMI_SERVICE_LTE_ANT_SHARE_SUPPORT);
270 SVCSTR(WMI_SERVICE_BATCH_SCAN);
271 SVCSTR(WMI_SERVICE_QPOWER);
272 SVCSTR(WMI_SERVICE_PLMREQ);
273 SVCSTR(WMI_SERVICE_THERMAL_MGMT);
274 SVCSTR(WMI_SERVICE_RMC);
275 SVCSTR(WMI_SERVICE_MHF_OFFLOAD);
276 SVCSTR(WMI_SERVICE_COEX_SAR);
277 SVCSTR(WMI_SERVICE_BCN_TXRATE_OVERRIDE);
278 SVCSTR(WMI_SERVICE_NAN);
279 SVCSTR(WMI_SERVICE_L1SS_STAT);
280 SVCSTR(WMI_SERVICE_ESTIMATE_LINKSPEED);
281 SVCSTR(WMI_SERVICE_OBSS_SCAN);
282 SVCSTR(WMI_SERVICE_TDLS_OFFCHAN);
283 SVCSTR(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA);
284 SVCSTR(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA);
285 SVCSTR(WMI_SERVICE_IBSS_PWRSAVE);
286 SVCSTR(WMI_SERVICE_LPASS);
287 SVCSTR(WMI_SERVICE_EXTSCAN);
288 SVCSTR(WMI_SERVICE_D0WOW);
289 SVCSTR(WMI_SERVICE_HSOFFLOAD);
290 SVCSTR(WMI_SERVICE_ROAM_HO_OFFLOAD);
291 SVCSTR(WMI_SERVICE_RX_FULL_REORDER);
292 SVCSTR(WMI_SERVICE_DHCP_OFFLOAD);
293 SVCSTR(WMI_SERVICE_STA_RX_IPA_OFFLOAD_SUPPORT);
294 SVCSTR(WMI_SERVICE_MDNS_OFFLOAD);
295 SVCSTR(WMI_SERVICE_SAP_AUTH_OFFLOAD);
296 default:
297 return NULL;
298 }
299
300#undef SVCSTR
301}
302
303#define WMI_SERVICE_IS_ENABLED(wmi_svc_bmap, svc_id, len) \
304 ((svc_id) < (len) && \
305 __le32_to_cpu((wmi_svc_bmap)[(svc_id)/(sizeof(u32))]) & \
306 BIT((svc_id)%(sizeof(u32))))
307
308#define SVCMAP(x, y, len) \
309 do { \
310 if (WMI_SERVICE_IS_ENABLED((in), (x), (len))) \
311 __set_bit(y, out); \
312 } while (0)
313
314static inline void wmi_10x_svc_map(const __le32 *in, unsigned long *out,
315 size_t len)
316{
317 SVCMAP(WMI_10X_SERVICE_BEACON_OFFLOAD,
318 WMI_SERVICE_BEACON_OFFLOAD, len);
319 SVCMAP(WMI_10X_SERVICE_SCAN_OFFLOAD,
320 WMI_SERVICE_SCAN_OFFLOAD, len);
321 SVCMAP(WMI_10X_SERVICE_ROAM_OFFLOAD,
322 WMI_SERVICE_ROAM_OFFLOAD, len);
323 SVCMAP(WMI_10X_SERVICE_BCN_MISS_OFFLOAD,
324 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
325 SVCMAP(WMI_10X_SERVICE_STA_PWRSAVE,
326 WMI_SERVICE_STA_PWRSAVE, len);
327 SVCMAP(WMI_10X_SERVICE_STA_ADVANCED_PWRSAVE,
328 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
329 SVCMAP(WMI_10X_SERVICE_AP_UAPSD,
330 WMI_SERVICE_AP_UAPSD, len);
331 SVCMAP(WMI_10X_SERVICE_AP_DFS,
332 WMI_SERVICE_AP_DFS, len);
333 SVCMAP(WMI_10X_SERVICE_11AC,
334 WMI_SERVICE_11AC, len);
335 SVCMAP(WMI_10X_SERVICE_BLOCKACK,
336 WMI_SERVICE_BLOCKACK, len);
337 SVCMAP(WMI_10X_SERVICE_PHYERR,
338 WMI_SERVICE_PHYERR, len);
339 SVCMAP(WMI_10X_SERVICE_BCN_FILTER,
340 WMI_SERVICE_BCN_FILTER, len);
341 SVCMAP(WMI_10X_SERVICE_RTT,
342 WMI_SERVICE_RTT, len);
343 SVCMAP(WMI_10X_SERVICE_RATECTRL,
344 WMI_SERVICE_RATECTRL, len);
345 SVCMAP(WMI_10X_SERVICE_WOW,
346 WMI_SERVICE_WOW, len);
347 SVCMAP(WMI_10X_SERVICE_RATECTRL_CACHE,
348 WMI_SERVICE_RATECTRL_CACHE, len);
349 SVCMAP(WMI_10X_SERVICE_IRAM_TIDS,
350 WMI_SERVICE_IRAM_TIDS, len);
351 SVCMAP(WMI_10X_SERVICE_BURST,
352 WMI_SERVICE_BURST, len);
353 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_SW_SUPPORT,
354 WMI_SERVICE_SMART_ANTENNA_SW_SUPPORT, len);
355 SVCMAP(WMI_10X_SERVICE_FORCE_FW_HANG,
356 WMI_SERVICE_FORCE_FW_HANG, len);
357 SVCMAP(WMI_10X_SERVICE_SMART_ANTENNA_HW_SUPPORT,
358 WMI_SERVICE_SMART_ANTENNA_HW_SUPPORT, len);
359}
360
361static inline void wmi_main_svc_map(const __le32 *in, unsigned long *out,
362 size_t len)
363{
364 SVCMAP(WMI_MAIN_SERVICE_BEACON_OFFLOAD,
365 WMI_SERVICE_BEACON_OFFLOAD, len);
366 SVCMAP(WMI_MAIN_SERVICE_SCAN_OFFLOAD,
367 WMI_SERVICE_SCAN_OFFLOAD, len);
368 SVCMAP(WMI_MAIN_SERVICE_ROAM_OFFLOAD,
369 WMI_SERVICE_ROAM_OFFLOAD, len);
370 SVCMAP(WMI_MAIN_SERVICE_BCN_MISS_OFFLOAD,
371 WMI_SERVICE_BCN_MISS_OFFLOAD, len);
372 SVCMAP(WMI_MAIN_SERVICE_STA_PWRSAVE,
373 WMI_SERVICE_STA_PWRSAVE, len);
374 SVCMAP(WMI_MAIN_SERVICE_STA_ADVANCED_PWRSAVE,
375 WMI_SERVICE_STA_ADVANCED_PWRSAVE, len);
376 SVCMAP(WMI_MAIN_SERVICE_AP_UAPSD,
377 WMI_SERVICE_AP_UAPSD, len);
378 SVCMAP(WMI_MAIN_SERVICE_AP_DFS,
379 WMI_SERVICE_AP_DFS, len);
380 SVCMAP(WMI_MAIN_SERVICE_11AC,
381 WMI_SERVICE_11AC, len);
382 SVCMAP(WMI_MAIN_SERVICE_BLOCKACK,
383 WMI_SERVICE_BLOCKACK, len);
384 SVCMAP(WMI_MAIN_SERVICE_PHYERR,
385 WMI_SERVICE_PHYERR, len);
386 SVCMAP(WMI_MAIN_SERVICE_BCN_FILTER,
387 WMI_SERVICE_BCN_FILTER, len);
388 SVCMAP(WMI_MAIN_SERVICE_RTT,
389 WMI_SERVICE_RTT, len);
390 SVCMAP(WMI_MAIN_SERVICE_RATECTRL,
391 WMI_SERVICE_RATECTRL, len);
392 SVCMAP(WMI_MAIN_SERVICE_WOW,
393 WMI_SERVICE_WOW, len);
394 SVCMAP(WMI_MAIN_SERVICE_RATECTRL_CACHE,
395 WMI_SERVICE_RATECTRL_CACHE, len);
396 SVCMAP(WMI_MAIN_SERVICE_IRAM_TIDS,
397 WMI_SERVICE_IRAM_TIDS, len);
398 SVCMAP(WMI_MAIN_SERVICE_ARPNS_OFFLOAD,
399 WMI_SERVICE_ARPNS_OFFLOAD, len);
400 SVCMAP(WMI_MAIN_SERVICE_NLO,
401 WMI_SERVICE_NLO, len);
402 SVCMAP(WMI_MAIN_SERVICE_GTK_OFFLOAD,
403 WMI_SERVICE_GTK_OFFLOAD, len);
404 SVCMAP(WMI_MAIN_SERVICE_SCAN_SCH,
405 WMI_SERVICE_SCAN_SCH, len);
406 SVCMAP(WMI_MAIN_SERVICE_CSA_OFFLOAD,
407 WMI_SERVICE_CSA_OFFLOAD, len);
408 SVCMAP(WMI_MAIN_SERVICE_CHATTER,
409 WMI_SERVICE_CHATTER, len);
410 SVCMAP(WMI_MAIN_SERVICE_COEX_FREQAVOID,
411 WMI_SERVICE_COEX_FREQAVOID, len);
412 SVCMAP(WMI_MAIN_SERVICE_PACKET_POWER_SAVE,
413 WMI_SERVICE_PACKET_POWER_SAVE, len);
414 SVCMAP(WMI_MAIN_SERVICE_FORCE_FW_HANG,
415 WMI_SERVICE_FORCE_FW_HANG, len);
416 SVCMAP(WMI_MAIN_SERVICE_GPIO,
417 WMI_SERVICE_GPIO, len);
418 SVCMAP(WMI_MAIN_SERVICE_STA_DTIM_PS_MODULATED_DTIM,
419 WMI_SERVICE_STA_DTIM_PS_MODULATED_DTIM, len);
420 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG,
421 WMI_SERVICE_STA_UAPSD_BASIC_AUTO_TRIG, len);
422 SVCMAP(WMI_MAIN_SERVICE_STA_UAPSD_VAR_AUTO_TRIG,
423 WMI_SERVICE_STA_UAPSD_VAR_AUTO_TRIG, len);
424 SVCMAP(WMI_MAIN_SERVICE_STA_KEEP_ALIVE,
425 WMI_SERVICE_STA_KEEP_ALIVE, len);
426 SVCMAP(WMI_MAIN_SERVICE_TX_ENCAP,
427 WMI_SERVICE_TX_ENCAP, len);
428}
429
430#undef SVCMAP
431
432
433struct wmi_mac_addr {
434 union {
435 u8 addr[6];
436 struct {
437 u32 word0;
438 u32 word1;
439 } __packed;
440 } __packed;
441} __packed;
442
443struct wmi_cmd_map {
444 u32 init_cmdid;
445 u32 start_scan_cmdid;
446 u32 stop_scan_cmdid;
447 u32 scan_chan_list_cmdid;
448 u32 scan_sch_prio_tbl_cmdid;
449 u32 pdev_set_regdomain_cmdid;
450 u32 pdev_set_channel_cmdid;
451 u32 pdev_set_param_cmdid;
452 u32 pdev_pktlog_enable_cmdid;
453 u32 pdev_pktlog_disable_cmdid;
454 u32 pdev_set_wmm_params_cmdid;
455 u32 pdev_set_ht_cap_ie_cmdid;
456 u32 pdev_set_vht_cap_ie_cmdid;
457 u32 pdev_set_dscp_tid_map_cmdid;
458 u32 pdev_set_quiet_mode_cmdid;
459 u32 pdev_green_ap_ps_enable_cmdid;
460 u32 pdev_get_tpc_config_cmdid;
461 u32 pdev_set_base_macaddr_cmdid;
462 u32 vdev_create_cmdid;
463 u32 vdev_delete_cmdid;
464 u32 vdev_start_request_cmdid;
465 u32 vdev_restart_request_cmdid;
466 u32 vdev_up_cmdid;
467 u32 vdev_stop_cmdid;
468 u32 vdev_down_cmdid;
469 u32 vdev_set_param_cmdid;
470 u32 vdev_install_key_cmdid;
471 u32 peer_create_cmdid;
472 u32 peer_delete_cmdid;
473 u32 peer_flush_tids_cmdid;
474 u32 peer_set_param_cmdid;
475 u32 peer_assoc_cmdid;
476 u32 peer_add_wds_entry_cmdid;
477 u32 peer_remove_wds_entry_cmdid;
478 u32 peer_mcast_group_cmdid;
479 u32 bcn_tx_cmdid;
480 u32 pdev_send_bcn_cmdid;
481 u32 bcn_tmpl_cmdid;
482 u32 bcn_filter_rx_cmdid;
483 u32 prb_req_filter_rx_cmdid;
484 u32 mgmt_tx_cmdid;
485 u32 prb_tmpl_cmdid;
486 u32 addba_clear_resp_cmdid;
487 u32 addba_send_cmdid;
488 u32 addba_status_cmdid;
489 u32 delba_send_cmdid;
490 u32 addba_set_resp_cmdid;
491 u32 send_singleamsdu_cmdid;
492 u32 sta_powersave_mode_cmdid;
493 u32 sta_powersave_param_cmdid;
494 u32 sta_mimo_ps_mode_cmdid;
495 u32 pdev_dfs_enable_cmdid;
496 u32 pdev_dfs_disable_cmdid;
497 u32 roam_scan_mode;
498 u32 roam_scan_rssi_threshold;
499 u32 roam_scan_period;
500 u32 roam_scan_rssi_change_threshold;
501 u32 roam_ap_profile;
502 u32 ofl_scan_add_ap_profile;
503 u32 ofl_scan_remove_ap_profile;
504 u32 ofl_scan_period;
505 u32 p2p_dev_set_device_info;
506 u32 p2p_dev_set_discoverability;
507 u32 p2p_go_set_beacon_ie;
508 u32 p2p_go_set_probe_resp_ie;
509 u32 p2p_set_vendor_ie_data_cmdid;
510 u32 ap_ps_peer_param_cmdid;
511 u32 ap_ps_peer_uapsd_coex_cmdid;
512 u32 peer_rate_retry_sched_cmdid;
513 u32 wlan_profile_trigger_cmdid;
514 u32 wlan_profile_set_hist_intvl_cmdid;
515 u32 wlan_profile_get_profile_data_cmdid;
516 u32 wlan_profile_enable_profile_id_cmdid;
517 u32 wlan_profile_list_profile_id_cmdid;
518 u32 pdev_suspend_cmdid;
519 u32 pdev_resume_cmdid;
520 u32 add_bcn_filter_cmdid;
521 u32 rmv_bcn_filter_cmdid;
522 u32 wow_add_wake_pattern_cmdid;
523 u32 wow_del_wake_pattern_cmdid;
524 u32 wow_enable_disable_wake_event_cmdid;
525 u32 wow_enable_cmdid;
526 u32 wow_hostwakeup_from_sleep_cmdid;
527 u32 rtt_measreq_cmdid;
528 u32 rtt_tsf_cmdid;
529 u32 vdev_spectral_scan_configure_cmdid;
530 u32 vdev_spectral_scan_enable_cmdid;
531 u32 request_stats_cmdid;
532 u32 set_arp_ns_offload_cmdid;
533 u32 network_list_offload_config_cmdid;
534 u32 gtk_offload_cmdid;
535 u32 csa_offload_enable_cmdid;
536 u32 csa_offload_chanswitch_cmdid;
537 u32 chatter_set_mode_cmdid;
538 u32 peer_tid_addba_cmdid;
539 u32 peer_tid_delba_cmdid;
540 u32 sta_dtim_ps_method_cmdid;
541 u32 sta_uapsd_auto_trig_cmdid;
542 u32 sta_keepalive_cmd;
543 u32 echo_cmdid;
544 u32 pdev_utf_cmdid;
545 u32 dbglog_cfg_cmdid;
546 u32 pdev_qvit_cmdid;
547 u32 pdev_ftm_intg_cmdid;
548 u32 vdev_set_keepalive_cmdid;
549 u32 vdev_get_keepalive_cmdid;
550 u32 force_fw_hang_cmdid;
551 u32 gpio_config_cmdid;
552 u32 gpio_output_cmdid;
553 u32 pdev_get_temperature_cmdid;
554 u32 vdev_set_wmm_params_cmdid;
555};
556
557
558
559
560enum wmi_cmd_group {
561
562 WMI_GRP_START = 0x3,
563 WMI_GRP_SCAN = WMI_GRP_START,
564 WMI_GRP_PDEV,
565 WMI_GRP_VDEV,
566 WMI_GRP_PEER,
567 WMI_GRP_MGMT,
568 WMI_GRP_BA_NEG,
569 WMI_GRP_STA_PS,
570 WMI_GRP_DFS,
571 WMI_GRP_ROAM,
572 WMI_GRP_OFL_SCAN,
573 WMI_GRP_P2P,
574 WMI_GRP_AP_PS,
575 WMI_GRP_RATE_CTRL,
576 WMI_GRP_PROFILE,
577 WMI_GRP_SUSPEND,
578 WMI_GRP_BCN_FILTER,
579 WMI_GRP_WOW,
580 WMI_GRP_RTT,
581 WMI_GRP_SPECTRAL,
582 WMI_GRP_STATS,
583 WMI_GRP_ARP_NS_OFL,
584 WMI_GRP_NLO_OFL,
585 WMI_GRP_GTK_OFL,
586 WMI_GRP_CSA_OFL,
587 WMI_GRP_CHATTER,
588 WMI_GRP_TID_ADDBA,
589 WMI_GRP_MISC,
590 WMI_GRP_GPIO,
591};
592
593#define WMI_CMD_GRP(grp_id) (((grp_id) << 12) | 0x1)
594#define WMI_EVT_GRP_START_ID(grp_id) (((grp_id) << 12) | 0x1)
595
596#define WMI_CMD_UNSUPPORTED 0
597
598
599enum wmi_cmd_id {
600 WMI_INIT_CMDID = 0x1,
601
602
603 WMI_START_SCAN_CMDID = WMI_CMD_GRP(WMI_GRP_SCAN),
604 WMI_STOP_SCAN_CMDID,
605 WMI_SCAN_CHAN_LIST_CMDID,
606 WMI_SCAN_SCH_PRIO_TBL_CMDID,
607
608
609 WMI_PDEV_SET_REGDOMAIN_CMDID = WMI_CMD_GRP(WMI_GRP_PDEV),
610 WMI_PDEV_SET_CHANNEL_CMDID,
611 WMI_PDEV_SET_PARAM_CMDID,
612 WMI_PDEV_PKTLOG_ENABLE_CMDID,
613 WMI_PDEV_PKTLOG_DISABLE_CMDID,
614 WMI_PDEV_SET_WMM_PARAMS_CMDID,
615 WMI_PDEV_SET_HT_CAP_IE_CMDID,
616 WMI_PDEV_SET_VHT_CAP_IE_CMDID,
617 WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
618 WMI_PDEV_SET_QUIET_MODE_CMDID,
619 WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
620 WMI_PDEV_GET_TPC_CONFIG_CMDID,
621 WMI_PDEV_SET_BASE_MACADDR_CMDID,
622
623
624 WMI_VDEV_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_VDEV),
625 WMI_VDEV_DELETE_CMDID,
626 WMI_VDEV_START_REQUEST_CMDID,
627 WMI_VDEV_RESTART_REQUEST_CMDID,
628 WMI_VDEV_UP_CMDID,
629 WMI_VDEV_STOP_CMDID,
630 WMI_VDEV_DOWN_CMDID,
631 WMI_VDEV_SET_PARAM_CMDID,
632 WMI_VDEV_INSTALL_KEY_CMDID,
633
634
635 WMI_PEER_CREATE_CMDID = WMI_CMD_GRP(WMI_GRP_PEER),
636 WMI_PEER_DELETE_CMDID,
637 WMI_PEER_FLUSH_TIDS_CMDID,
638 WMI_PEER_SET_PARAM_CMDID,
639 WMI_PEER_ASSOC_CMDID,
640 WMI_PEER_ADD_WDS_ENTRY_CMDID,
641 WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
642 WMI_PEER_MCAST_GROUP_CMDID,
643
644
645 WMI_BCN_TX_CMDID = WMI_CMD_GRP(WMI_GRP_MGMT),
646 WMI_PDEV_SEND_BCN_CMDID,
647 WMI_BCN_TMPL_CMDID,
648 WMI_BCN_FILTER_RX_CMDID,
649 WMI_PRB_REQ_FILTER_RX_CMDID,
650 WMI_MGMT_TX_CMDID,
651 WMI_PRB_TMPL_CMDID,
652
653
654 WMI_ADDBA_CLEAR_RESP_CMDID = WMI_CMD_GRP(WMI_GRP_BA_NEG),
655 WMI_ADDBA_SEND_CMDID,
656 WMI_ADDBA_STATUS_CMDID,
657 WMI_DELBA_SEND_CMDID,
658 WMI_ADDBA_SET_RESP_CMDID,
659 WMI_SEND_SINGLEAMSDU_CMDID,
660
661
662 WMI_STA_POWERSAVE_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_STA_PS),
663 WMI_STA_POWERSAVE_PARAM_CMDID,
664 WMI_STA_MIMO_PS_MODE_CMDID,
665
666
667 WMI_PDEV_DFS_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_DFS),
668 WMI_PDEV_DFS_DISABLE_CMDID,
669
670
671 WMI_ROAM_SCAN_MODE = WMI_CMD_GRP(WMI_GRP_ROAM),
672 WMI_ROAM_SCAN_RSSI_THRESHOLD,
673 WMI_ROAM_SCAN_PERIOD,
674 WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
675 WMI_ROAM_AP_PROFILE,
676
677
678 WMI_OFL_SCAN_ADD_AP_PROFILE = WMI_CMD_GRP(WMI_GRP_OFL_SCAN),
679 WMI_OFL_SCAN_REMOVE_AP_PROFILE,
680 WMI_OFL_SCAN_PERIOD,
681
682
683 WMI_P2P_DEV_SET_DEVICE_INFO = WMI_CMD_GRP(WMI_GRP_P2P),
684 WMI_P2P_DEV_SET_DISCOVERABILITY,
685 WMI_P2P_GO_SET_BEACON_IE,
686 WMI_P2P_GO_SET_PROBE_RESP_IE,
687 WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
688
689
690 WMI_AP_PS_PEER_PARAM_CMDID = WMI_CMD_GRP(WMI_GRP_AP_PS),
691 WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
692
693
694 WMI_PEER_RATE_RETRY_SCHED_CMDID =
695 WMI_CMD_GRP(WMI_GRP_RATE_CTRL),
696
697
698 WMI_WLAN_PROFILE_TRIGGER_CMDID = WMI_CMD_GRP(WMI_GRP_PROFILE),
699 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
700 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
701 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
702 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
703
704
705 WMI_PDEV_SUSPEND_CMDID = WMI_CMD_GRP(WMI_GRP_SUSPEND),
706 WMI_PDEV_RESUME_CMDID,
707
708
709 WMI_ADD_BCN_FILTER_CMDID = WMI_CMD_GRP(WMI_GRP_BCN_FILTER),
710 WMI_RMV_BCN_FILTER_CMDID,
711
712
713 WMI_WOW_ADD_WAKE_PATTERN_CMDID = WMI_CMD_GRP(WMI_GRP_WOW),
714 WMI_WOW_DEL_WAKE_PATTERN_CMDID,
715 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
716 WMI_WOW_ENABLE_CMDID,
717 WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
718
719
720 WMI_RTT_MEASREQ_CMDID = WMI_CMD_GRP(WMI_GRP_RTT),
721 WMI_RTT_TSF_CMDID,
722
723
724 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID = WMI_CMD_GRP(WMI_GRP_SPECTRAL),
725 WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
726
727
728 WMI_REQUEST_STATS_CMDID = WMI_CMD_GRP(WMI_GRP_STATS),
729
730
731 WMI_SET_ARP_NS_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_ARP_NS_OFL),
732
733
734 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_NLO_OFL),
735
736
737 WMI_GTK_OFFLOAD_CMDID = WMI_CMD_GRP(WMI_GRP_GTK_OFL),
738
739
740 WMI_CSA_OFFLOAD_ENABLE_CMDID = WMI_CMD_GRP(WMI_GRP_CSA_OFL),
741 WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
742
743
744 WMI_CHATTER_SET_MODE_CMDID = WMI_CMD_GRP(WMI_GRP_CHATTER),
745
746
747 WMI_PEER_TID_ADDBA_CMDID = WMI_CMD_GRP(WMI_GRP_TID_ADDBA),
748 WMI_PEER_TID_DELBA_CMDID,
749
750
751 WMI_STA_DTIM_PS_METHOD_CMDID,
752
753 WMI_STA_UAPSD_AUTO_TRIG_CMDID,
754
755
756
757 WMI_STA_KEEPALIVE_CMD,
758
759
760 WMI_ECHO_CMDID = WMI_CMD_GRP(WMI_GRP_MISC),
761 WMI_PDEV_UTF_CMDID,
762 WMI_DBGLOG_CFG_CMDID,
763 WMI_PDEV_QVIT_CMDID,
764 WMI_PDEV_FTM_INTG_CMDID,
765 WMI_VDEV_SET_KEEPALIVE_CMDID,
766 WMI_VDEV_GET_KEEPALIVE_CMDID,
767 WMI_FORCE_FW_HANG_CMDID,
768
769
770 WMI_GPIO_CONFIG_CMDID = WMI_CMD_GRP(WMI_GRP_GPIO),
771 WMI_GPIO_OUTPUT_CMDID,
772};
773
774enum wmi_event_id {
775 WMI_SERVICE_READY_EVENTID = 0x1,
776 WMI_READY_EVENTID,
777
778
779 WMI_SCAN_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_SCAN),
780
781
782 WMI_PDEV_TPC_CONFIG_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PDEV),
783 WMI_CHAN_INFO_EVENTID,
784 WMI_PHYERR_EVENTID,
785
786
787 WMI_VDEV_START_RESP_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_VDEV),
788 WMI_VDEV_STOPPED_EVENTID,
789 WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID,
790
791
792 WMI_PEER_STA_KICKOUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_PEER),
793
794
795 WMI_MGMT_RX_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MGMT),
796 WMI_HOST_SWBA_EVENTID,
797 WMI_TBTTOFFSET_UPDATE_EVENTID,
798
799
800 WMI_TX_DELBA_COMPLETE_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_BA_NEG),
801 WMI_TX_ADDBA_COMPLETE_EVENTID,
802
803
804 WMI_ROAM_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_ROAM),
805 WMI_PROFILE_MATCH,
806
807
808 WMI_WOW_WAKEUP_HOST_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_WOW),
809
810
811 WMI_RTT_MEASUREMENT_REPORT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_RTT),
812 WMI_TSF_MEASUREMENT_REPORT_EVENTID,
813 WMI_RTT_ERROR_REPORT_EVENTID,
814
815
816 WMI_GTK_OFFLOAD_STATUS_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GTK_OFL),
817 WMI_GTK_REKEY_FAIL_EVENTID,
818
819
820 WMI_CSA_HANDLING_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_CSA_OFL),
821
822
823 WMI_ECHO_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_MISC),
824 WMI_PDEV_UTF_EVENTID,
825 WMI_DEBUG_MESG_EVENTID,
826 WMI_UPDATE_STATS_EVENTID,
827 WMI_DEBUG_PRINT_EVENTID,
828 WMI_DCS_INTERFERENCE_EVENTID,
829 WMI_PDEV_QVIT_EVENTID,
830 WMI_WLAN_PROFILE_DATA_EVENTID,
831 WMI_PDEV_FTM_INTG_EVENTID,
832 WMI_WLAN_FREQ_AVOID_EVENTID,
833 WMI_VDEV_GET_KEEPALIVE_EVENTID,
834
835
836 WMI_GPIO_INPUT_EVENTID = WMI_EVT_GRP_START_ID(WMI_GRP_GPIO),
837};
838
839
840enum wmi_10x_cmd_id {
841 WMI_10X_START_CMDID = 0x9000,
842 WMI_10X_END_CMDID = 0x9FFF,
843
844
845 WMI_10X_INIT_CMDID,
846
847
848
849 WMI_10X_START_SCAN_CMDID = WMI_10X_START_CMDID,
850 WMI_10X_STOP_SCAN_CMDID,
851 WMI_10X_SCAN_CHAN_LIST_CMDID,
852 WMI_10X_ECHO_CMDID,
853
854
855 WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
856 WMI_10X_PDEV_SET_CHANNEL_CMDID,
857 WMI_10X_PDEV_SET_PARAM_CMDID,
858 WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
859 WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
860 WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
861 WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
862 WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
863 WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
864 WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
865 WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
866 WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
867 WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
868
869
870 WMI_10X_VDEV_CREATE_CMDID,
871 WMI_10X_VDEV_DELETE_CMDID,
872 WMI_10X_VDEV_START_REQUEST_CMDID,
873 WMI_10X_VDEV_RESTART_REQUEST_CMDID,
874 WMI_10X_VDEV_UP_CMDID,
875 WMI_10X_VDEV_STOP_CMDID,
876 WMI_10X_VDEV_DOWN_CMDID,
877 WMI_10X_VDEV_STANDBY_RESPONSE_CMDID,
878 WMI_10X_VDEV_RESUME_RESPONSE_CMDID,
879 WMI_10X_VDEV_SET_PARAM_CMDID,
880 WMI_10X_VDEV_INSTALL_KEY_CMDID,
881
882
883 WMI_10X_PEER_CREATE_CMDID,
884 WMI_10X_PEER_DELETE_CMDID,
885 WMI_10X_PEER_FLUSH_TIDS_CMDID,
886 WMI_10X_PEER_SET_PARAM_CMDID,
887 WMI_10X_PEER_ASSOC_CMDID,
888 WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
889 WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
890 WMI_10X_PEER_MCAST_GROUP_CMDID,
891
892
893
894 WMI_10X_BCN_TX_CMDID,
895 WMI_10X_BCN_PRB_TMPL_CMDID,
896 WMI_10X_BCN_FILTER_RX_CMDID,
897 WMI_10X_PRB_REQ_FILTER_RX_CMDID,
898 WMI_10X_MGMT_TX_CMDID,
899
900
901 WMI_10X_ADDBA_CLEAR_RESP_CMDID,
902 WMI_10X_ADDBA_SEND_CMDID,
903 WMI_10X_ADDBA_STATUS_CMDID,
904 WMI_10X_DELBA_SEND_CMDID,
905 WMI_10X_ADDBA_SET_RESP_CMDID,
906 WMI_10X_SEND_SINGLEAMSDU_CMDID,
907
908
909 WMI_10X_STA_POWERSAVE_MODE_CMDID,
910 WMI_10X_STA_POWERSAVE_PARAM_CMDID,
911 WMI_10X_STA_MIMO_PS_MODE_CMDID,
912
913
914 WMI_10X_DBGLOG_CFG_CMDID,
915
916
917 WMI_10X_PDEV_DFS_ENABLE_CMDID,
918 WMI_10X_PDEV_DFS_DISABLE_CMDID,
919
920
921 WMI_10X_PDEV_QVIT_CMDID,
922
923
924 WMI_10X_ROAM_SCAN_MODE,
925 WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
926 WMI_10X_ROAM_SCAN_PERIOD,
927 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
928 WMI_10X_ROAM_AP_PROFILE,
929 WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
930 WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
931 WMI_10X_OFL_SCAN_PERIOD,
932
933
934 WMI_10X_P2P_DEV_SET_DEVICE_INFO,
935 WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
936 WMI_10X_P2P_GO_SET_BEACON_IE,
937 WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
938
939
940 WMI_10X_AP_PS_PEER_PARAM_CMDID,
941 WMI_10X_AP_PS_PEER_UAPSD_COEX_CMDID,
942
943
944 WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
945
946
947 WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
948 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
949 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
950 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
951 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
952
953
954 WMI_10X_PDEV_SUSPEND_CMDID,
955 WMI_10X_PDEV_RESUME_CMDID,
956
957
958 WMI_10X_ADD_BCN_FILTER_CMDID,
959 WMI_10X_RMV_BCN_FILTER_CMDID,
960
961
962 WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
963 WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
964 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
965 WMI_10X_WOW_ENABLE_CMDID,
966 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
967
968
969 WMI_10X_RTT_MEASREQ_CMDID,
970 WMI_10X_RTT_TSF_CMDID,
971
972
973 WMI_10X_PDEV_SEND_BCN_CMDID,
974
975
976 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
977 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
978 WMI_10X_REQUEST_STATS_CMDID,
979
980
981 WMI_10X_GPIO_CONFIG_CMDID,
982 WMI_10X_GPIO_OUTPUT_CMDID,
983
984 WMI_10X_PDEV_UTF_CMDID = WMI_10X_END_CMDID - 1,
985};
986
987enum wmi_10x_event_id {
988 WMI_10X_SERVICE_READY_EVENTID = 0x8000,
989 WMI_10X_READY_EVENTID,
990 WMI_10X_START_EVENTID = 0x9000,
991 WMI_10X_END_EVENTID = 0x9FFF,
992
993
994 WMI_10X_SCAN_EVENTID = WMI_10X_START_EVENTID,
995 WMI_10X_ECHO_EVENTID,
996 WMI_10X_DEBUG_MESG_EVENTID,
997 WMI_10X_UPDATE_STATS_EVENTID,
998
999
1000 WMI_10X_INST_RSSI_STATS_EVENTID,
1001
1002
1003 WMI_10X_VDEV_START_RESP_EVENTID,
1004 WMI_10X_VDEV_STANDBY_REQ_EVENTID,
1005 WMI_10X_VDEV_RESUME_REQ_EVENTID,
1006 WMI_10X_VDEV_STOPPED_EVENTID,
1007
1008
1009 WMI_10X_PEER_STA_KICKOUT_EVENTID,
1010
1011
1012 WMI_10X_HOST_SWBA_EVENTID,
1013 WMI_10X_TBTTOFFSET_UPDATE_EVENTID,
1014 WMI_10X_MGMT_RX_EVENTID,
1015
1016
1017 WMI_10X_CHAN_INFO_EVENTID,
1018
1019
1020 WMI_10X_PHYERR_EVENTID,
1021
1022
1023 WMI_10X_ROAM_EVENTID,
1024
1025
1026 WMI_10X_PROFILE_MATCH,
1027
1028
1029 WMI_10X_DEBUG_PRINT_EVENTID,
1030
1031 WMI_10X_PDEV_QVIT_EVENTID,
1032
1033 WMI_10X_WLAN_PROFILE_DATA_EVENTID,
1034
1035
1036 WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID,
1037 WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID,
1038 WMI_10X_RTT_ERROR_REPORT_EVENTID,
1039
1040 WMI_10X_WOW_WAKEUP_HOST_EVENTID,
1041 WMI_10X_DCS_INTERFERENCE_EVENTID,
1042
1043
1044 WMI_10X_PDEV_TPC_CONFIG_EVENTID,
1045
1046 WMI_10X_GPIO_INPUT_EVENTID,
1047 WMI_10X_PDEV_UTF_EVENTID = WMI_10X_END_EVENTID-1,
1048};
1049
1050enum wmi_10_2_cmd_id {
1051 WMI_10_2_START_CMDID = 0x9000,
1052 WMI_10_2_END_CMDID = 0x9FFF,
1053 WMI_10_2_INIT_CMDID,
1054 WMI_10_2_START_SCAN_CMDID = WMI_10_2_START_CMDID,
1055 WMI_10_2_STOP_SCAN_CMDID,
1056 WMI_10_2_SCAN_CHAN_LIST_CMDID,
1057 WMI_10_2_ECHO_CMDID,
1058 WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1059 WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1060 WMI_10_2_PDEV_SET_PARAM_CMDID,
1061 WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1062 WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1063 WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1064 WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1065 WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1066 WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1067 WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1068 WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1069 WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1070 WMI_10_2_VDEV_CREATE_CMDID,
1071 WMI_10_2_VDEV_DELETE_CMDID,
1072 WMI_10_2_VDEV_START_REQUEST_CMDID,
1073 WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1074 WMI_10_2_VDEV_UP_CMDID,
1075 WMI_10_2_VDEV_STOP_CMDID,
1076 WMI_10_2_VDEV_DOWN_CMDID,
1077 WMI_10_2_VDEV_STANDBY_RESPONSE_CMDID,
1078 WMI_10_2_VDEV_RESUME_RESPONSE_CMDID,
1079 WMI_10_2_VDEV_SET_PARAM_CMDID,
1080 WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1081 WMI_10_2_VDEV_SET_DSCP_TID_MAP_CMDID,
1082 WMI_10_2_PEER_CREATE_CMDID,
1083 WMI_10_2_PEER_DELETE_CMDID,
1084 WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1085 WMI_10_2_PEER_SET_PARAM_CMDID,
1086 WMI_10_2_PEER_ASSOC_CMDID,
1087 WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1088 WMI_10_2_PEER_UPDATE_WDS_ENTRY_CMDID,
1089 WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1090 WMI_10_2_PEER_MCAST_GROUP_CMDID,
1091 WMI_10_2_BCN_TX_CMDID,
1092 WMI_10_2_BCN_PRB_TMPL_CMDID,
1093 WMI_10_2_BCN_FILTER_RX_CMDID,
1094 WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1095 WMI_10_2_MGMT_TX_CMDID,
1096 WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1097 WMI_10_2_ADDBA_SEND_CMDID,
1098 WMI_10_2_ADDBA_STATUS_CMDID,
1099 WMI_10_2_DELBA_SEND_CMDID,
1100 WMI_10_2_ADDBA_SET_RESP_CMDID,
1101 WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1102 WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1103 WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1104 WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1105 WMI_10_2_DBGLOG_CFG_CMDID,
1106 WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1107 WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1108 WMI_10_2_PDEV_QVIT_CMDID,
1109 WMI_10_2_ROAM_SCAN_MODE,
1110 WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1111 WMI_10_2_ROAM_SCAN_PERIOD,
1112 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1113 WMI_10_2_ROAM_AP_PROFILE,
1114 WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1115 WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1116 WMI_10_2_OFL_SCAN_PERIOD,
1117 WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1118 WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1119 WMI_10_2_P2P_GO_SET_BEACON_IE,
1120 WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1121 WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1122 WMI_10_2_AP_PS_PEER_UAPSD_COEX_CMDID,
1123 WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1124 WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1125 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1126 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1127 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1128 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1129 WMI_10_2_PDEV_SUSPEND_CMDID,
1130 WMI_10_2_PDEV_RESUME_CMDID,
1131 WMI_10_2_ADD_BCN_FILTER_CMDID,
1132 WMI_10_2_RMV_BCN_FILTER_CMDID,
1133 WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1134 WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1135 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1136 WMI_10_2_WOW_ENABLE_CMDID,
1137 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1138 WMI_10_2_RTT_MEASREQ_CMDID,
1139 WMI_10_2_RTT_TSF_CMDID,
1140 WMI_10_2_RTT_KEEPALIVE_CMDID,
1141 WMI_10_2_PDEV_SEND_BCN_CMDID,
1142 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1143 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1144 WMI_10_2_REQUEST_STATS_CMDID,
1145 WMI_10_2_GPIO_CONFIG_CMDID,
1146 WMI_10_2_GPIO_OUTPUT_CMDID,
1147 WMI_10_2_VDEV_RATEMASK_CMDID,
1148 WMI_10_2_PDEV_SMART_ANT_ENABLE_CMDID,
1149 WMI_10_2_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
1150 WMI_10_2_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
1151 WMI_10_2_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
1152 WMI_10_2_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
1153 WMI_10_2_FORCE_FW_HANG_CMDID,
1154 WMI_10_2_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
1155 WMI_10_2_PDEV_SET_CTL_TABLE_CMDID,
1156 WMI_10_2_PDEV_SET_MIMOGAIN_TABLE_CMDID,
1157 WMI_10_2_PDEV_RATEPWR_TABLE_CMDID,
1158 WMI_10_2_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
1159 WMI_10_2_PDEV_GET_INFO,
1160 WMI_10_2_VDEV_GET_INFO,
1161 WMI_10_2_VDEV_ATF_REQUEST_CMDID,
1162 WMI_10_2_PEER_ATF_REQUEST_CMDID,
1163 WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
1164 WMI_10_2_PDEV_UTF_CMDID = WMI_10_2_END_CMDID - 1,
1165};
1166
1167enum wmi_10_2_event_id {
1168 WMI_10_2_SERVICE_READY_EVENTID = 0x8000,
1169 WMI_10_2_READY_EVENTID,
1170 WMI_10_2_DEBUG_MESG_EVENTID,
1171 WMI_10_2_START_EVENTID = 0x9000,
1172 WMI_10_2_END_EVENTID = 0x9FFF,
1173 WMI_10_2_SCAN_EVENTID = WMI_10_2_START_EVENTID,
1174 WMI_10_2_ECHO_EVENTID,
1175 WMI_10_2_UPDATE_STATS_EVENTID,
1176 WMI_10_2_INST_RSSI_STATS_EVENTID,
1177 WMI_10_2_VDEV_START_RESP_EVENTID,
1178 WMI_10_2_VDEV_STANDBY_REQ_EVENTID,
1179 WMI_10_2_VDEV_RESUME_REQ_EVENTID,
1180 WMI_10_2_VDEV_STOPPED_EVENTID,
1181 WMI_10_2_PEER_STA_KICKOUT_EVENTID,
1182 WMI_10_2_HOST_SWBA_EVENTID,
1183 WMI_10_2_TBTTOFFSET_UPDATE_EVENTID,
1184 WMI_10_2_MGMT_RX_EVENTID,
1185 WMI_10_2_CHAN_INFO_EVENTID,
1186 WMI_10_2_PHYERR_EVENTID,
1187 WMI_10_2_ROAM_EVENTID,
1188 WMI_10_2_PROFILE_MATCH,
1189 WMI_10_2_DEBUG_PRINT_EVENTID,
1190 WMI_10_2_PDEV_QVIT_EVENTID,
1191 WMI_10_2_WLAN_PROFILE_DATA_EVENTID,
1192 WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID,
1193 WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID,
1194 WMI_10_2_RTT_ERROR_REPORT_EVENTID,
1195 WMI_10_2_RTT_KEEPALIVE_EVENTID,
1196 WMI_10_2_WOW_WAKEUP_HOST_EVENTID,
1197 WMI_10_2_DCS_INTERFERENCE_EVENTID,
1198 WMI_10_2_PDEV_TPC_CONFIG_EVENTID,
1199 WMI_10_2_GPIO_INPUT_EVENTID,
1200 WMI_10_2_PEER_RATECODE_LIST_EVENTID,
1201 WMI_10_2_GENERIC_BUFFER_EVENTID,
1202 WMI_10_2_MCAST_BUF_RELEASE_EVENTID,
1203 WMI_10_2_MCAST_LIST_AGEOUT_EVENTID,
1204 WMI_10_2_WDS_PEER_EVENTID,
1205 WMI_10_2_PEER_STA_PS_STATECHG_EVENTID,
1206 WMI_10_2_PDEV_TEMPERATURE_EVENTID,
1207 WMI_10_2_PDEV_UTF_EVENTID = WMI_10_2_END_EVENTID - 1,
1208};
1209
1210enum wmi_phy_mode {
1211 MODE_11A = 0,
1212 MODE_11G = 1,
1213 MODE_11B = 2,
1214 MODE_11GONLY = 3,
1215 MODE_11NA_HT20 = 4,
1216 MODE_11NG_HT20 = 5,
1217 MODE_11NA_HT40 = 6,
1218 MODE_11NG_HT40 = 7,
1219 MODE_11AC_VHT20 = 8,
1220 MODE_11AC_VHT40 = 9,
1221 MODE_11AC_VHT80 = 10,
1222
1223 MODE_11AC_VHT20_2G = 11,
1224 MODE_11AC_VHT40_2G = 12,
1225 MODE_11AC_VHT80_2G = 13,
1226 MODE_UNKNOWN = 14,
1227 MODE_MAX = 14
1228};
1229
1230static inline const char *ath10k_wmi_phymode_str(enum wmi_phy_mode mode)
1231{
1232 switch (mode) {
1233 case MODE_11A:
1234 return "11a";
1235 case MODE_11G:
1236 return "11g";
1237 case MODE_11B:
1238 return "11b";
1239 case MODE_11GONLY:
1240 return "11gonly";
1241 case MODE_11NA_HT20:
1242 return "11na-ht20";
1243 case MODE_11NG_HT20:
1244 return "11ng-ht20";
1245 case MODE_11NA_HT40:
1246 return "11na-ht40";
1247 case MODE_11NG_HT40:
1248 return "11ng-ht40";
1249 case MODE_11AC_VHT20:
1250 return "11ac-vht20";
1251 case MODE_11AC_VHT40:
1252 return "11ac-vht40";
1253 case MODE_11AC_VHT80:
1254 return "11ac-vht80";
1255 case MODE_11AC_VHT20_2G:
1256 return "11ac-vht20-2g";
1257 case MODE_11AC_VHT40_2G:
1258 return "11ac-vht40-2g";
1259 case MODE_11AC_VHT80_2G:
1260 return "11ac-vht80-2g";
1261 case MODE_UNKNOWN:
1262
1263 break;
1264
1265
1266
1267 };
1268
1269 return "<unknown>";
1270}
1271
1272#define WMI_CHAN_LIST_TAG 0x1
1273#define WMI_SSID_LIST_TAG 0x2
1274#define WMI_BSSID_LIST_TAG 0x3
1275#define WMI_IE_TAG 0x4
1276
1277struct wmi_channel {
1278 __le32 mhz;
1279 __le32 band_center_freq1;
1280 __le32 band_center_freq2;
1281 union {
1282 __le32 flags;
1283 struct {
1284 u8 mode;
1285 } __packed;
1286 } __packed;
1287 union {
1288 __le32 reginfo0;
1289 struct {
1290
1291 u8 min_power;
1292 u8 max_power;
1293 u8 reg_power;
1294 u8 reg_classid;
1295 } __packed;
1296 } __packed;
1297 union {
1298 __le32 reginfo1;
1299 struct {
1300 u8 antenna_max;
1301 } __packed;
1302 } __packed;
1303} __packed;
1304
1305struct wmi_channel_arg {
1306 u32 freq;
1307 u32 band_center_freq1;
1308 bool passive;
1309 bool allow_ibss;
1310 bool allow_ht;
1311 bool allow_vht;
1312 bool ht40plus;
1313 bool chan_radar;
1314
1315 u32 min_power;
1316 u32 max_power;
1317 u32 max_reg_power;
1318 u32 max_antenna_gain;
1319 u32 reg_class_id;
1320 enum wmi_phy_mode mode;
1321};
1322
1323enum wmi_channel_change_cause {
1324 WMI_CHANNEL_CHANGE_CAUSE_NONE = 0,
1325 WMI_CHANNEL_CHANGE_CAUSE_CSA,
1326};
1327
1328#define WMI_CHAN_FLAG_HT40_PLUS (1 << 6)
1329#define WMI_CHAN_FLAG_PASSIVE (1 << 7)
1330#define WMI_CHAN_FLAG_ADHOC_ALLOWED (1 << 8)
1331#define WMI_CHAN_FLAG_AP_DISABLED (1 << 9)
1332#define WMI_CHAN_FLAG_DFS (1 << 10)
1333#define WMI_CHAN_FLAG_ALLOW_HT (1 << 11)
1334#define WMI_CHAN_FLAG_ALLOW_VHT (1 << 12)
1335
1336
1337#define WMI_CHANNEL_CHANGE_CAUSE_CSA (1 << 13)
1338
1339#define WMI_MAX_SPATIAL_STREAM 3
1340
1341
1342#define WMI_HT_CAP_ENABLED 0x0001
1343#define WMI_HT_CAP_HT20_SGI 0x0002
1344#define WMI_HT_CAP_DYNAMIC_SMPS 0x0004
1345#define WMI_HT_CAP_TX_STBC 0x0008
1346#define WMI_HT_CAP_TX_STBC_MASK_SHIFT 3
1347#define WMI_HT_CAP_RX_STBC 0x0030
1348#define WMI_HT_CAP_RX_STBC_MASK_SHIFT 4
1349#define WMI_HT_CAP_LDPC 0x0040
1350#define WMI_HT_CAP_L_SIG_TXOP_PROT 0x0080
1351#define WMI_HT_CAP_MPDU_DENSITY 0x0700
1352#define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT 8
1353#define WMI_HT_CAP_HT40_SGI 0x0800
1354
1355#define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED | \
1356 WMI_HT_CAP_HT20_SGI | \
1357 WMI_HT_CAP_HT40_SGI | \
1358 WMI_HT_CAP_TX_STBC | \
1359 WMI_HT_CAP_RX_STBC | \
1360 WMI_HT_CAP_LDPC)
1361
1362
1363
1364
1365
1366
1367
1368
1369#define WMI_VHT_CAP_MAX_MPDU_LEN_MASK 0x00000003
1370#define WMI_VHT_CAP_RX_LDPC 0x00000010
1371#define WMI_VHT_CAP_SGI_80MHZ 0x00000020
1372#define WMI_VHT_CAP_TX_STBC 0x00000080
1373#define WMI_VHT_CAP_RX_STBC_MASK 0x00000300
1374#define WMI_VHT_CAP_RX_STBC_MASK_SHIFT 8
1375#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP 0x03800000
1376#define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIFT 23
1377#define WMI_VHT_CAP_RX_FIXED_ANT 0x10000000
1378#define WMI_VHT_CAP_TX_FIXED_ANT 0x20000000
1379
1380
1381#define WMI_VHT_CAP_MAX_MPDU_LEN_3839 0x00000000
1382#define WMI_VHT_CAP_MAX_MPDU_LEN_7935 0x00000001
1383#define WMI_VHT_CAP_MAX_MPDU_LEN_11454 0x00000002
1384
1385#define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454 | \
1386 WMI_VHT_CAP_RX_LDPC | \
1387 WMI_VHT_CAP_SGI_80MHZ | \
1388 WMI_VHT_CAP_TX_STBC | \
1389 WMI_VHT_CAP_RX_STBC_MASK | \
1390 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP | \
1391 WMI_VHT_CAP_RX_FIXED_ANT | \
1392 WMI_VHT_CAP_TX_FIXED_ANT)
1393
1394
1395
1396
1397
1398#define WMI_VHT_MAX_MCS_4_SS_MASK(r, ss) ((3 & (r)) << (((ss) - 1) << 1))
1399#define WMI_VHT_MAX_SUPP_RATE_MASK 0x1fff0000
1400#define WMI_VHT_MAX_SUPP_RATE_MASK_SHIFT 16
1401
1402enum {
1403 REGDMN_MODE_11A = 0x00001,
1404 REGDMN_MODE_TURBO = 0x00002,
1405 REGDMN_MODE_11B = 0x00004,
1406 REGDMN_MODE_PUREG = 0x00008,
1407 REGDMN_MODE_11G = 0x00008,
1408 REGDMN_MODE_108G = 0x00020,
1409 REGDMN_MODE_108A = 0x00040,
1410 REGDMN_MODE_XR = 0x00100,
1411 REGDMN_MODE_11A_HALF_RATE = 0x00200,
1412 REGDMN_MODE_11A_QUARTER_RATE = 0x00400,
1413 REGDMN_MODE_11NG_HT20 = 0x00800,
1414 REGDMN_MODE_11NA_HT20 = 0x01000,
1415 REGDMN_MODE_11NG_HT40PLUS = 0x02000,
1416 REGDMN_MODE_11NG_HT40MINUS = 0x04000,
1417 REGDMN_MODE_11NA_HT40PLUS = 0x08000,
1418 REGDMN_MODE_11NA_HT40MINUS = 0x10000,
1419 REGDMN_MODE_11AC_VHT20 = 0x20000,
1420 REGDMN_MODE_11AC_VHT40PLUS = 0x40000,
1421 REGDMN_MODE_11AC_VHT40MINUS = 0x80000,
1422 REGDMN_MODE_11AC_VHT80 = 0x100000,
1423 REGDMN_MODE_ALL = 0xffffffff
1424};
1425
1426#define REGDMN_CAP1_CHAN_HALF_RATE 0x00000001
1427#define REGDMN_CAP1_CHAN_QUARTER_RATE 0x00000002
1428#define REGDMN_CAP1_CHAN_HAL49GHZ 0x00000004
1429
1430
1431#define REGDMN_EEPROM_EEREGCAP_EN_FCC_MIDBAND 0x0040
1432#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_EVEN 0x0080
1433#define REGDMN_EEPROM_EEREGCAP_EN_KK_U2 0x0100
1434#define REGDMN_EEPROM_EEREGCAP_EN_KK_MIDBAND 0x0200
1435#define REGDMN_EEPROM_EEREGCAP_EN_KK_U1_ODD 0x0400
1436#define REGDMN_EEPROM_EEREGCAP_EN_KK_NEW_11A 0x0800
1437
1438struct hal_reg_capabilities {
1439
1440 __le32 eeprom_rd;
1441
1442 __le32 eeprom_rd_ext;
1443
1444 __le32 regcap1;
1445
1446 __le32 regcap2;
1447
1448 __le32 wireless_modes;
1449 __le32 low_2ghz_chan;
1450 __le32 high_2ghz_chan;
1451 __le32 low_5ghz_chan;
1452 __le32 high_5ghz_chan;
1453} __packed;
1454
1455enum wlan_mode_capability {
1456 WHAL_WLAN_11A_CAPABILITY = 0x1,
1457 WHAL_WLAN_11G_CAPABILITY = 0x2,
1458 WHAL_WLAN_11AG_CAPABILITY = 0x3,
1459};
1460
1461
1462struct wlan_host_mem_req {
1463
1464 __le32 req_id;
1465
1466 __le32 unit_size;
1467
1468
1469
1470
1471 __le32 num_unit_info;
1472
1473
1474
1475
1476
1477
1478
1479 __le32 num_units;
1480} __packed;
1481
1482
1483
1484
1485
1486
1487struct wmi_service_ready_event {
1488 __le32 sw_version;
1489 __le32 sw_version_1;
1490 __le32 abi_version;
1491
1492 __le32 phy_capability;
1493
1494 __le32 max_frag_entry;
1495 __le32 wmi_service_bitmap[16];
1496 __le32 num_rf_chains;
1497
1498
1499
1500
1501 __le32 ht_cap_info;
1502 __le32 vht_cap_info;
1503 __le32 vht_supp_mcs;
1504 __le32 hw_min_tx_power;
1505 __le32 hw_max_tx_power;
1506 struct hal_reg_capabilities hal_reg_capabilities;
1507 __le32 sys_cap_info;
1508 __le32 min_pkt_size_enable;
1509
1510
1511
1512
1513 __le32 max_bcn_ie_size;
1514
1515
1516
1517
1518
1519
1520 __le32 num_mem_reqs;
1521 struct wlan_host_mem_req mem_reqs[0];
1522} __packed;
1523
1524
1525struct wmi_10x_service_ready_event {
1526 __le32 sw_version;
1527 __le32 abi_version;
1528
1529
1530 __le32 phy_capability;
1531
1532
1533 __le32 max_frag_entry;
1534 __le32 wmi_service_bitmap[16];
1535 __le32 num_rf_chains;
1536
1537
1538
1539
1540
1541 __le32 ht_cap_info;
1542 __le32 vht_cap_info;
1543 __le32 vht_supp_mcs;
1544 __le32 hw_min_tx_power;
1545 __le32 hw_max_tx_power;
1546
1547 struct hal_reg_capabilities hal_reg_capabilities;
1548
1549 __le32 sys_cap_info;
1550 __le32 min_pkt_size_enable;
1551
1552
1553
1554
1555
1556
1557
1558 __le32 num_mem_reqs;
1559
1560 struct wlan_host_mem_req mem_reqs[0];
1561} __packed;
1562
1563#define WMI_SERVICE_READY_TIMEOUT_HZ (5*HZ)
1564#define WMI_UNIFIED_READY_TIMEOUT_HZ (5*HZ)
1565
1566struct wmi_ready_event {
1567 __le32 sw_version;
1568 __le32 abi_version;
1569 struct wmi_mac_addr mac_addr;
1570 __le32 status;
1571} __packed;
1572
1573struct wmi_resource_config {
1574
1575 __le32 num_vdevs;
1576
1577
1578 __le32 num_peers;
1579
1580
1581
1582
1583
1584
1585
1586
1587 __le32 num_offload_peers;
1588
1589
1590 __le32 num_offload_reorder_bufs;
1591
1592
1593 __le32 num_peer_keys;
1594
1595
1596 __le32 num_tids;
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608 __le32 ast_skid_limit;
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618 __le32 tx_chain_mask;
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630 __le32 rx_chain_mask;
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642 __le32 rx_timeout_pri_vi;
1643 __le32 rx_timeout_pri_vo;
1644 __le32 rx_timeout_pri_be;
1645 __le32 rx_timeout_pri_bk;
1646
1647
1648
1649
1650
1651
1652
1653
1654 __le32 rx_decap_mode;
1655
1656
1657 __le32 scan_max_pending_reqs;
1658
1659
1660 __le32 bmiss_offload_max_vdev;
1661
1662
1663 __le32 roam_offload_max_vdev;
1664
1665
1666 __le32 roam_offload_max_ap_profiles;
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680 __le32 num_mcast_groups;
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691 __le32 num_mcast_table_elems;
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711 __le32 mcast2ucast_mode;
1712
1713
1714
1715
1716
1717
1718
1719
1720 __le32 tx_dbg_log_size;
1721
1722
1723 __le32 num_wds_entries;
1724
1725
1726
1727
1728
1729 __le32 dma_burst_size;
1730
1731
1732
1733
1734
1735 __le32 mac_aggr_delim;
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746 __le32 rx_skip_defrag_timeout_dup_detection_check;
1747
1748
1749
1750
1751
1752
1753 __le32 vow_config;
1754
1755
1756 __le32 gtk_offload_max_vdev;
1757
1758
1759 __le32 num_msdu_desc;
1760
1761
1762
1763
1764
1765
1766
1767 __le32 max_frag_entries;
1768} __packed;
1769
1770struct wmi_resource_config_10x {
1771
1772 __le32 num_vdevs;
1773
1774
1775 __le32 num_peers;
1776
1777
1778 __le32 num_peer_keys;
1779
1780
1781 __le32 num_tids;
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793 __le32 ast_skid_limit;
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803 __le32 tx_chain_mask;
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815 __le32 rx_chain_mask;
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827 __le32 rx_timeout_pri_vi;
1828 __le32 rx_timeout_pri_vo;
1829 __le32 rx_timeout_pri_be;
1830 __le32 rx_timeout_pri_bk;
1831
1832
1833
1834
1835
1836
1837
1838
1839 __le32 rx_decap_mode;
1840
1841
1842 __le32 scan_max_pending_reqs;
1843
1844
1845 __le32 bmiss_offload_max_vdev;
1846
1847
1848 __le32 roam_offload_max_vdev;
1849
1850
1851 __le32 roam_offload_max_ap_profiles;
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865 __le32 num_mcast_groups;
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876 __le32 num_mcast_table_elems;
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896 __le32 mcast2ucast_mode;
1897
1898
1899
1900
1901
1902
1903
1904
1905 __le32 tx_dbg_log_size;
1906
1907
1908 __le32 num_wds_entries;
1909
1910
1911
1912
1913
1914 __le32 dma_burst_size;
1915
1916
1917
1918
1919
1920 __le32 mac_aggr_delim;
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931 __le32 rx_skip_defrag_timeout_dup_detection_check;
1932
1933
1934
1935
1936
1937
1938 __le32 vow_config;
1939
1940
1941 __le32 num_msdu_desc;
1942
1943
1944
1945
1946
1947
1948
1949 __le32 max_frag_entries;
1950} __packed;
1951
1952enum wmi_10_2_feature_mask {
1953 WMI_10_2_RX_BATCH_MODE = BIT(0),
1954 WMI_10_2_ATF_CONFIG = BIT(1),
1955};
1956
1957struct wmi_resource_config_10_2 {
1958 struct wmi_resource_config_10x common;
1959 __le32 max_peer_ext_stats;
1960 __le32 smart_ant_cap;
1961 __le32 bk_min_free;
1962 __le32 be_min_free;
1963 __le32 vi_min_free;
1964 __le32 vo_min_free;
1965 __le32 feature_mask;
1966} __packed;
1967
1968#define NUM_UNITS_IS_NUM_VDEVS 0x1
1969#define NUM_UNITS_IS_NUM_PEERS 0x2
1970
1971
1972struct host_memory_chunk {
1973
1974 __le32 req_id;
1975
1976 __le32 ptr;
1977
1978 __le32 size;
1979} __packed;
1980
1981struct wmi_host_mem_chunks {
1982 __le32 count;
1983
1984 struct host_memory_chunk items[1];
1985} __packed;
1986
1987struct wmi_init_cmd {
1988 struct wmi_resource_config resource_config;
1989 struct wmi_host_mem_chunks mem_chunks;
1990} __packed;
1991
1992
1993struct wmi_init_cmd_10x {
1994 struct wmi_resource_config_10x resource_config;
1995 struct wmi_host_mem_chunks mem_chunks;
1996} __packed;
1997
1998struct wmi_init_cmd_10_2 {
1999 struct wmi_resource_config_10_2 resource_config;
2000 struct wmi_host_mem_chunks mem_chunks;
2001} __packed;
2002
2003struct wmi_chan_list_entry {
2004 __le16 freq;
2005 u8 phy_mode;
2006 u8 reserved;
2007} __packed;
2008
2009
2010struct wmi_chan_list {
2011 __le32 tag;
2012 __le32 num_chan;
2013 struct wmi_chan_list_entry channel_list[0];
2014} __packed;
2015
2016struct wmi_bssid_list {
2017 __le32 tag;
2018 __le32 num_bssid;
2019 struct wmi_mac_addr bssid_list[0];
2020} __packed;
2021
2022struct wmi_ie_data {
2023 __le32 tag;
2024 __le32 ie_len;
2025 u8 ie_data[0];
2026} __packed;
2027
2028struct wmi_ssid {
2029 __le32 ssid_len;
2030 u8 ssid[32];
2031} __packed;
2032
2033struct wmi_ssid_list {
2034 __le32 tag;
2035 __le32 num_ssids;
2036 struct wmi_ssid ssids[0];
2037} __packed;
2038
2039
2040#define WMI_HOST_SCAN_REQUESTOR_ID_PREFIX 0xA000
2041
2042
2043
2044#define WMI_HOST_SCAN_REQ_ID_PREFIX 0xA000
2045
2046#define WLAN_SCAN_PARAMS_MAX_SSID 16
2047#define WLAN_SCAN_PARAMS_MAX_BSSID 4
2048#define WLAN_SCAN_PARAMS_MAX_IE_LEN 256
2049
2050
2051
2052
2053#define WMI_SCAN_CHAN_MIN_TIME_MSEC 40
2054
2055
2056enum wmi_scan_priority {
2057 WMI_SCAN_PRIORITY_VERY_LOW = 0,
2058 WMI_SCAN_PRIORITY_LOW,
2059 WMI_SCAN_PRIORITY_MEDIUM,
2060 WMI_SCAN_PRIORITY_HIGH,
2061 WMI_SCAN_PRIORITY_VERY_HIGH,
2062 WMI_SCAN_PRIORITY_COUNT
2063};
2064
2065struct wmi_start_scan_common {
2066
2067 __le32 scan_id;
2068
2069 __le32 scan_req_id;
2070
2071 __le32 vdev_id;
2072
2073 __le32 scan_priority;
2074
2075 __le32 notify_scan_events;
2076
2077 __le32 dwell_time_active;
2078
2079 __le32 dwell_time_passive;
2080
2081
2082
2083
2084 __le32 min_rest_time;
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098 __le32 max_rest_time;
2099
2100
2101
2102
2103
2104
2105
2106 __le32 repeat_probe_time;
2107
2108 __le32 probe_spacing_time;
2109
2110
2111
2112
2113 __le32 idle_time;
2114
2115 __le32 max_scan_time;
2116
2117
2118
2119
2120 __le32 probe_delay;
2121
2122 __le32 scan_ctrl_flags;
2123} __packed;
2124
2125struct wmi_start_scan_tlvs {
2126
2127
2128
2129 u8 tlvs[0];
2130} __packed;
2131
2132struct wmi_start_scan_cmd {
2133 struct wmi_start_scan_common common;
2134 __le32 burst_duration_ms;
2135 struct wmi_start_scan_tlvs tlvs;
2136} __packed;
2137
2138
2139struct wmi_10x_start_scan_cmd {
2140 struct wmi_start_scan_common common;
2141 struct wmi_start_scan_tlvs tlvs;
2142} __packed;
2143
2144struct wmi_ssid_arg {
2145 int len;
2146 const u8 *ssid;
2147};
2148
2149struct wmi_bssid_arg {
2150 const u8 *bssid;
2151};
2152
2153struct wmi_start_scan_arg {
2154 u32 scan_id;
2155 u32 scan_req_id;
2156 u32 vdev_id;
2157 u32 scan_priority;
2158 u32 notify_scan_events;
2159 u32 dwell_time_active;
2160 u32 dwell_time_passive;
2161 u32 min_rest_time;
2162 u32 max_rest_time;
2163 u32 repeat_probe_time;
2164 u32 probe_spacing_time;
2165 u32 idle_time;
2166 u32 max_scan_time;
2167 u32 probe_delay;
2168 u32 scan_ctrl_flags;
2169
2170 u32 ie_len;
2171 u32 n_channels;
2172 u32 n_ssids;
2173 u32 n_bssids;
2174
2175 u8 ie[WLAN_SCAN_PARAMS_MAX_IE_LEN];
2176 u16 channels[64];
2177 struct wmi_ssid_arg ssids[WLAN_SCAN_PARAMS_MAX_SSID];
2178 struct wmi_bssid_arg bssids[WLAN_SCAN_PARAMS_MAX_BSSID];
2179};
2180
2181
2182
2183
2184#define WMI_SCAN_FLAG_PASSIVE 0x1
2185
2186#define WMI_SCAN_ADD_BCAST_PROBE_REQ 0x2
2187
2188#define WMI_SCAN_ADD_CCK_RATES 0x4
2189
2190#define WMI_SCAN_ADD_OFDM_RATES 0x8
2191
2192#define WMI_SCAN_CHAN_STAT_EVENT 0x10
2193
2194#define WMI_SCAN_FILTER_PROBE_REQ 0x20
2195
2196#define WMI_SCAN_BYPASS_DFS_CHN 0x40
2197
2198
2199#define WMI_SCAN_CONTINUE_ON_ERROR 0x80
2200
2201
2202#define WMI_SCAN_CLASS_MASK 0xFF000000
2203
2204enum wmi_stop_scan_type {
2205 WMI_SCAN_STOP_ONE = 0x00000000,
2206 WMI_SCAN_STOP_VDEV_ALL = 0x01000000,
2207 WMI_SCAN_STOP_ALL = 0x04000000,
2208};
2209
2210struct wmi_stop_scan_cmd {
2211 __le32 scan_req_id;
2212 __le32 scan_id;
2213 __le32 req_type;
2214 __le32 vdev_id;
2215} __packed;
2216
2217struct wmi_stop_scan_arg {
2218 u32 req_id;
2219 enum wmi_stop_scan_type req_type;
2220 union {
2221 u32 scan_id;
2222 u32 vdev_id;
2223 } u;
2224};
2225
2226struct wmi_scan_chan_list_cmd {
2227 __le32 num_scan_chans;
2228 struct wmi_channel chan_info[0];
2229} __packed;
2230
2231struct wmi_scan_chan_list_arg {
2232 u32 n_channels;
2233 struct wmi_channel_arg *channels;
2234};
2235
2236enum wmi_bss_filter {
2237 WMI_BSS_FILTER_NONE = 0,
2238 WMI_BSS_FILTER_ALL,
2239 WMI_BSS_FILTER_PROFILE,
2240 WMI_BSS_FILTER_ALL_BUT_PROFILE,
2241 WMI_BSS_FILTER_CURRENT_BSS,
2242 WMI_BSS_FILTER_ALL_BUT_BSS,
2243 WMI_BSS_FILTER_PROBED_SSID,
2244 WMI_BSS_FILTER_LAST_BSS,
2245};
2246
2247enum wmi_scan_event_type {
2248 WMI_SCAN_EVENT_STARTED = 0x1,
2249 WMI_SCAN_EVENT_COMPLETED = 0x2,
2250 WMI_SCAN_EVENT_BSS_CHANNEL = 0x4,
2251 WMI_SCAN_EVENT_FOREIGN_CHANNEL = 0x8,
2252 WMI_SCAN_EVENT_DEQUEUED = 0x10,
2253 WMI_SCAN_EVENT_PREEMPTED = 0x20,
2254 WMI_SCAN_EVENT_START_FAILED = 0x40,
2255 WMI_SCAN_EVENT_RESTARTED = 0x80,
2256 WMI_SCAN_EVENT_MAX = 0x8000
2257};
2258
2259enum wmi_scan_completion_reason {
2260 WMI_SCAN_REASON_COMPLETED,
2261 WMI_SCAN_REASON_CANCELLED,
2262 WMI_SCAN_REASON_PREEMPTED,
2263 WMI_SCAN_REASON_TIMEDOUT,
2264 WMI_SCAN_REASON_MAX,
2265};
2266
2267struct wmi_scan_event {
2268 __le32 event_type;
2269 __le32 reason;
2270 __le32 channel_freq;
2271 __le32 scan_req_id;
2272 __le32 scan_id;
2273 __le32 vdev_id;
2274} __packed;
2275
2276
2277
2278
2279
2280
2281
2282
2283
2284#define WMI_MGMT_RX_HDR_HEADROOM 52
2285
2286
2287
2288
2289
2290
2291
2292
2293struct wmi_mgmt_rx_hdr_v1 {
2294 __le32 channel;
2295 __le32 snr;
2296 __le32 rate;
2297 __le32 phy_mode;
2298 __le32 buf_len;
2299 __le32 status;
2300} __packed;
2301
2302struct wmi_mgmt_rx_hdr_v2 {
2303 struct wmi_mgmt_rx_hdr_v1 v1;
2304 __le32 rssi_ctl[4];
2305} __packed;
2306
2307struct wmi_mgmt_rx_event_v1 {
2308 struct wmi_mgmt_rx_hdr_v1 hdr;
2309 u8 buf[0];
2310} __packed;
2311
2312struct wmi_mgmt_rx_event_v2 {
2313 struct wmi_mgmt_rx_hdr_v2 hdr;
2314 u8 buf[0];
2315} __packed;
2316
2317#define WMI_RX_STATUS_OK 0x00
2318#define WMI_RX_STATUS_ERR_CRC 0x01
2319#define WMI_RX_STATUS_ERR_DECRYPT 0x08
2320#define WMI_RX_STATUS_ERR_MIC 0x10
2321#define WMI_RX_STATUS_ERR_KEY_CACHE_MISS 0x20
2322
2323#define PHY_ERROR_SPECTRAL_SCAN 0x26
2324#define PHY_ERROR_FALSE_RADAR_EXT 0x24
2325#define PHY_ERROR_RADAR 0x05
2326
2327struct wmi_phyerr {
2328 __le32 tsf_timestamp;
2329 __le16 freq1;
2330 __le16 freq2;
2331 u8 rssi_combined;
2332 u8 chan_width_mhz;
2333 u8 phy_err_code;
2334 u8 rsvd0;
2335 __le32 rssi_chains[4];
2336 __le16 nf_chains[4];
2337 __le32 buf_len;
2338 u8 buf[0];
2339} __packed;
2340
2341struct wmi_phyerr_event {
2342 __le32 num_phyerrs;
2343 __le32 tsf_l32;
2344 __le32 tsf_u32;
2345 struct wmi_phyerr phyerrs[0];
2346} __packed;
2347
2348#define PHYERR_TLV_SIG 0xBB
2349#define PHYERR_TLV_TAG_SEARCH_FFT_REPORT 0xFB
2350#define PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY 0xF8
2351#define PHYERR_TLV_TAG_SPECTRAL_SUMMARY_REPORT 0xF9
2352
2353struct phyerr_radar_report {
2354 __le32 reg0;
2355 __le32 reg1;
2356} __packed;
2357
2358#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_MASK 0x80000000
2359#define RADAR_REPORT_REG0_PULSE_IS_CHIRP_LSB 31
2360
2361#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_MASK 0x40000000
2362#define RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH_LSB 30
2363
2364#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_MASK 0x3FF00000
2365#define RADAR_REPORT_REG0_AGC_TOTAL_GAIN_LSB 20
2366
2367#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_MASK 0x000F0000
2368#define RADAR_REPORT_REG0_PULSE_DELTA_DIFF_LSB 16
2369
2370#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_MASK 0x0000FC00
2371#define RADAR_REPORT_REG0_PULSE_DELTA_PEAK_LSB 10
2372
2373#define RADAR_REPORT_REG0_PULSE_SIDX_MASK 0x000003FF
2374#define RADAR_REPORT_REG0_PULSE_SIDX_LSB 0
2375
2376#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_MASK 0x80000000
2377#define RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID_LSB 31
2378
2379#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_MASK 0x7F000000
2380#define RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN_LSB 24
2381
2382#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_MASK 0x00FF0000
2383#define RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK_LSB 16
2384
2385#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_MASK 0x0000FF00
2386#define RADAR_REPORT_REG1_PULSE_TSF_OFFSET_LSB 8
2387
2388#define RADAR_REPORT_REG1_PULSE_DUR_MASK 0x000000FF
2389#define RADAR_REPORT_REG1_PULSE_DUR_LSB 0
2390
2391struct phyerr_fft_report {
2392 __le32 reg0;
2393 __le32 reg1;
2394} __packed;
2395
2396#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_MASK 0xFF800000
2397#define SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB_LSB 23
2398
2399#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_MASK 0x007FC000
2400#define SEARCH_FFT_REPORT_REG0_BASE_PWR_DB_LSB 14
2401
2402#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_MASK 0x00003000
2403#define SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX_LSB 12
2404
2405#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_MASK 0x00000FFF
2406#define SEARCH_FFT_REPORT_REG0_PEAK_SIDX_LSB 0
2407
2408#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_MASK 0xFC000000
2409#define SEARCH_FFT_REPORT_REG1_RELPWR_DB_LSB 26
2410
2411#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_MASK 0x03FC0000
2412#define SEARCH_FFT_REPORT_REG1_AVGPWR_DB_LSB 18
2413
2414#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_MASK 0x0003FF00
2415#define SEARCH_FFT_REPORT_REG1_PEAK_MAG_LSB 8
2416
2417#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_MASK 0x000000FF
2418#define SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB_LSB 0
2419
2420struct phyerr_tlv {
2421 __le16 len;
2422 u8 tag;
2423 u8 sig;
2424} __packed;
2425
2426#define DFS_RSSI_POSSIBLY_FALSE 50
2427#define DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE 40
2428
2429struct wmi_mgmt_tx_hdr {
2430 __le32 vdev_id;
2431 struct wmi_mac_addr peer_macaddr;
2432 __le32 tx_rate;
2433 __le32 tx_power;
2434 __le32 buf_len;
2435} __packed;
2436
2437struct wmi_mgmt_tx_cmd {
2438 struct wmi_mgmt_tx_hdr hdr;
2439 u8 buf[0];
2440} __packed;
2441
2442struct wmi_echo_event {
2443 __le32 value;
2444} __packed;
2445
2446struct wmi_echo_cmd {
2447 __le32 value;
2448} __packed;
2449
2450struct wmi_pdev_set_regdomain_cmd {
2451 __le32 reg_domain;
2452 __le32 reg_domain_2G;
2453 __le32 reg_domain_5G;
2454 __le32 conformance_test_limit_2G;
2455 __le32 conformance_test_limit_5G;
2456} __packed;
2457
2458enum wmi_dfs_region {
2459
2460 WMI_UNINIT_DFS_DOMAIN = 0,
2461
2462
2463 WMI_FCC_DFS_DOMAIN = 1,
2464
2465
2466 WMI_ETSI_DFS_DOMAIN = 2,
2467
2468
2469 WMI_MKK4_DFS_DOMAIN = 3,
2470};
2471
2472struct wmi_pdev_set_regdomain_cmd_10x {
2473 __le32 reg_domain;
2474 __le32 reg_domain_2G;
2475 __le32 reg_domain_5G;
2476 __le32 conformance_test_limit_2G;
2477 __le32 conformance_test_limit_5G;
2478
2479
2480 __le32 dfs_domain;
2481} __packed;
2482
2483
2484struct wmi_pdev_set_quiet_cmd {
2485
2486 __le32 period;
2487
2488
2489 __le32 duration;
2490
2491
2492 __le32 next_start;
2493
2494
2495 __le32 enabled;
2496} __packed;
2497
2498
2499
2500
2501enum ath10k_protmode {
2502 ATH10K_PROT_NONE = 0,
2503 ATH10K_PROT_CTSONLY = 1,
2504 ATH10K_PROT_RTSCTS = 2,
2505};
2506
2507enum wmi_rtscts_profile {
2508 WMI_RTSCTS_FOR_NO_RATESERIES = 0,
2509 WMI_RTSCTS_FOR_SECOND_RATESERIES,
2510 WMI_RTSCTS_ACROSS_SW_RETRIES
2511};
2512
2513#define WMI_RTSCTS_ENABLED 1
2514#define WMI_RTSCTS_SET_MASK 0x0f
2515#define WMI_RTSCTS_SET_LSB 0
2516
2517#define WMI_RTSCTS_PROFILE_MASK 0xf0
2518#define WMI_RTSCTS_PROFILE_LSB 4
2519
2520enum wmi_beacon_gen_mode {
2521 WMI_BEACON_STAGGERED_MODE = 0,
2522 WMI_BEACON_BURST_MODE = 1
2523};
2524
2525enum wmi_csa_event_ies_present_flag {
2526 WMI_CSA_IE_PRESENT = 0x00000001,
2527 WMI_XCSA_IE_PRESENT = 0x00000002,
2528 WMI_WBW_IE_PRESENT = 0x00000004,
2529 WMI_CSWARP_IE_PRESENT = 0x00000008,
2530};
2531
2532
2533struct wmi_csa_event {
2534 __le32 i_fc_dur;
2535
2536
2537 struct wmi_mac_addr i_addr1;
2538 struct wmi_mac_addr i_addr2;
2539 __le32 csa_ie[2];
2540 __le32 xcsa_ie[2];
2541 __le32 wb_ie[2];
2542 __le32 cswarp_ie;
2543 __le32 ies_present_flag;
2544} __packed;
2545
2546
2547#define PDEV_DEFAULT_STATS_UPDATE_PERIOD 500
2548#define VDEV_DEFAULT_STATS_UPDATE_PERIOD 500
2549#define PEER_DEFAULT_STATS_UPDATE_PERIOD 500
2550
2551struct wmi_pdev_param_map {
2552 u32 tx_chain_mask;
2553 u32 rx_chain_mask;
2554 u32 txpower_limit2g;
2555 u32 txpower_limit5g;
2556 u32 txpower_scale;
2557 u32 beacon_gen_mode;
2558 u32 beacon_tx_mode;
2559 u32 resmgr_offchan_mode;
2560 u32 protection_mode;
2561 u32 dynamic_bw;
2562 u32 non_agg_sw_retry_th;
2563 u32 agg_sw_retry_th;
2564 u32 sta_kickout_th;
2565 u32 ac_aggrsize_scaling;
2566 u32 ltr_enable;
2567 u32 ltr_ac_latency_be;
2568 u32 ltr_ac_latency_bk;
2569 u32 ltr_ac_latency_vi;
2570 u32 ltr_ac_latency_vo;
2571 u32 ltr_ac_latency_timeout;
2572 u32 ltr_sleep_override;
2573 u32 ltr_rx_override;
2574 u32 ltr_tx_activity_timeout;
2575 u32 l1ss_enable;
2576 u32 dsleep_enable;
2577 u32 pcielp_txbuf_flush;
2578 u32 pcielp_txbuf_watermark;
2579 u32 pcielp_txbuf_tmo_en;
2580 u32 pcielp_txbuf_tmo_value;
2581 u32 pdev_stats_update_period;
2582 u32 vdev_stats_update_period;
2583 u32 peer_stats_update_period;
2584 u32 bcnflt_stats_update_period;
2585 u32 pmf_qos;
2586 u32 arp_ac_override;
2587 u32 dcs;
2588 u32 ani_enable;
2589 u32 ani_poll_period;
2590 u32 ani_listen_period;
2591 u32 ani_ofdm_level;
2592 u32 ani_cck_level;
2593 u32 dyntxchain;
2594 u32 proxy_sta;
2595 u32 idle_ps_config;
2596 u32 power_gating_sleep;
2597 u32 fast_channel_reset;
2598 u32 burst_dur;
2599 u32 burst_enable;
2600 u32 cal_period;
2601};
2602
2603#define WMI_PDEV_PARAM_UNSUPPORTED 0
2604
2605enum wmi_pdev_param {
2606
2607 WMI_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
2608
2609 WMI_PDEV_PARAM_RX_CHAIN_MASK,
2610
2611 WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
2612
2613 WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
2614
2615 WMI_PDEV_PARAM_TXPOWER_SCALE,
2616
2617 WMI_PDEV_PARAM_BEACON_GEN_MODE,
2618
2619 WMI_PDEV_PARAM_BEACON_TX_MODE,
2620
2621
2622
2623
2624 WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
2625
2626
2627
2628
2629 WMI_PDEV_PARAM_PROTECTION_MODE,
2630
2631
2632
2633
2634
2635
2636 WMI_PDEV_PARAM_DYNAMIC_BW,
2637
2638 WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
2639
2640 WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
2641
2642 WMI_PDEV_PARAM_STA_KICKOUT_TH,
2643
2644 WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
2645
2646 WMI_PDEV_PARAM_LTR_ENABLE,
2647
2648 WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
2649
2650 WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
2651
2652 WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
2653
2654 WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
2655
2656 WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
2657
2658 WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
2659
2660 WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
2661
2662 WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
2663
2664 WMI_PDEV_PARAM_L1SS_ENABLE,
2665
2666 WMI_PDEV_PARAM_DSLEEP_ENABLE,
2667
2668 WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
2669
2670 WMI_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
2671
2672 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
2673
2674 WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
2675
2676 WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
2677
2678 WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
2679
2680 WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
2681
2682 WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
2683
2684 WMI_PDEV_PARAM_PMF_QOS,
2685
2686 WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
2687
2688 WMI_PDEV_PARAM_DCS,
2689
2690 WMI_PDEV_PARAM_ANI_ENABLE,
2691
2692 WMI_PDEV_PARAM_ANI_POLL_PERIOD,
2693
2694 WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
2695
2696 WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
2697
2698 WMI_PDEV_PARAM_ANI_CCK_LEVEL,
2699
2700 WMI_PDEV_PARAM_DYNTXCHAIN,
2701
2702 WMI_PDEV_PARAM_PROXY_STA,
2703
2704 WMI_PDEV_PARAM_IDLE_PS_CONFIG,
2705
2706 WMI_PDEV_PARAM_POWER_GATING_SLEEP,
2707};
2708
2709enum wmi_10x_pdev_param {
2710
2711 WMI_10X_PDEV_PARAM_TX_CHAIN_MASK = 0x1,
2712
2713 WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
2714
2715 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
2716
2717 WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
2718
2719 WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
2720
2721 WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
2722
2723 WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
2724
2725
2726
2727
2728 WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
2729
2730
2731
2732
2733 WMI_10X_PDEV_PARAM_PROTECTION_MODE,
2734
2735 WMI_10X_PDEV_PARAM_DYNAMIC_BW,
2736
2737 WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
2738
2739 WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
2740
2741 WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
2742
2743 WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
2744
2745 WMI_10X_PDEV_PARAM_LTR_ENABLE,
2746
2747 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
2748
2749 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
2750
2751 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
2752
2753 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
2754
2755 WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
2756
2757 WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
2758
2759 WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
2760
2761 WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
2762
2763 WMI_10X_PDEV_PARAM_L1SS_ENABLE,
2764
2765 WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
2766
2767 WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
2768
2769 WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
2770
2771 WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
2772
2773 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
2774
2775 WMI_10X_PDEV_PARAM_PMF_QOS,
2776
2777 WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
2778
2779 WMI_10X_PDEV_PARAM_DCS,
2780
2781 WMI_10X_PDEV_PARAM_ANI_ENABLE,
2782
2783 WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
2784
2785 WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
2786
2787 WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
2788
2789 WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
2790
2791 WMI_10X_PDEV_PARAM_DYNTXCHAIN,
2792
2793 WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
2794
2795 WMI_10X_PDEV_PARAM_BURST_DUR,
2796
2797 WMI_10X_PDEV_PARAM_BURST_ENABLE,
2798
2799
2800 WMI_10X_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
2801 WMI_10X_PDEV_PARAM_IGMPMLD_OVERRIDE,
2802 WMI_10X_PDEV_PARAM_IGMPMLD_TID,
2803 WMI_10X_PDEV_PARAM_ANTENNA_GAIN,
2804 WMI_10X_PDEV_PARAM_RX_DECAP_MODE,
2805 WMI_10X_PDEV_PARAM_RX_FILTER,
2806 WMI_10X_PDEV_PARAM_SET_MCAST_TO_UCAST_TID,
2807 WMI_10X_PDEV_PARAM_PROXY_STA_MODE,
2808 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_MODE,
2809 WMI_10X_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
2810 WMI_10X_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
2811 WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
2812 WMI_10X_PDEV_PARAM_RTS_FIXED_RATE,
2813 WMI_10X_PDEV_PARAM_CAL_PERIOD
2814};
2815
2816struct wmi_pdev_set_param_cmd {
2817 __le32 param_id;
2818 __le32 param_value;
2819} __packed;
2820
2821
2822#define WMI_PDEV_PARAM_CAL_PERIOD_MAX 60000
2823
2824struct wmi_pdev_get_tpc_config_cmd {
2825
2826 __le32 param;
2827} __packed;
2828
2829#define WMI_TPC_RATE_MAX 160
2830#define WMI_TPC_TX_N_CHAIN 4
2831
2832enum wmi_tpc_config_event_flag {
2833 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD = 0x1,
2834 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC = 0x2,
2835 WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF = 0x4,
2836};
2837
2838struct wmi_pdev_tpc_config_event {
2839 __le32 reg_domain;
2840 __le32 chan_freq;
2841 __le32 phy_mode;
2842 __le32 twice_antenna_reduction;
2843 __le32 twice_max_rd_power;
2844 s32 twice_antenna_gain;
2845 __le32 power_limit;
2846 __le32 rate_max;
2847 __le32 num_tx_chain;
2848 __le32 ctl;
2849 __le32 flags;
2850 s8 max_reg_allow_pow[WMI_TPC_TX_N_CHAIN];
2851 s8 max_reg_allow_pow_agcdd[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
2852 s8 max_reg_allow_pow_agstbc[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
2853 s8 max_reg_allow_pow_agtxbf[WMI_TPC_TX_N_CHAIN][WMI_TPC_TX_N_CHAIN];
2854 u8 rates_array[WMI_TPC_RATE_MAX];
2855} __packed;
2856
2857
2858enum wmi_tp_scale {
2859 WMI_TP_SCALE_MAX = 0,
2860 WMI_TP_SCALE_50 = 1,
2861 WMI_TP_SCALE_25 = 2,
2862 WMI_TP_SCALE_12 = 3,
2863 WMI_TP_SCALE_MIN = 4,
2864 WMI_TP_SCALE_SIZE = 5,
2865};
2866
2867struct wmi_pdev_chanlist_update_event {
2868
2869 __le32 num_chan;
2870
2871 struct wmi_channel channel_list[1];
2872} __packed;
2873
2874#define WMI_MAX_DEBUG_MESG (sizeof(u32) * 32)
2875
2876struct wmi_debug_mesg_event {
2877
2878 char bufp[WMI_MAX_DEBUG_MESG];
2879} __packed;
2880
2881enum {
2882
2883 VDEV_SUBTYPE_P2PDEV = 0,
2884
2885 VDEV_SUBTYPE_P2PCLI,
2886
2887 VDEV_SUBTYPE_P2PGO,
2888
2889 VDEV_SUBTYPE_BT,
2890};
2891
2892struct wmi_pdev_set_channel_cmd {
2893
2894 struct wmi_channel chan;
2895} __packed;
2896
2897struct wmi_pdev_pktlog_enable_cmd {
2898 __le32 ev_bitmap;
2899} __packed;
2900
2901
2902#define WMI_DSCP_MAP_MAX (64)
2903struct wmi_pdev_set_dscp_tid_map_cmd {
2904
2905 __le32 dscp_to_tid_map[WMI_DSCP_MAP_MAX];
2906} __packed;
2907
2908enum mcast_bcast_rate_id {
2909 WMI_SET_MCAST_RATE,
2910 WMI_SET_BCAST_RATE
2911};
2912
2913struct mcast_bcast_rate {
2914 enum mcast_bcast_rate_id rate_id;
2915 __le32 rate;
2916} __packed;
2917
2918struct wmi_wmm_params {
2919 __le32 cwmin;
2920 __le32 cwmax;
2921 __le32 aifs;
2922 __le32 txop;
2923 __le32 acm;
2924 __le32 no_ack;
2925} __packed;
2926
2927struct wmi_pdev_set_wmm_params {
2928 struct wmi_wmm_params ac_be;
2929 struct wmi_wmm_params ac_bk;
2930 struct wmi_wmm_params ac_vi;
2931 struct wmi_wmm_params ac_vo;
2932} __packed;
2933
2934struct wmi_wmm_params_arg {
2935 u32 cwmin;
2936 u32 cwmax;
2937 u32 aifs;
2938 u32 txop;
2939 u32 acm;
2940 u32 no_ack;
2941};
2942
2943struct wmi_wmm_params_all_arg {
2944 struct wmi_wmm_params_arg ac_be;
2945 struct wmi_wmm_params_arg ac_bk;
2946 struct wmi_wmm_params_arg ac_vi;
2947 struct wmi_wmm_params_arg ac_vo;
2948};
2949
2950struct wmi_pdev_stats_tx {
2951
2952 __le32 comp_queued;
2953
2954
2955 __le32 comp_delivered;
2956
2957
2958 __le32 msdu_enqued;
2959
2960
2961 __le32 mpdu_enqued;
2962
2963
2964 __le32 wmm_drop;
2965
2966
2967 __le32 local_enqued;
2968
2969
2970 __le32 local_freed;
2971
2972
2973 __le32 hw_queued;
2974
2975
2976 __le32 hw_reaped;
2977
2978
2979 __le32 underrun;
2980
2981
2982 __le32 tx_abort;
2983
2984
2985 __le32 mpdus_requed;
2986
2987
2988 __le32 tx_ko;
2989
2990
2991 __le32 data_rc;
2992
2993
2994 __le32 self_triggers;
2995
2996
2997 __le32 sw_retry_failure;
2998
2999
3000 __le32 illgl_rate_phy_err;
3001
3002
3003 __le32 pdev_cont_xretry;
3004
3005
3006 __le32 pdev_tx_timeout;
3007
3008
3009 __le32 pdev_resets;
3010
3011
3012 __le32 stateless_tid_alloc_failure;
3013
3014 __le32 phy_underrun;
3015
3016
3017 __le32 txop_ovf;
3018} __packed;
3019
3020struct wmi_pdev_stats_rx {
3021
3022 __le32 mid_ppdu_route_change;
3023
3024
3025 __le32 status_rcvd;
3026
3027
3028 __le32 r0_frags;
3029 __le32 r1_frags;
3030 __le32 r2_frags;
3031 __le32 r3_frags;
3032
3033
3034 __le32 htt_msdus;
3035 __le32 htt_mpdus;
3036
3037
3038 __le32 loc_msdus;
3039 __le32 loc_mpdus;
3040
3041
3042 __le32 oversize_amsdu;
3043
3044
3045 __le32 phy_errs;
3046
3047
3048 __le32 phy_err_drop;
3049
3050
3051 __le32 mpdu_errs;
3052} __packed;
3053
3054struct wmi_pdev_stats_peer {
3055
3056 __le32 dummy;
3057} __packed;
3058
3059enum wmi_stats_id {
3060 WMI_REQUEST_PEER_STAT = 0x01,
3061 WMI_REQUEST_AP_STAT = 0x02
3062};
3063
3064struct wlan_inst_rssi_args {
3065 __le16 cfg_retry_count;
3066 __le16 retry_count;
3067};
3068
3069struct wmi_request_stats_cmd {
3070 __le32 stats_id;
3071
3072 __le32 vdev_id;
3073
3074
3075 struct wmi_mac_addr peer_macaddr;
3076
3077
3078 struct wlan_inst_rssi_args inst_rssi_args;
3079} __packed;
3080
3081
3082enum {
3083
3084 WMI_PDEV_SUSPEND,
3085
3086
3087 WMI_PDEV_SUSPEND_AND_DISABLE_INTR,
3088};
3089
3090struct wmi_pdev_suspend_cmd {
3091
3092 __le32 suspend_opt;
3093} __packed;
3094
3095struct wmi_stats_event {
3096 __le32 stats_id;
3097
3098
3099
3100
3101 __le32 num_pdev_stats;
3102
3103
3104
3105
3106 __le32 num_vdev_stats;
3107
3108
3109
3110
3111 __le32 num_peer_stats;
3112 __le32 num_bcnflt_stats;
3113
3114
3115
3116
3117
3118
3119
3120
3121
3122 u8 data[0];
3123} __packed;
3124
3125struct wmi_10_2_stats_event {
3126 __le32 stats_id;
3127 __le32 num_pdev_stats;
3128 __le32 num_pdev_ext_stats;
3129 __le32 num_vdev_stats;
3130 __le32 num_peer_stats;
3131 __le32 num_bcnflt_stats;
3132 u8 data[0];
3133} __packed;
3134
3135
3136
3137
3138
3139struct wmi_pdev_stats_base {
3140 __le32 chan_nf;
3141 __le32 tx_frame_count;
3142 __le32 rx_frame_count;
3143 __le32 rx_clear_count;
3144 __le32 cycle_count;
3145 __le32 phy_err_count;
3146 __le32 chan_tx_pwr;
3147} __packed;
3148
3149struct wmi_pdev_stats {
3150 struct wmi_pdev_stats_base base;
3151 struct wmi_pdev_stats_tx tx;
3152 struct wmi_pdev_stats_rx rx;
3153 struct wmi_pdev_stats_peer peer;
3154} __packed;
3155
3156struct wmi_pdev_stats_extra {
3157 __le32 ack_rx_bad;
3158 __le32 rts_bad;
3159 __le32 rts_good;
3160 __le32 fcs_bad;
3161 __le32 no_beacons;
3162 __le32 mib_int_count;
3163} __packed;
3164
3165struct wmi_10x_pdev_stats {
3166 struct wmi_pdev_stats_base base;
3167 struct wmi_pdev_stats_tx tx;
3168 struct wmi_pdev_stats_rx rx;
3169 struct wmi_pdev_stats_peer peer;
3170 struct wmi_pdev_stats_extra extra;
3171} __packed;
3172
3173struct wmi_pdev_stats_mem {
3174 __le32 dram_free;
3175 __le32 iram_free;
3176} __packed;
3177
3178struct wmi_10_2_pdev_stats {
3179 struct wmi_pdev_stats_base base;
3180 struct wmi_pdev_stats_tx tx;
3181 __le32 mc_drop;
3182 struct wmi_pdev_stats_rx rx;
3183 __le32 pdev_rx_timeout;
3184 struct wmi_pdev_stats_mem mem;
3185 struct wmi_pdev_stats_peer peer;
3186 struct wmi_pdev_stats_extra extra;
3187} __packed;
3188
3189
3190
3191
3192
3193struct wmi_vdev_stats {
3194 __le32 vdev_id;
3195} __packed;
3196
3197
3198
3199
3200
3201struct wmi_peer_stats {
3202 struct wmi_mac_addr peer_macaddr;
3203 __le32 peer_rssi;
3204 __le32 peer_tx_rate;
3205} __packed;
3206
3207struct wmi_10x_peer_stats {
3208 struct wmi_peer_stats old;
3209 __le32 peer_rx_rate;
3210} __packed;
3211
3212struct wmi_10_2_peer_stats {
3213 struct wmi_peer_stats old;
3214 __le32 peer_rx_rate;
3215 __le32 current_per;
3216 __le32 retries;
3217 __le32 tx_rate_count;
3218 __le32 max_4ms_frame_len;
3219 __le32 total_sub_frames;
3220 __le32 tx_bytes;
3221 __le32 num_pkt_loss_overflow[4];
3222 __le32 num_pkt_loss_excess_retry[4];
3223} __packed;
3224
3225struct wmi_10_2_4_peer_stats {
3226 struct wmi_10_2_peer_stats common;
3227 __le32 unknown_value;
3228} __packed;
3229
3230struct wmi_10_2_pdev_ext_stats {
3231 __le32 rx_rssi_comb;
3232 __le32 rx_rssi[4];
3233 __le32 rx_mcs[10];
3234 __le32 tx_mcs[10];
3235 __le32 ack_rssi;
3236} __packed;
3237
3238struct wmi_vdev_create_cmd {
3239 __le32 vdev_id;
3240 __le32 vdev_type;
3241 __le32 vdev_subtype;
3242 struct wmi_mac_addr vdev_macaddr;
3243} __packed;
3244
3245enum wmi_vdev_type {
3246 WMI_VDEV_TYPE_AP = 1,
3247 WMI_VDEV_TYPE_STA = 2,
3248 WMI_VDEV_TYPE_IBSS = 3,
3249 WMI_VDEV_TYPE_MONITOR = 4,
3250};
3251
3252enum wmi_vdev_subtype {
3253 WMI_VDEV_SUBTYPE_NONE = 0,
3254 WMI_VDEV_SUBTYPE_P2P_DEVICE = 1,
3255 WMI_VDEV_SUBTYPE_P2P_CLIENT = 2,
3256 WMI_VDEV_SUBTYPE_P2P_GO = 3,
3257};
3258
3259
3260
3261
3262
3263
3264
3265#define WMI_VDEV_START_HIDDEN_SSID (1<<0)
3266
3267
3268
3269
3270
3271
3272#define WMI_VDEV_START_PMF_ENABLED (1<<1)
3273
3274struct wmi_p2p_noa_descriptor {
3275 __le32 type_count;
3276 __le32 duration;
3277 __le32 interval;
3278 __le32 start_time;
3279} __packed;
3280
3281struct wmi_vdev_start_request_cmd {
3282
3283 struct wmi_channel chan;
3284
3285 __le32 vdev_id;
3286
3287 __le32 requestor_id;
3288
3289 __le32 beacon_interval;
3290
3291 __le32 dtim_period;
3292
3293 __le32 flags;
3294
3295 struct wmi_ssid ssid;
3296
3297 __le32 bcn_tx_rate;
3298
3299 __le32 bcn_tx_power;
3300
3301 __le32 num_noa_descriptors;
3302
3303
3304
3305
3306 __le32 disable_hw_ack;
3307
3308 struct wmi_p2p_noa_descriptor noa_descriptors[2];
3309} __packed;
3310
3311struct wmi_vdev_restart_request_cmd {
3312 struct wmi_vdev_start_request_cmd vdev_start_request_cmd;
3313} __packed;
3314
3315struct wmi_vdev_start_request_arg {
3316 u32 vdev_id;
3317 struct wmi_channel_arg channel;
3318 u32 bcn_intval;
3319 u32 dtim_period;
3320 u8 *ssid;
3321 u32 ssid_len;
3322 u32 bcn_tx_rate;
3323 u32 bcn_tx_power;
3324 bool disable_hw_ack;
3325 bool hidden_ssid;
3326 bool pmf_enabled;
3327};
3328
3329struct wmi_vdev_delete_cmd {
3330
3331 __le32 vdev_id;
3332} __packed;
3333
3334struct wmi_vdev_up_cmd {
3335 __le32 vdev_id;
3336 __le32 vdev_assoc_id;
3337 struct wmi_mac_addr vdev_bssid;
3338} __packed;
3339
3340struct wmi_vdev_stop_cmd {
3341 __le32 vdev_id;
3342} __packed;
3343
3344struct wmi_vdev_down_cmd {
3345 __le32 vdev_id;
3346} __packed;
3347
3348struct wmi_vdev_standby_response_cmd {
3349
3350 __le32 vdev_id;
3351} __packed;
3352
3353struct wmi_vdev_resume_response_cmd {
3354
3355 __le32 vdev_id;
3356} __packed;
3357
3358struct wmi_vdev_set_param_cmd {
3359 __le32 vdev_id;
3360 __le32 param_id;
3361 __le32 param_value;
3362} __packed;
3363
3364#define WMI_MAX_KEY_INDEX 3
3365#define WMI_MAX_KEY_LEN 32
3366
3367#define WMI_KEY_PAIRWISE 0x00
3368#define WMI_KEY_GROUP 0x01
3369#define WMI_KEY_TX_USAGE 0x02
3370
3371struct wmi_key_seq_counter {
3372 __le32 key_seq_counter_l;
3373 __le32 key_seq_counter_h;
3374} __packed;
3375
3376#define WMI_CIPHER_NONE 0x0
3377#define WMI_CIPHER_WEP 0x1
3378#define WMI_CIPHER_TKIP 0x2
3379#define WMI_CIPHER_AES_OCB 0x3
3380#define WMI_CIPHER_AES_CCM 0x4
3381#define WMI_CIPHER_WAPI 0x5
3382#define WMI_CIPHER_CKIP 0x6
3383#define WMI_CIPHER_AES_CMAC 0x7
3384
3385struct wmi_vdev_install_key_cmd {
3386 __le32 vdev_id;
3387 struct wmi_mac_addr peer_macaddr;
3388 __le32 key_idx;
3389 __le32 key_flags;
3390 __le32 key_cipher;
3391 struct wmi_key_seq_counter key_rsc_counter;
3392 struct wmi_key_seq_counter key_global_rsc_counter;
3393 struct wmi_key_seq_counter key_tsc_counter;
3394 u8 wpi_key_rsc_counter[16];
3395 u8 wpi_key_tsc_counter[16];
3396 __le32 key_len;
3397 __le32 key_txmic_len;
3398 __le32 key_rxmic_len;
3399
3400
3401 u8 key_data[0];
3402} __packed;
3403
3404struct wmi_vdev_install_key_arg {
3405 u32 vdev_id;
3406 const u8 *macaddr;
3407 u32 key_idx;
3408 u32 key_flags;
3409 u32 key_cipher;
3410 u32 key_len;
3411 u32 key_txmic_len;
3412 u32 key_rxmic_len;
3413 const void *key_data;
3414};
3415
3416
3417
3418
3419
3420
3421
3422
3423
3424
3425
3426
3427
3428
3429enum wmi_rate_preamble {
3430 WMI_RATE_PREAMBLE_OFDM,
3431 WMI_RATE_PREAMBLE_CCK,
3432 WMI_RATE_PREAMBLE_HT,
3433 WMI_RATE_PREAMBLE_VHT,
3434};
3435
3436
3437#define WMI_FIXED_RATE_NONE (0xff)
3438
3439struct wmi_vdev_param_map {
3440 u32 rts_threshold;
3441 u32 fragmentation_threshold;
3442 u32 beacon_interval;
3443 u32 listen_interval;
3444 u32 multicast_rate;
3445 u32 mgmt_tx_rate;
3446 u32 slot_time;
3447 u32 preamble;
3448 u32 swba_time;
3449 u32 wmi_vdev_stats_update_period;
3450 u32 wmi_vdev_pwrsave_ageout_time;
3451 u32 wmi_vdev_host_swba_interval;
3452 u32 dtim_period;
3453 u32 wmi_vdev_oc_scheduler_air_time_limit;
3454 u32 wds;
3455 u32 atim_window;
3456 u32 bmiss_count_max;
3457 u32 bmiss_first_bcnt;
3458 u32 bmiss_final_bcnt;
3459 u32 feature_wmm;
3460 u32 chwidth;
3461 u32 chextoffset;
3462 u32 disable_htprotection;
3463 u32 sta_quickkickout;
3464 u32 mgmt_rate;
3465 u32 protection_mode;
3466 u32 fixed_rate;
3467 u32 sgi;
3468 u32 ldpc;
3469 u32 tx_stbc;
3470 u32 rx_stbc;
3471 u32 intra_bss_fwd;
3472 u32 def_keyid;
3473 u32 nss;
3474 u32 bcast_data_rate;
3475 u32 mcast_data_rate;
3476 u32 mcast_indicate;
3477 u32 dhcp_indicate;
3478 u32 unknown_dest_indicate;
3479 u32 ap_keepalive_min_idle_inactive_time_secs;
3480 u32 ap_keepalive_max_idle_inactive_time_secs;
3481 u32 ap_keepalive_max_unresponsive_time_secs;
3482 u32 ap_enable_nawds;
3483 u32 mcast2ucast_set;
3484 u32 enable_rtscts;
3485 u32 txbf;
3486 u32 packet_powersave;
3487 u32 drop_unencry;
3488 u32 tx_encap_type;
3489 u32 ap_detect_out_of_sync_sleeping_sta_time_secs;
3490};
3491
3492#define WMI_VDEV_PARAM_UNSUPPORTED 0
3493
3494
3495enum wmi_vdev_param {
3496
3497 WMI_VDEV_PARAM_RTS_THRESHOLD = 0x1,
3498
3499 WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
3500
3501 WMI_VDEV_PARAM_BEACON_INTERVAL,
3502
3503 WMI_VDEV_PARAM_LISTEN_INTERVAL,
3504
3505 WMI_VDEV_PARAM_MULTICAST_RATE,
3506
3507 WMI_VDEV_PARAM_MGMT_TX_RATE,
3508
3509 WMI_VDEV_PARAM_SLOT_TIME,
3510
3511 WMI_VDEV_PARAM_PREAMBLE,
3512
3513 WMI_VDEV_PARAM_SWBA_TIME,
3514
3515 WMI_VDEV_STATS_UPDATE_PERIOD,
3516
3517 WMI_VDEV_PWRSAVE_AGEOUT_TIME,
3518
3519
3520
3521
3522 WMI_VDEV_HOST_SWBA_INTERVAL,
3523
3524 WMI_VDEV_PARAM_DTIM_PERIOD,
3525
3526
3527
3528
3529 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
3530
3531 WMI_VDEV_PARAM_WDS,
3532
3533 WMI_VDEV_PARAM_ATIM_WINDOW,
3534
3535 WMI_VDEV_PARAM_BMISS_COUNT_MAX,
3536
3537 WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
3538
3539 WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
3540
3541 WMI_VDEV_PARAM_FEATURE_WMM,
3542
3543 WMI_VDEV_PARAM_CHWIDTH,
3544
3545 WMI_VDEV_PARAM_CHEXTOFFSET,
3546
3547 WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
3548
3549 WMI_VDEV_PARAM_STA_QUICKKICKOUT,
3550
3551 WMI_VDEV_PARAM_MGMT_RATE,
3552
3553 WMI_VDEV_PARAM_PROTECTION_MODE,
3554
3555 WMI_VDEV_PARAM_FIXED_RATE,
3556
3557 WMI_VDEV_PARAM_SGI,
3558
3559 WMI_VDEV_PARAM_LDPC,
3560
3561 WMI_VDEV_PARAM_TX_STBC,
3562
3563 WMI_VDEV_PARAM_RX_STBC,
3564
3565 WMI_VDEV_PARAM_INTRA_BSS_FWD,
3566
3567 WMI_VDEV_PARAM_DEF_KEYID,
3568
3569 WMI_VDEV_PARAM_NSS,
3570
3571 WMI_VDEV_PARAM_BCAST_DATA_RATE,
3572
3573 WMI_VDEV_PARAM_MCAST_DATA_RATE,
3574
3575 WMI_VDEV_PARAM_MCAST_INDICATE,
3576
3577 WMI_VDEV_PARAM_DHCP_INDICATE,
3578
3579 WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
3580
3581
3582 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
3583
3584
3585
3586
3587
3588
3589
3590
3591
3592
3593
3594 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
3595
3596
3597
3598
3599
3600
3601 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
3602
3603
3604 WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
3605
3606 WMI_VDEV_PARAM_ENABLE_RTSCTS,
3607
3608 WMI_VDEV_PARAM_TXBF,
3609
3610
3611 WMI_VDEV_PARAM_PACKET_POWERSAVE,
3612
3613
3614
3615
3616
3617 WMI_VDEV_PARAM_DROP_UNENCRY,
3618
3619
3620
3621
3622 WMI_VDEV_PARAM_TX_ENCAP_TYPE,
3623};
3624
3625
3626enum wmi_10x_vdev_param {
3627
3628 WMI_10X_VDEV_PARAM_RTS_THRESHOLD = 0x1,
3629
3630 WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
3631
3632 WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
3633
3634 WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
3635
3636 WMI_10X_VDEV_PARAM_MULTICAST_RATE,
3637
3638 WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
3639
3640 WMI_10X_VDEV_PARAM_SLOT_TIME,
3641
3642 WMI_10X_VDEV_PARAM_PREAMBLE,
3643
3644 WMI_10X_VDEV_PARAM_SWBA_TIME,
3645
3646 WMI_10X_VDEV_STATS_UPDATE_PERIOD,
3647
3648 WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
3649
3650
3651
3652
3653 WMI_10X_VDEV_HOST_SWBA_INTERVAL,
3654
3655 WMI_10X_VDEV_PARAM_DTIM_PERIOD,
3656
3657
3658
3659
3660 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
3661
3662 WMI_10X_VDEV_PARAM_WDS,
3663
3664 WMI_10X_VDEV_PARAM_ATIM_WINDOW,
3665
3666 WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
3667
3668 WMI_10X_VDEV_PARAM_FEATURE_WMM,
3669
3670 WMI_10X_VDEV_PARAM_CHWIDTH,
3671
3672 WMI_10X_VDEV_PARAM_CHEXTOFFSET,
3673
3674 WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
3675
3676 WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
3677
3678 WMI_10X_VDEV_PARAM_MGMT_RATE,
3679
3680 WMI_10X_VDEV_PARAM_PROTECTION_MODE,
3681
3682 WMI_10X_VDEV_PARAM_FIXED_RATE,
3683
3684 WMI_10X_VDEV_PARAM_SGI,
3685
3686 WMI_10X_VDEV_PARAM_LDPC,
3687
3688 WMI_10X_VDEV_PARAM_TX_STBC,
3689
3690 WMI_10X_VDEV_PARAM_RX_STBC,
3691
3692 WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
3693
3694 WMI_10X_VDEV_PARAM_DEF_KEYID,
3695
3696 WMI_10X_VDEV_PARAM_NSS,
3697
3698 WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
3699
3700 WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
3701
3702 WMI_10X_VDEV_PARAM_MCAST_INDICATE,
3703
3704 WMI_10X_VDEV_PARAM_DHCP_INDICATE,
3705
3706 WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
3707
3708
3709 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
3710
3711
3712
3713
3714
3715
3716
3717
3718
3719
3720
3721 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
3722
3723
3724
3725
3726
3727
3728 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
3729
3730
3731 WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
3732
3733 WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
3734
3735 WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
3736
3737 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
3738
3739
3740 WMI_10X_VDEV_PARAM_TX_ENCAP_TYPE,
3741 WMI_10X_VDEV_PARAM_CABQ_MAXDUR,
3742 WMI_10X_VDEV_PARAM_MFPTEST_SET,
3743 WMI_10X_VDEV_PARAM_RTS_FIXED_RATE,
3744 WMI_10X_VDEV_PARAM_VHT_SGIMASK,
3745 WMI_10X_VDEV_PARAM_VHT80_RATEMASK,
3746};
3747
3748
3749#define WMI_VDEV_SLOT_TIME_LONG 0x1
3750
3751#define WMI_VDEV_SLOT_TIME_SHORT 0x2
3752
3753#define WMI_VDEV_PREAMBLE_LONG 0x1
3754
3755#define WMI_VDEV_PREAMBLE_SHORT 0x2
3756
3757enum wmi_start_event_param {
3758 WMI_VDEV_RESP_START_EVENT = 0,
3759 WMI_VDEV_RESP_RESTART_EVENT,
3760};
3761
3762struct wmi_vdev_start_response_event {
3763 __le32 vdev_id;
3764 __le32 req_id;
3765 __le32 resp_type;
3766 __le32 status;
3767} __packed;
3768
3769struct wmi_vdev_standby_req_event {
3770
3771 __le32 vdev_id;
3772} __packed;
3773
3774struct wmi_vdev_resume_req_event {
3775
3776 __le32 vdev_id;
3777} __packed;
3778
3779struct wmi_vdev_stopped_event {
3780
3781 __le32 vdev_id;
3782} __packed;
3783
3784
3785
3786
3787
3788struct wmi_vdev_simple_event {
3789
3790 __le32 vdev_id;
3791} __packed;
3792
3793
3794
3795#define WMI_INIFIED_VDEV_START_RESPONSE_STATUS_SUCCESS 0x0
3796
3797
3798#define WMI_INIFIED_VDEV_START_RESPONSE_INVALID_VDEVID 0x1
3799
3800
3801#define WMI_INIFIED_VDEV_START_RESPONSE_NOT_SUPPORTED 0x2
3802
3803
3804struct wmi_vdev_spectral_conf_cmd {
3805 __le32 vdev_id;
3806
3807
3808 __le32 scan_count;
3809 __le32 scan_period;
3810 __le32 scan_priority;
3811
3812
3813 __le32 scan_fft_size;
3814 __le32 scan_gc_ena;
3815 __le32 scan_restart_ena;
3816 __le32 scan_noise_floor_ref;
3817 __le32 scan_init_delay;
3818 __le32 scan_nb_tone_thr;
3819 __le32 scan_str_bin_thr;
3820 __le32 scan_wb_rpt_mode;
3821 __le32 scan_rssi_rpt_mode;
3822 __le32 scan_rssi_thr;
3823 __le32 scan_pwr_format;
3824
3825
3826
3827
3828
3829
3830
3831
3832
3833
3834
3835
3836 __le32 scan_rpt_mode;
3837 __le32 scan_bin_scale;
3838 __le32 scan_dbm_adj;
3839 __le32 scan_chn_mask;
3840} __packed;
3841
3842struct wmi_vdev_spectral_conf_arg {
3843 u32 vdev_id;
3844 u32 scan_count;
3845 u32 scan_period;
3846 u32 scan_priority;
3847 u32 scan_fft_size;
3848 u32 scan_gc_ena;
3849 u32 scan_restart_ena;
3850 u32 scan_noise_floor_ref;
3851 u32 scan_init_delay;
3852 u32 scan_nb_tone_thr;
3853 u32 scan_str_bin_thr;
3854 u32 scan_wb_rpt_mode;
3855 u32 scan_rssi_rpt_mode;
3856 u32 scan_rssi_thr;
3857 u32 scan_pwr_format;
3858 u32 scan_rpt_mode;
3859 u32 scan_bin_scale;
3860 u32 scan_dbm_adj;
3861 u32 scan_chn_mask;
3862};
3863
3864#define WMI_SPECTRAL_ENABLE_DEFAULT 0
3865#define WMI_SPECTRAL_COUNT_DEFAULT 0
3866#define WMI_SPECTRAL_PERIOD_DEFAULT 35
3867#define WMI_SPECTRAL_PRIORITY_DEFAULT 1
3868#define WMI_SPECTRAL_FFT_SIZE_DEFAULT 7
3869#define WMI_SPECTRAL_GC_ENA_DEFAULT 1
3870#define WMI_SPECTRAL_RESTART_ENA_DEFAULT 0
3871#define WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT -96
3872#define WMI_SPECTRAL_INIT_DELAY_DEFAULT 80
3873#define WMI_SPECTRAL_NB_TONE_THR_DEFAULT 12
3874#define WMI_SPECTRAL_STR_BIN_THR_DEFAULT 8
3875#define WMI_SPECTRAL_WB_RPT_MODE_DEFAULT 0
3876#define WMI_SPECTRAL_RSSI_RPT_MODE_DEFAULT 0
3877#define WMI_SPECTRAL_RSSI_THR_DEFAULT 0xf0
3878#define WMI_SPECTRAL_PWR_FORMAT_DEFAULT 0
3879#define WMI_SPECTRAL_RPT_MODE_DEFAULT 2
3880#define WMI_SPECTRAL_BIN_SCALE_DEFAULT 1
3881#define WMI_SPECTRAL_DBM_ADJ_DEFAULT 1
3882#define WMI_SPECTRAL_CHN_MASK_DEFAULT 1
3883
3884struct wmi_vdev_spectral_enable_cmd {
3885 __le32 vdev_id;
3886 __le32 trigger_cmd;
3887 __le32 enable_cmd;
3888} __packed;
3889
3890#define WMI_SPECTRAL_TRIGGER_CMD_TRIGGER 1
3891#define WMI_SPECTRAL_TRIGGER_CMD_CLEAR 2
3892#define WMI_SPECTRAL_ENABLE_CMD_ENABLE 1
3893#define WMI_SPECTRAL_ENABLE_CMD_DISABLE 2
3894
3895
3896struct wmi_bcn_tx_hdr {
3897 __le32 vdev_id;
3898 __le32 tx_rate;
3899 __le32 tx_power;
3900 __le32 bcn_len;
3901} __packed;
3902
3903struct wmi_bcn_tx_cmd {
3904 struct wmi_bcn_tx_hdr hdr;
3905 u8 *bcn[0];
3906} __packed;
3907
3908struct wmi_bcn_tx_arg {
3909 u32 vdev_id;
3910 u32 tx_rate;
3911 u32 tx_power;
3912 u32 bcn_len;
3913 const void *bcn;
3914};
3915
3916enum wmi_bcn_tx_ref_flags {
3917 WMI_BCN_TX_REF_FLAG_DTIM_ZERO = 0x1,
3918 WMI_BCN_TX_REF_FLAG_DELIVER_CAB = 0x2,
3919};
3920
3921
3922
3923
3924#define WMI_BCN_TX_REF_DEF_ANTENNA 0
3925
3926struct wmi_bcn_tx_ref_cmd {
3927 __le32 vdev_id;
3928 __le32 data_len;
3929
3930 __le32 data_ptr;
3931
3932 __le32 msdu_id;
3933
3934 __le32 frame_control;
3935
3936 __le32 flags;
3937
3938 __le32 antenna_mask;
3939} __packed;
3940
3941
3942#define WMI_BCN_FILTER_ALL 0
3943#define WMI_BCN_FILTER_NONE 1
3944#define WMI_BCN_FILTER_RSSI 2
3945#define WMI_BCN_FILTER_BSSID 3
3946#define WMI_BCN_FILTER_SSID 4
3947
3948struct wmi_bcn_filter_rx_cmd {
3949
3950 __le32 bcn_filter_id;
3951
3952 __le32 bcn_filter;
3953
3954 __le32 bcn_filter_len;
3955
3956 u8 *bcn_filter_buf;
3957} __packed;
3958
3959
3960struct wmi_bcn_prb_info {
3961
3962 __le32 caps;
3963
3964 __le32 erp;
3965
3966
3967
3968
3969
3970
3971
3972
3973
3974} __packed;
3975
3976struct wmi_bcn_tmpl_cmd {
3977
3978 __le32 vdev_id;
3979
3980 __le32 tim_ie_offset;
3981
3982 struct wmi_bcn_prb_info bcn_prb_info;
3983
3984 __le32 buf_len;
3985
3986 u8 data[1];
3987} __packed;
3988
3989struct wmi_prb_tmpl_cmd {
3990
3991 __le32 vdev_id;
3992
3993 struct wmi_bcn_prb_info bcn_prb_info;
3994
3995 __le32 buf_len;
3996
3997 u8 data[1];
3998} __packed;
3999
4000enum wmi_sta_ps_mode {
4001
4002 WMI_STA_PS_MODE_DISABLED = 0,
4003
4004 WMI_STA_PS_MODE_ENABLED = 1,
4005};
4006
4007struct wmi_sta_powersave_mode_cmd {
4008
4009 __le32 vdev_id;
4010
4011
4012
4013
4014
4015 __le32 sta_ps_mode;
4016} __packed;
4017
4018enum wmi_csa_offload_en {
4019 WMI_CSA_OFFLOAD_DISABLE = 0,
4020 WMI_CSA_OFFLOAD_ENABLE = 1,
4021};
4022
4023struct wmi_csa_offload_enable_cmd {
4024 __le32 vdev_id;
4025 __le32 csa_offload_enable;
4026} __packed;
4027
4028struct wmi_csa_offload_chanswitch_cmd {
4029 __le32 vdev_id;
4030 struct wmi_channel chan;
4031} __packed;
4032
4033
4034
4035
4036
4037
4038
4039enum wmi_sta_ps_param_rx_wake_policy {
4040
4041
4042
4043
4044
4045
4046 WMI_STA_PS_RX_WAKE_POLICY_WAKE = 0,
4047
4048
4049
4050
4051
4052
4053
4054
4055 WMI_STA_PS_RX_WAKE_POLICY_POLL_UAPSD = 1,
4056};
4057
4058
4059
4060
4061
4062
4063
4064
4065
4066enum wmi_sta_ps_param_tx_wake_threshold {
4067 WMI_STA_PS_TX_WAKE_THRESHOLD_NEVER = 0,
4068 WMI_STA_PS_TX_WAKE_THRESHOLD_ALWAYS = 1,
4069
4070
4071
4072
4073
4074};
4075
4076
4077
4078
4079
4080
4081
4082
4083
4084
4085enum wmi_sta_ps_param_pspoll_count {
4086 WMI_STA_PS_PSPOLL_COUNT_NO_MAX = 0,
4087
4088
4089
4090
4091
4092
4093
4094
4095
4096
4097 WMI_STA_PS_PSPOLL_COUNT_UAPSD = 3,
4098};
4099
4100
4101
4102
4103
4104
4105
4106#define WMI_UAPSD_AC_TYPE_DELI 0
4107#define WMI_UAPSD_AC_TYPE_TRIG 1
4108
4109#define WMI_UAPSD_AC_BIT_MASK(ac, type) \
4110 ((type == WMI_UAPSD_AC_TYPE_DELI) ? (1<<(ac<<1)) : (1<<((ac<<1)+1)))
4111
4112enum wmi_sta_ps_param_uapsd {
4113 WMI_STA_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4114 WMI_STA_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4115 WMI_STA_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4116 WMI_STA_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4117 WMI_STA_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4118 WMI_STA_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4119 WMI_STA_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4120 WMI_STA_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4121};
4122
4123#define WMI_STA_UAPSD_MAX_INTERVAL_MSEC UINT_MAX
4124
4125struct wmi_sta_uapsd_auto_trig_param {
4126 __le32 wmm_ac;
4127 __le32 user_priority;
4128 __le32 service_interval;
4129 __le32 suspend_interval;
4130 __le32 delay_interval;
4131};
4132
4133struct wmi_sta_uapsd_auto_trig_cmd_fixed_param {
4134 __le32 vdev_id;
4135 struct wmi_mac_addr peer_macaddr;
4136 __le32 num_ac;
4137};
4138
4139struct wmi_sta_uapsd_auto_trig_arg {
4140 u32 wmm_ac;
4141 u32 user_priority;
4142 u32 service_interval;
4143 u32 suspend_interval;
4144 u32 delay_interval;
4145};
4146
4147enum wmi_sta_powersave_param {
4148
4149
4150
4151
4152
4153 WMI_STA_PS_PARAM_RX_WAKE_POLICY = 0,
4154
4155
4156
4157
4158
4159
4160 WMI_STA_PS_PARAM_TX_WAKE_THRESHOLD = 1,
4161
4162
4163
4164
4165
4166
4167
4168 WMI_STA_PS_PARAM_PSPOLL_COUNT = 2,
4169
4170
4171
4172
4173
4174
4175
4176
4177 WMI_STA_PS_PARAM_INACTIVITY_TIME = 3,
4178
4179
4180
4181
4182
4183
4184 WMI_STA_PS_PARAM_UAPSD = 4,
4185};
4186
4187struct wmi_sta_powersave_param_cmd {
4188 __le32 vdev_id;
4189 __le32 param_id;
4190 __le32 param_value;
4191} __packed;
4192
4193
4194#define WMI_STA_MIMO_PS_MODE_DISABLE
4195
4196#define WMI_STA_MIMO_PS_MODE_STATIC
4197
4198#define WMI_STA_MIMO_PS_MODE_DYNAMIC
4199
4200struct wmi_sta_mimo_ps_mode_cmd {
4201
4202 __le32 vdev_id;
4203
4204 __le32 mimo_pwrsave_mode;
4205} __packed;
4206
4207
4208enum wmi_ap_ps_param_uapsd {
4209 WMI_AP_PS_UAPSD_AC0_DELIVERY_EN = (1 << 0),
4210 WMI_AP_PS_UAPSD_AC0_TRIGGER_EN = (1 << 1),
4211 WMI_AP_PS_UAPSD_AC1_DELIVERY_EN = (1 << 2),
4212 WMI_AP_PS_UAPSD_AC1_TRIGGER_EN = (1 << 3),
4213 WMI_AP_PS_UAPSD_AC2_DELIVERY_EN = (1 << 4),
4214 WMI_AP_PS_UAPSD_AC2_TRIGGER_EN = (1 << 5),
4215 WMI_AP_PS_UAPSD_AC3_DELIVERY_EN = (1 << 6),
4216 WMI_AP_PS_UAPSD_AC3_TRIGGER_EN = (1 << 7),
4217};
4218
4219
4220enum wmi_ap_ps_peer_param_max_sp {
4221 WMI_AP_PS_PEER_PARAM_MAX_SP_UNLIMITED = 0,
4222 WMI_AP_PS_PEER_PARAM_MAX_SP_2 = 1,
4223 WMI_AP_PS_PEER_PARAM_MAX_SP_4 = 2,
4224 WMI_AP_PS_PEER_PARAM_MAX_SP_6 = 3,
4225 MAX_WMI_AP_PS_PEER_PARAM_MAX_SP,
4226};
4227
4228
4229
4230
4231
4232enum wmi_ap_ps_peer_param {
4233
4234
4235
4236
4237
4238
4239
4240
4241
4242
4243
4244 WMI_AP_PS_PEER_PARAM_UAPSD = 0,
4245
4246
4247
4248
4249
4250
4251
4252
4253 WMI_AP_PS_PEER_PARAM_MAX_SP = 1,
4254
4255
4256 WMI_AP_PS_PEER_PARAM_AGEOUT_TIME = 2,
4257};
4258
4259struct wmi_ap_ps_peer_cmd {
4260
4261 __le32 vdev_id;
4262
4263
4264 struct wmi_mac_addr peer_macaddr;
4265
4266
4267 __le32 param_id;
4268
4269
4270 __le32 param_value;
4271} __packed;
4272
4273
4274#define WMI_TIM_BITMAP_ARRAY_SIZE 4
4275
4276struct wmi_tim_info {
4277 __le32 tim_len;
4278 __le32 tim_mcast;
4279 __le32 tim_bitmap[WMI_TIM_BITMAP_ARRAY_SIZE];
4280 __le32 tim_changed;
4281 __le32 tim_num_ps_pending;
4282} __packed;
4283
4284
4285#define WMI_P2P_MAX_NOA_DESCRIPTORS 4
4286#define WMI_P2P_OPPPS_ENABLE_BIT BIT(0)
4287#define WMI_P2P_OPPPS_CTWINDOW_OFFSET 1
4288#define WMI_P2P_NOA_CHANGED_BIT BIT(0)
4289
4290struct wmi_p2p_noa_info {
4291
4292
4293 u8 changed;
4294
4295 u8 index;
4296
4297
4298 u8 ctwindow_oppps;
4299
4300 u8 num_descriptors;
4301
4302 struct wmi_p2p_noa_descriptor descriptors[WMI_P2P_MAX_NOA_DESCRIPTORS];
4303} __packed;
4304
4305struct wmi_bcn_info {
4306 struct wmi_tim_info tim_info;
4307 struct wmi_p2p_noa_info p2p_noa_info;
4308} __packed;
4309
4310struct wmi_host_swba_event {
4311 __le32 vdev_map;
4312 struct wmi_bcn_info bcn_info[0];
4313} __packed;
4314
4315#define WMI_MAX_AP_VDEV 16
4316
4317struct wmi_tbtt_offset_event {
4318 __le32 vdev_map;
4319 __le32 tbttoffset_list[WMI_MAX_AP_VDEV];
4320} __packed;
4321
4322struct wmi_peer_create_cmd {
4323 __le32 vdev_id;
4324 struct wmi_mac_addr peer_macaddr;
4325} __packed;
4326
4327struct wmi_peer_delete_cmd {
4328 __le32 vdev_id;
4329 struct wmi_mac_addr peer_macaddr;
4330} __packed;
4331
4332struct wmi_peer_flush_tids_cmd {
4333 __le32 vdev_id;
4334 struct wmi_mac_addr peer_macaddr;
4335 __le32 peer_tid_bitmap;
4336} __packed;
4337
4338struct wmi_fixed_rate {
4339
4340
4341
4342
4343
4344
4345 __le32 rate_mode;
4346
4347
4348
4349
4350 __le32 rate_series;
4351
4352
4353
4354
4355
4356 __le32 rate_retries;
4357} __packed;
4358
4359struct wmi_peer_fixed_rate_cmd {
4360
4361 __le32 vdev_id;
4362
4363 struct wmi_mac_addr peer_macaddr;
4364
4365 struct wmi_fixed_rate peer_fixed_rate;
4366} __packed;
4367
4368#define WMI_MGMT_TID 17
4369
4370struct wmi_addba_clear_resp_cmd {
4371
4372 __le32 vdev_id;
4373
4374 struct wmi_mac_addr peer_macaddr;
4375} __packed;
4376
4377struct wmi_addba_send_cmd {
4378
4379 __le32 vdev_id;
4380
4381 struct wmi_mac_addr peer_macaddr;
4382
4383 __le32 tid;
4384
4385 __le32 buffersize;
4386} __packed;
4387
4388struct wmi_delba_send_cmd {
4389
4390 __le32 vdev_id;
4391
4392 struct wmi_mac_addr peer_macaddr;
4393
4394 __le32 tid;
4395
4396 __le32 initiator;
4397
4398 __le32 reasoncode;
4399} __packed;
4400
4401struct wmi_addba_setresponse_cmd {
4402
4403 __le32 vdev_id;
4404
4405 struct wmi_mac_addr peer_macaddr;
4406
4407 __le32 tid;
4408
4409 __le32 statuscode;
4410} __packed;
4411
4412struct wmi_send_singleamsdu_cmd {
4413
4414 __le32 vdev_id;
4415
4416 struct wmi_mac_addr peer_macaddr;
4417
4418 __le32 tid;
4419} __packed;
4420
4421enum wmi_peer_smps_state {
4422 WMI_PEER_SMPS_PS_NONE = 0x0,
4423 WMI_PEER_SMPS_STATIC = 0x1,
4424 WMI_PEER_SMPS_DYNAMIC = 0x2
4425};
4426
4427enum wmi_peer_chwidth {
4428 WMI_PEER_CHWIDTH_20MHZ = 0,
4429 WMI_PEER_CHWIDTH_40MHZ = 1,
4430 WMI_PEER_CHWIDTH_80MHZ = 2,
4431};
4432
4433enum wmi_peer_param {
4434 WMI_PEER_SMPS_STATE = 0x1,
4435 WMI_PEER_AMPDU = 0x2,
4436 WMI_PEER_AUTHORIZE = 0x3,
4437 WMI_PEER_CHAN_WIDTH = 0x4,
4438 WMI_PEER_NSS = 0x5,
4439 WMI_PEER_USE_4ADDR = 0x6
4440};
4441
4442struct wmi_peer_set_param_cmd {
4443 __le32 vdev_id;
4444 struct wmi_mac_addr peer_macaddr;
4445 __le32 param_id;
4446 __le32 param_value;
4447} __packed;
4448
4449#define MAX_SUPPORTED_RATES 128
4450
4451struct wmi_rate_set {
4452
4453 __le32 num_rates;
4454
4455
4456
4457
4458
4459 __le32 rates[(MAX_SUPPORTED_RATES/4)+1];
4460} __packed;
4461
4462struct wmi_rate_set_arg {
4463 unsigned int num_rates;
4464 u8 rates[MAX_SUPPORTED_RATES];
4465};
4466
4467
4468
4469
4470
4471
4472struct wmi_vht_rate_set {
4473 __le32 rx_max_rate;
4474 __le32 rx_mcs_set;
4475 __le32 tx_max_rate;
4476 __le32 tx_mcs_set;
4477} __packed;
4478
4479struct wmi_vht_rate_set_arg {
4480 u32 rx_max_rate;
4481 u32 rx_mcs_set;
4482 u32 tx_max_rate;
4483 u32 tx_mcs_set;
4484};
4485
4486struct wmi_peer_set_rates_cmd {
4487
4488 struct wmi_mac_addr peer_macaddr;
4489
4490 struct wmi_rate_set peer_legacy_rates;
4491
4492 struct wmi_rate_set peer_ht_rates;
4493} __packed;
4494
4495struct wmi_peer_set_q_empty_callback_cmd {
4496
4497 __le32 vdev_id;
4498
4499 struct wmi_mac_addr peer_macaddr;
4500 __le32 callback_enable;
4501} __packed;
4502
4503#define WMI_PEER_AUTH 0x00000001
4504#define WMI_PEER_QOS 0x00000002
4505#define WMI_PEER_NEED_PTK_4_WAY 0x00000004
4506#define WMI_PEER_NEED_GTK_2_WAY 0x00000010
4507#define WMI_PEER_APSD 0x00000800
4508#define WMI_PEER_HT 0x00001000
4509#define WMI_PEER_40MHZ 0x00002000
4510#define WMI_PEER_STBC 0x00008000
4511#define WMI_PEER_LDPC 0x00010000
4512#define WMI_PEER_DYN_MIMOPS 0x00020000
4513#define WMI_PEER_STATIC_MIMOPS 0x00040000
4514#define WMI_PEER_SPATIAL_MUX 0x00200000
4515#define WMI_PEER_VHT 0x02000000
4516#define WMI_PEER_80MHZ 0x04000000
4517#define WMI_PEER_VHT_2G 0x08000000
4518
4519
4520
4521
4522
4523
4524
4525
4526#define WMI_RC_DS_FLAG 0x01
4527#define WMI_RC_CW40_FLAG 0x02
4528#define WMI_RC_SGI_FLAG 0x04
4529#define WMI_RC_HT_FLAG 0x08
4530#define WMI_RC_RTSCTS_FLAG 0x10
4531#define WMI_RC_TX_STBC_FLAG 0x20
4532#define WMI_RC_RX_STBC_FLAG 0xC0
4533#define WMI_RC_RX_STBC_FLAG_S 6
4534#define WMI_RC_WEP_TKIP_FLAG 0x100
4535#define WMI_RC_TS_FLAG 0x200
4536#define WMI_RC_UAPSD_FLAG 0x400
4537
4538
4539#define ATH10K_MAX_HW_LISTEN_INTERVAL 5
4540
4541struct wmi_common_peer_assoc_complete_cmd {
4542 struct wmi_mac_addr peer_macaddr;
4543 __le32 vdev_id;
4544 __le32 peer_new_assoc;
4545 __le32 peer_associd;
4546 __le32 peer_flags;
4547 __le32 peer_caps;
4548 __le32 peer_listen_intval;
4549 __le32 peer_ht_caps;
4550 __le32 peer_max_mpdu;
4551 __le32 peer_mpdu_density;
4552 __le32 peer_rate_caps;
4553 struct wmi_rate_set peer_legacy_rates;
4554 struct wmi_rate_set peer_ht_rates;
4555 __le32 peer_nss;
4556 __le32 peer_vht_caps;
4557 __le32 peer_phymode;
4558 struct wmi_vht_rate_set peer_vht_rates;
4559};
4560
4561struct wmi_main_peer_assoc_complete_cmd {
4562 struct wmi_common_peer_assoc_complete_cmd cmd;
4563
4564
4565
4566 __le32 peer_ht_info[2];
4567} __packed;
4568
4569struct wmi_10_1_peer_assoc_complete_cmd {
4570 struct wmi_common_peer_assoc_complete_cmd cmd;
4571} __packed;
4572
4573#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_LSB 0
4574#define WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX_MASK 0x0f
4575#define WMI_PEER_ASSOC_INFO0_MAX_NSS_LSB 4
4576#define WMI_PEER_ASSOC_INFO0_MAX_NSS_MASK 0xf0
4577
4578struct wmi_10_2_peer_assoc_complete_cmd {
4579 struct wmi_common_peer_assoc_complete_cmd cmd;
4580 __le32 info0;
4581} __packed;
4582
4583struct wmi_peer_assoc_complete_arg {
4584 u8 addr[ETH_ALEN];
4585 u32 vdev_id;
4586 bool peer_reassoc;
4587 u16 peer_aid;
4588 u32 peer_flags;
4589 u16 peer_caps;
4590 u32 peer_listen_intval;
4591 u32 peer_ht_caps;
4592 u32 peer_max_mpdu;
4593 u32 peer_mpdu_density;
4594 u32 peer_rate_caps;
4595 struct wmi_rate_set_arg peer_legacy_rates;
4596 struct wmi_rate_set_arg peer_ht_rates;
4597 u32 peer_num_spatial_streams;
4598 u32 peer_vht_caps;
4599 enum wmi_phy_mode peer_phymode;
4600 struct wmi_vht_rate_set_arg peer_vht_rates;
4601};
4602
4603struct wmi_peer_add_wds_entry_cmd {
4604
4605 struct wmi_mac_addr peer_macaddr;
4606
4607 struct wmi_mac_addr wds_macaddr;
4608} __packed;
4609
4610struct wmi_peer_remove_wds_entry_cmd {
4611
4612 struct wmi_mac_addr wds_macaddr;
4613} __packed;
4614
4615struct wmi_peer_q_empty_callback_event {
4616
4617 struct wmi_mac_addr peer_macaddr;
4618} __packed;
4619
4620
4621
4622
4623struct wmi_chan_info_event {
4624 __le32 err_code;
4625 __le32 freq;
4626 __le32 cmd_flags;
4627 __le32 noise_floor;
4628 __le32 rx_clear_count;
4629 __le32 cycle_count;
4630} __packed;
4631
4632struct wmi_peer_sta_kickout_event {
4633 struct wmi_mac_addr peer_macaddr;
4634} __packed;
4635
4636#define WMI_CHAN_INFO_FLAG_COMPLETE BIT(0)
4637
4638
4639#define WMI_CHAN_INFO_MSEC(x) ((x) / 76595)
4640
4641
4642#define BCN_FLT_MAX_SUPPORTED_IES 256
4643#define BCN_FLT_MAX_ELEMS_IE_LIST (BCN_FLT_MAX_SUPPORTED_IES / 32)
4644
4645struct bss_bcn_stats {
4646 __le32 vdev_id;
4647 __le32 bss_bcnsdropped;
4648 __le32 bss_bcnsdelivered;
4649} __packed;
4650
4651struct bcn_filter_stats {
4652 __le32 bcns_dropped;
4653 __le32 bcns_delivered;
4654 __le32 activefilters;
4655 struct bss_bcn_stats bss_stats;
4656} __packed;
4657
4658struct wmi_add_bcn_filter_cmd {
4659 u32 vdev_id;
4660 u32 ie_map[BCN_FLT_MAX_ELEMS_IE_LIST];
4661} __packed;
4662
4663enum wmi_sta_keepalive_method {
4664 WMI_STA_KEEPALIVE_METHOD_NULL_FRAME = 1,
4665 WMI_STA_KEEPALIVE_METHOD_UNSOLICITATED_ARP_RESPONSE = 2,
4666};
4667
4668#define WMI_STA_KEEPALIVE_INTERVAL_DISABLE 0
4669
4670
4671#define WMI_STA_KEEPALIVE_INTERVAL_MAX_SECONDS 0xffff
4672
4673
4674struct wmi_sta_keepalive_arp_resp {
4675 __be32 src_ip4_addr;
4676 __be32 dest_ip4_addr;
4677 struct wmi_mac_addr dest_mac_addr;
4678} __packed;
4679
4680struct wmi_sta_keepalive_cmd {
4681 __le32 vdev_id;
4682 __le32 enabled;
4683 __le32 method;
4684 __le32 interval;
4685 struct wmi_sta_keepalive_arp_resp arp_resp;
4686} __packed;
4687
4688struct wmi_sta_keepalive_arg {
4689 u32 vdev_id;
4690 u32 enabled;
4691 u32 method;
4692 u32 interval;
4693 __be32 src_ip4_addr;
4694 __be32 dest_ip4_addr;
4695 const u8 dest_mac_addr[ETH_ALEN];
4696};
4697
4698enum wmi_force_fw_hang_type {
4699 WMI_FORCE_FW_HANG_ASSERT = 1,
4700 WMI_FORCE_FW_HANG_NO_DETECT,
4701 WMI_FORCE_FW_HANG_CTRL_EP_FULL,
4702 WMI_FORCE_FW_HANG_EMPTY_POINT,
4703 WMI_FORCE_FW_HANG_STACK_OVERFLOW,
4704 WMI_FORCE_FW_HANG_INFINITE_LOOP,
4705};
4706
4707#define WMI_FORCE_FW_HANG_RANDOM_TIME 0xFFFFFFFF
4708
4709struct wmi_force_fw_hang_cmd {
4710 __le32 type;
4711 __le32 delay_ms;
4712} __packed;
4713
4714enum ath10k_dbglog_level {
4715 ATH10K_DBGLOG_LEVEL_VERBOSE = 0,
4716 ATH10K_DBGLOG_LEVEL_INFO = 1,
4717 ATH10K_DBGLOG_LEVEL_WARN = 2,
4718 ATH10K_DBGLOG_LEVEL_ERR = 3,
4719};
4720
4721
4722#define ATH10K_DBGLOG_CFG_VAP_LOG_LSB 0
4723#define ATH10K_DBGLOG_CFG_VAP_LOG_MASK 0x0000ffff
4724
4725
4726#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_LSB 16
4727#define ATH10K_DBGLOG_CFG_REPORTING_ENABLE_MASK 0x00010000
4728
4729
4730#define ATH10K_DBGLOG_CFG_RESOLUTION_LSB 17
4731#define ATH10K_DBGLOG_CFG_RESOLUTION_MASK 0x000E0000
4732
4733
4734#define ATH10K_DBGLOG_CFG_REPORT_SIZE_LSB 20
4735#define ATH10K_DBGLOG_CFG_REPORT_SIZE_MASK 0x0ff00000
4736
4737
4738
4739
4740
4741#define ATH10K_DBGLOG_CFG_LOG_LVL_LSB 28
4742#define ATH10K_DBGLOG_CFG_LOG_LVL_MASK 0x70000000
4743
4744
4745
4746
4747
4748struct wmi_dbglog_cfg_cmd {
4749
4750 __le32 module_enable;
4751
4752
4753 __le32 config_enable;
4754
4755
4756 __le32 module_valid;
4757
4758
4759 __le32 config_valid;
4760} __packed;
4761
4762#define ATH10K_FRAGMT_THRESHOLD_MIN 540
4763#define ATH10K_FRAGMT_THRESHOLD_MAX 2346
4764
4765#define WMI_MAX_EVENT 0x1000
4766
4767#define WMI_SKB_HEADROOM sizeof(struct wmi_cmd_hdr)
4768
4769
4770#define ATH10K_DEFAULT_ATIM 0
4771
4772#define WMI_MAX_MEM_REQS 16
4773
4774struct wmi_scan_ev_arg {
4775 __le32 event_type;
4776 __le32 reason;
4777 __le32 channel_freq;
4778 __le32 scan_req_id;
4779 __le32 scan_id;
4780 __le32 vdev_id;
4781};
4782
4783struct wmi_mgmt_rx_ev_arg {
4784 __le32 channel;
4785 __le32 snr;
4786 __le32 rate;
4787 __le32 phy_mode;
4788 __le32 buf_len;
4789 __le32 status;
4790};
4791
4792struct wmi_ch_info_ev_arg {
4793 __le32 err_code;
4794 __le32 freq;
4795 __le32 cmd_flags;
4796 __le32 noise_floor;
4797 __le32 rx_clear_count;
4798 __le32 cycle_count;
4799};
4800
4801struct wmi_vdev_start_ev_arg {
4802 __le32 vdev_id;
4803 __le32 req_id;
4804 __le32 resp_type;
4805 __le32 status;
4806};
4807
4808struct wmi_peer_kick_ev_arg {
4809 const u8 *mac_addr;
4810};
4811
4812struct wmi_swba_ev_arg {
4813 __le32 vdev_map;
4814 const struct wmi_tim_info *tim_info[WMI_MAX_AP_VDEV];
4815 const struct wmi_p2p_noa_info *noa_info[WMI_MAX_AP_VDEV];
4816};
4817
4818struct wmi_phyerr_ev_arg {
4819 __le32 num_phyerrs;
4820 __le32 tsf_l32;
4821 __le32 tsf_u32;
4822 __le32 buf_len;
4823 const struct wmi_phyerr *phyerrs;
4824};
4825
4826struct wmi_svc_rdy_ev_arg {
4827 __le32 min_tx_power;
4828 __le32 max_tx_power;
4829 __le32 ht_cap;
4830 __le32 vht_cap;
4831 __le32 sw_ver0;
4832 __le32 sw_ver1;
4833 __le32 fw_build;
4834 __le32 phy_capab;
4835 __le32 num_rf_chains;
4836 __le32 eeprom_rd;
4837 __le32 num_mem_reqs;
4838 const __le32 *service_map;
4839 size_t service_map_len;
4840 const struct wlan_host_mem_req *mem_reqs[WMI_MAX_MEM_REQS];
4841};
4842
4843struct wmi_rdy_ev_arg {
4844 __le32 sw_version;
4845 __le32 abi_version;
4846 __le32 status;
4847 const u8 *mac_addr;
4848};
4849
4850struct wmi_pdev_temperature_event {
4851
4852 __le32 temperature;
4853} __packed;
4854
4855struct ath10k;
4856struct ath10k_vif;
4857struct ath10k_fw_stats_pdev;
4858struct ath10k_fw_stats_peer;
4859
4860int ath10k_wmi_attach(struct ath10k *ar);
4861void ath10k_wmi_detach(struct ath10k *ar);
4862int ath10k_wmi_wait_for_service_ready(struct ath10k *ar);
4863int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar);
4864
4865struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
4866int ath10k_wmi_connect(struct ath10k *ar);
4867
4868struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len);
4869int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id);
4870int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
4871 u32 cmd_id);
4872void ath10k_wmi_start_scan_init(struct ath10k *ar, struct wmi_start_scan_arg *);
4873
4874void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
4875 struct ath10k_fw_stats_pdev *dst);
4876void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
4877 struct ath10k_fw_stats_pdev *dst);
4878void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
4879 struct ath10k_fw_stats_pdev *dst);
4880void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
4881 struct ath10k_fw_stats_pdev *dst);
4882void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
4883 struct ath10k_fw_stats_peer *dst);
4884void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
4885 struct wmi_host_mem_chunks *chunks);
4886void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
4887 const struct wmi_start_scan_arg *arg);
4888void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
4889 const struct wmi_wmm_params_arg *arg);
4890void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch,
4891 const struct wmi_channel_arg *arg);
4892int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg);
4893
4894int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb);
4895int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb);
4896void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb);
4897void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb);
4898int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb);
4899void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb);
4900void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb);
4901void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb);
4902void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb);
4903void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb);
4904void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb);
4905void ath10k_wmi_event_dfs(struct ath10k *ar,
4906 const struct wmi_phyerr *phyerr, u64 tsf);
4907void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
4908 const struct wmi_phyerr *phyerr,
4909 u64 tsf);
4910void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb);
4911void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb);
4912void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb);
4913void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb);
4914void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb);
4915void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb);
4916void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4917 struct sk_buff *skb);
4918void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4919 struct sk_buff *skb);
4920void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb);
4921void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb);
4922void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb);
4923void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb);
4924void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb);
4925void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar,
4926 struct sk_buff *skb);
4927void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb);
4928void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb);
4929void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb);
4930void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
4931 struct sk_buff *skb);
4932void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb);
4933void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb);
4934void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb);
4935void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb);
4936int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb);
4937
4938#endif
4939