LXR linux/drivers/staging/dgnc/dpacompat.h

   1/*
   2 * Copyright 2003 Digi International (www.digi.com)
   3 *      Scott H Kilau <Scott_Kilau at digi dot com>
   4 *
   5 * This program is free software; you can redistribute it and/or modify
   6 * it under the terms of the GNU General Public License as published by
   7 * the Free Software Foundation; either version 2, or (at your option)
   8 * any later version.
   9 *
  10 * This program is distributed in the hope that it will be useful,
  11 * but WITHOUT ANY WARRANTY, EXPRESS OR IMPLIED; without even the
  12 * implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  13 * PURPOSE.  See the GNU General Public License for more details.
  14 *
  15 * You should have received a copy of the GNU General Public License
  16 * along with this program; if not, write to the Free Software
  17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  18 *
  19 *      NOTE: THIS IS A SHARED HEADER. DO NOT CHANGE CODING STYLE!!!
  20 */
  21
  22
  23/*
  24 * This structure holds data needed for the intelligent <--> nonintelligent
  25 * DPA translation
  26 */
  27struct ni_info {
  28        int board;
  29        int channel;
  30        int dtr;
  31        int rts;
  32        int cts;
  33        int dsr;
  34        int ri;
  35        int dcd;
  36        int curtx;
  37        int currx;
  38        unsigned short iflag;
  39        unsigned short oflag;
  40        unsigned short cflag;
  41        unsigned short lflag;
  42
  43        unsigned int mstat;
  44        unsigned char hflow;
  45
  46        unsigned char xmit_stopped;
  47        unsigned char recv_stopped;
  48
  49        unsigned int baud;
  50};
  51
  52#define RW_READ         1
  53#define RW_WRITE        2
  54#define DIGI_KME        (('e'<<8) | 98)         /* Read/Write Host */
  55
  56#define SUBTYPE         0007
  57#define T_PCXI          0000
  58#define T_PCXEM         0001
  59#define T_PCXE          0002
  60#define T_PCXR          0003
  61#define T_SP            0004
  62#define T_SP_PLUS       0005
  63
  64#define T_HERC   0000
  65#define T_HOU    0001
  66#define T_LON    0002
  67#define T_CHA    0003
  68
  69#define T_NEO    0000
  70#define T_NEO_EXPRESS  0001
  71#define T_CLASSIC 0002
  72
  73#define FAMILY          0070
  74#define T_COMXI         0000
  75#define T_NI            0000
  76#define T_PCXX          0010
  77#define T_CX            0020
  78#define T_EPC           0030
  79#define T_PCLITE        0040
  80#define T_SPXX          0050
  81#define T_AVXX          0060
  82#define T_DXB           0070
  83#define T_A2K_4_8       0070
  84
  85#define BUSTYPE         0700
  86#define T_ISABUS        0000
  87#define T_MCBUS         0100
  88#define T_EISABUS       0200
  89#define T_PCIBUS        0400
  90
  91/* Board State Definitions */
  92
  93#define BD_RUNNING      0x0
  94#define BD_REASON       0x7f
  95#define BD_NOTFOUND     0x1
  96#define BD_NOIOPORT     0x2
  97#define BD_NOMEM        0x3
  98#define BD_NOBIOS       0x4
  99#define BD_NOFEP        0x5
 100#define BD_FAILED       0x6
 101#define BD_ALLOCATED    0x7
 102#define BD_TRIBOOT      0x8
 103#define BD_BADKME       0x80
 104
 105#define DIGI_AIXON      0x0400          /* Aux flow control in fep */
 106
 107/* Ioctls needed for dpa operation */
 108
 109#define DIGI_GETDD      (('d'<<8) | 248)       /* get driver info      */
 110#define DIGI_GETBD      (('d'<<8) | 249)       /* get board info       */
 111#define DIGI_GET_NI_INFO (('d'<<8) | 250)       /* nonintelligent state snfo */
 112
 113/* Other special ioctls */
 114#define DIGI_TIMERIRQ (('d'<<8) | 251)          /* Enable/disable RS_TIMER use */
 115#define DIGI_LOOPBACK (('d'<<8) | 252)          /* Enable/disable UART internal loopback */
 116