1
2
3
4
5
6
7
8
9
10
11
12#include <linux/console.h>
13#include <linux/module.h>
14#include <linux/slab.h>
15#include <linux/delay.h>
16#include <linux/serial_core.h>
17#include <linux/serial_reg.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20#include <linux/of_platform.h>
21#include <linux/nwpserial.h>
22#include <linux/clk.h>
23
24#include "8250/8250.h"
25
26struct of_serial_info {
27 struct clk *clk;
28 int type;
29 int line;
30};
31
32#ifdef CONFIG_ARCH_TEGRA
33void tegra_serial_handle_break(struct uart_port *p)
34{
35 unsigned int status, tmout = 10000;
36
37 do {
38 status = p->serial_in(p, UART_LSR);
39 if (status & (UART_LSR_FIFOE | UART_LSR_BRK_ERROR_BITS))
40 status = p->serial_in(p, UART_RX);
41 else
42 break;
43 if (--tmout == 0)
44 break;
45 udelay(1);
46 } while (1);
47}
48#else
49static inline void tegra_serial_handle_break(struct uart_port *port)
50{
51}
52#endif
53
54
55
56
57static int of_platform_serial_setup(struct platform_device *ofdev,
58 int type, struct uart_port *port,
59 struct of_serial_info *info)
60{
61 struct resource resource;
62 struct device_node *np = ofdev->dev.of_node;
63 u32 clk, spd, prop;
64 int ret;
65
66 memset(port, 0, sizeof *port);
67 if (of_property_read_u32(np, "clock-frequency", &clk)) {
68
69
70 info->clk = clk_get(&ofdev->dev, NULL);
71 if (IS_ERR(info->clk)) {
72 dev_warn(&ofdev->dev,
73 "clk or clock-frequency not defined\n");
74 return PTR_ERR(info->clk);
75 }
76
77 clk_prepare_enable(info->clk);
78 clk = clk_get_rate(info->clk);
79 }
80
81 if (of_property_read_u32(np, "current-speed", &spd) == 0)
82 port->custom_divisor = clk / (16 * spd);
83
84 ret = of_address_to_resource(np, 0, &resource);
85 if (ret) {
86 dev_warn(&ofdev->dev, "invalid address\n");
87 goto out;
88 }
89
90 spin_lock_init(&port->lock);
91 port->mapbase = resource.start;
92
93
94 if (of_property_read_u32(np, "reg-offset", &prop) == 0)
95 port->mapbase += prop;
96
97
98 if (of_property_read_u32(np, "reg-shift", &prop) == 0)
99 port->regshift = prop;
100
101
102 if (of_property_read_u32(np, "fifo-size", &prop) == 0)
103 port->fifosize = prop;
104
105
106 ret = of_alias_get_id(np, "serial");
107 if (ret >= 0)
108 port->line = ret;
109
110 port->irq = irq_of_parse_and_map(np, 0);
111 port->iotype = UPIO_MEM;
112 if (of_property_read_u32(np, "reg-io-width", &prop) == 0) {
113 switch (prop) {
114 case 1:
115 port->iotype = UPIO_MEM;
116 break;
117 case 4:
118 port->iotype = UPIO_MEM32;
119 break;
120 default:
121 dev_warn(&ofdev->dev, "unsupported reg-io-width (%d)\n",
122 prop);
123 ret = -EINVAL;
124 goto out;
125 }
126 }
127
128 port->type = type;
129 port->uartclk = clk;
130 port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP
131 | UPF_FIXED_PORT | UPF_FIXED_TYPE;
132
133 if (of_find_property(np, "no-loopback-test", NULL))
134 port->flags |= UPF_SKIP_TEST;
135
136 port->dev = &ofdev->dev;
137
138 switch (type) {
139 case PORT_TEGRA:
140 port->handle_break = tegra_serial_handle_break;
141 break;
142
143 case PORT_RT2880:
144 port->iotype = UPIO_AU;
145 break;
146 }
147
148 return 0;
149out:
150 if (info->clk)
151 clk_disable_unprepare(info->clk);
152 return ret;
153}
154
155
156
157
158static struct of_device_id of_platform_serial_table[];
159static int of_platform_serial_probe(struct platform_device *ofdev)
160{
161 const struct of_device_id *match;
162 struct of_serial_info *info;
163 struct uart_port port;
164 int port_type;
165 int ret;
166
167 match = of_match_device(of_platform_serial_table, &ofdev->dev);
168 if (!match)
169 return -EINVAL;
170
171 if (of_find_property(ofdev->dev.of_node, "used-by-rtas", NULL))
172 return -EBUSY;
173
174 info = kzalloc(sizeof(*info), GFP_KERNEL);
175 if (info == NULL)
176 return -ENOMEM;
177
178 port_type = (unsigned long)match->data;
179 ret = of_platform_serial_setup(ofdev, port_type, &port, info);
180 if (ret)
181 goto out;
182
183 switch (port_type) {
184#ifdef CONFIG_SERIAL_8250
185 case PORT_8250 ... PORT_MAX_8250:
186 {
187 struct uart_8250_port port8250;
188 memset(&port8250, 0, sizeof(port8250));
189 port.type = port_type;
190 port8250.port = port;
191
192 if (port.fifosize)
193 port8250.capabilities = UART_CAP_FIFO;
194
195 if (of_property_read_bool(ofdev->dev.of_node,
196 "auto-flow-control"))
197 port8250.capabilities |= UART_CAP_AFE;
198
199 ret = serial8250_register_8250_port(&port8250);
200 break;
201 }
202#endif
203#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
204 case PORT_NWPSERIAL:
205 ret = nwpserial_register_port(&port);
206 break;
207#endif
208 default:
209
210 case PORT_UNKNOWN:
211 dev_info(&ofdev->dev, "Unknown serial port found, ignored\n");
212 ret = -ENODEV;
213 break;
214 }
215 if (ret < 0)
216 goto out;
217
218 info->type = port_type;
219 info->line = ret;
220 platform_set_drvdata(ofdev, info);
221 return 0;
222out:
223 kfree(info);
224 irq_dispose_mapping(port.irq);
225 return ret;
226}
227
228
229
230
231static int of_platform_serial_remove(struct platform_device *ofdev)
232{
233 struct of_serial_info *info = platform_get_drvdata(ofdev);
234 switch (info->type) {
235#ifdef CONFIG_SERIAL_8250
236 case PORT_8250 ... PORT_MAX_8250:
237 serial8250_unregister_port(info->line);
238 break;
239#endif
240#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
241 case PORT_NWPSERIAL:
242 nwpserial_unregister_port(info->line);
243 break;
244#endif
245 default:
246
247 break;
248 }
249
250 if (info->clk)
251 clk_disable_unprepare(info->clk);
252 kfree(info);
253 return 0;
254}
255
256#ifdef CONFIG_PM_SLEEP
257#ifdef CONFIG_SERIAL_8250
258static void of_serial_suspend_8250(struct of_serial_info *info)
259{
260 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
261 struct uart_port *port = &port8250->port;
262
263 serial8250_suspend_port(info->line);
264 if (info->clk && (!uart_console(port) || console_suspend_enabled))
265 clk_disable_unprepare(info->clk);
266}
267
268static void of_serial_resume_8250(struct of_serial_info *info)
269{
270 struct uart_8250_port *port8250 = serial8250_get_port(info->line);
271 struct uart_port *port = &port8250->port;
272
273 if (info->clk && (!uart_console(port) || console_suspend_enabled))
274 clk_prepare_enable(info->clk);
275
276 serial8250_resume_port(info->line);
277}
278#else
279static inline void of_serial_suspend_8250(struct of_serial_info *info)
280{
281}
282
283static inline void of_serial_resume_8250(struct of_serial_info *info)
284{
285}
286#endif
287
288static int of_serial_suspend(struct device *dev)
289{
290 struct of_serial_info *info = dev_get_drvdata(dev);
291
292 switch (info->type) {
293 case PORT_8250 ... PORT_MAX_8250:
294 of_serial_suspend_8250(info);
295 break;
296 default:
297 break;
298 }
299
300 return 0;
301}
302
303static int of_serial_resume(struct device *dev)
304{
305 struct of_serial_info *info = dev_get_drvdata(dev);
306
307 switch (info->type) {
308 case PORT_8250 ... PORT_MAX_8250:
309 of_serial_resume_8250(info);
310 break;
311 default:
312 break;
313 }
314
315 return 0;
316}
317#endif
318static SIMPLE_DEV_PM_OPS(of_serial_pm_ops, of_serial_suspend, of_serial_resume);
319
320
321
322
323static struct of_device_id of_platform_serial_table[] = {
324 { .compatible = "ns8250", .data = (void *)PORT_8250, },
325 { .compatible = "ns16450", .data = (void *)PORT_16450, },
326 { .compatible = "ns16550a", .data = (void *)PORT_16550A, },
327 { .compatible = "ns16550", .data = (void *)PORT_16550, },
328 { .compatible = "ns16750", .data = (void *)PORT_16750, },
329 { .compatible = "ns16850", .data = (void *)PORT_16850, },
330 { .compatible = "nvidia,tegra20-uart", .data = (void *)PORT_TEGRA, },
331 { .compatible = "nxp,lpc3220-uart", .data = (void *)PORT_LPC3220, },
332 { .compatible = "ralink,rt2880-uart", .data = (void *)PORT_RT2880, },
333 { .compatible = "altr,16550-FIFO32",
334 .data = (void *)PORT_ALTR_16550_F32, },
335 { .compatible = "altr,16550-FIFO64",
336 .data = (void *)PORT_ALTR_16550_F64, },
337 { .compatible = "altr,16550-FIFO128",
338 .data = (void *)PORT_ALTR_16550_F128, },
339 { .compatible = "mrvl,mmp-uart",
340 .data = (void *)PORT_XSCALE, },
341 { .compatible = "mrvl,pxa-uart",
342 .data = (void *)PORT_XSCALE, },
343#ifdef CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL
344 { .compatible = "ibm,qpace-nwp-serial",
345 .data = (void *)PORT_NWPSERIAL, },
346#endif
347 { .type = "serial", .data = (void *)PORT_UNKNOWN, },
348 { },
349};
350
351static struct platform_driver of_platform_serial_driver = {
352 .driver = {
353 .name = "of_serial",
354 .of_match_table = of_platform_serial_table,
355 },
356 .probe = of_platform_serial_probe,
357 .remove = of_platform_serial_remove,
358};
359
360module_platform_driver(of_platform_serial_driver);
361
362MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
363MODULE_LICENSE("GPL");
364MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
365
