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35#include <linux/module.h>
36#include <linux/kernel.h>
37#include <linux/sched.h>
38#include <linux/errno.h>
39#include <linux/time.h>
40#include <linux/timer.h>
41
42#include <asm/unaligned.h>
43
44#include "musb_core.h"
45
46void musb_host_finish_resume(struct work_struct *work)
47{
48 struct musb *musb;
49 unsigned long flags;
50 u8 power;
51
52 musb = container_of(work, struct musb, finish_resume_work.work);
53
54 spin_lock_irqsave(&musb->lock, flags);
55
56 power = musb_readb(musb->mregs, MUSB_POWER);
57 power &= ~MUSB_POWER_RESUME;
58 dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
59 power);
60 musb_writeb(musb->mregs, MUSB_POWER, power);
61
62
63
64
65
66
67 musb->is_active = 1;
68 musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | MUSB_PORT_STAT_RESUME);
69 musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
70 usb_hcd_poll_rh_status(musb->hcd);
71
72 musb->xceiv->otg->state = OTG_STATE_A_HOST;
73
74 spin_unlock_irqrestore(&musb->lock, flags);
75}
76
77void musb_port_suspend(struct musb *musb, bool do_suspend)
78{
79 struct usb_otg *otg = musb->xceiv->otg;
80 u8 power;
81 void __iomem *mbase = musb->mregs;
82
83 if (!is_host_active(musb))
84 return;
85
86
87
88
89
90
91 power = musb_readb(mbase, MUSB_POWER);
92 if (do_suspend) {
93 int retries = 10000;
94
95 power &= ~MUSB_POWER_RESUME;
96 power |= MUSB_POWER_SUSPENDM;
97 musb_writeb(mbase, MUSB_POWER, power);
98
99
100 power = musb_readb(mbase, MUSB_POWER);
101 while (power & MUSB_POWER_SUSPENDM) {
102 power = musb_readb(mbase, MUSB_POWER);
103 if (retries-- < 1)
104 break;
105 }
106
107 dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
108
109 musb->port1_status |= USB_PORT_STAT_SUSPEND;
110 switch (musb->xceiv->otg->state) {
111 case OTG_STATE_A_HOST:
112 musb->xceiv->otg->state = OTG_STATE_A_SUSPEND;
113 musb->is_active = otg->host->b_hnp_enable;
114 if (musb->is_active)
115 mod_timer(&musb->otg_timer, jiffies
116 + msecs_to_jiffies(
117 OTG_TIME_A_AIDL_BDIS));
118 musb_platform_try_idle(musb, 0);
119 break;
120 case OTG_STATE_B_HOST:
121 musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON;
122 musb->is_active = otg->host->b_hnp_enable;
123 musb_platform_try_idle(musb, 0);
124 break;
125 default:
126 dev_dbg(musb->controller, "bogus rh suspend? %s\n",
127 usb_otg_state_string(musb->xceiv->otg->state));
128 }
129 } else if (power & MUSB_POWER_SUSPENDM) {
130 power &= ~MUSB_POWER_SUSPENDM;
131 power |= MUSB_POWER_RESUME;
132 musb_writeb(mbase, MUSB_POWER, power);
133
134 dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
135
136
137 musb->port1_status |= MUSB_PORT_STAT_RESUME;
138 schedule_delayed_work(&musb->finish_resume_work,
139 msecs_to_jiffies(20));
140 }
141}
142
143void musb_port_reset(struct musb *musb, bool do_reset)
144{
145 u8 power;
146 void __iomem *mbase = musb->mregs;
147
148 if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) {
149 dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
150 musb->port1_status &= ~USB_PORT_STAT_RESET;
151 return;
152 }
153
154 if (!is_host_active(musb))
155 return;
156
157
158
159
160 power = musb_readb(mbase, MUSB_POWER);
161 if (do_reset) {
162
163
164
165
166
167
168
169 if (power & MUSB_POWER_RESUME) {
170 long remain = (unsigned long) musb->rh_timer - jiffies;
171
172 if (musb->rh_timer > 0 && remain > 0) {
173
174 schedule_delayed_work(
175 &musb->deassert_reset_work, remain);
176 return;
177 }
178
179 musb_writeb(mbase, MUSB_POWER,
180 power & ~MUSB_POWER_RESUME);
181
182
183 schedule_delayed_work(&musb->deassert_reset_work,
184 msecs_to_jiffies(1));
185 return;
186 }
187
188 power &= 0xf0;
189 musb_writeb(mbase, MUSB_POWER,
190 power | MUSB_POWER_RESET);
191
192 musb->port1_status |= USB_PORT_STAT_RESET;
193 musb->port1_status &= ~USB_PORT_STAT_ENABLE;
194 schedule_delayed_work(&musb->deassert_reset_work,
195 msecs_to_jiffies(50));
196 } else {
197 dev_dbg(musb->controller, "root port reset stopped\n");
198 musb_writeb(mbase, MUSB_POWER,
199 power & ~MUSB_POWER_RESET);
200
201 power = musb_readb(mbase, MUSB_POWER);
202 if (power & MUSB_POWER_HSMODE) {
203 dev_dbg(musb->controller, "high-speed device connected\n");
204 musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
205 }
206
207 musb->port1_status &= ~USB_PORT_STAT_RESET;
208 musb->port1_status |= USB_PORT_STAT_ENABLE
209 | (USB_PORT_STAT_C_RESET << 16)
210 | (USB_PORT_STAT_C_ENABLE << 16);
211 usb_hcd_poll_rh_status(musb->hcd);
212
213 musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
214 }
215}
216
217void musb_root_disconnect(struct musb *musb)
218{
219 struct usb_otg *otg = musb->xceiv->otg;
220
221 musb->port1_status = USB_PORT_STAT_POWER
222 | (USB_PORT_STAT_C_CONNECTION << 16);
223
224 usb_hcd_poll_rh_status(musb->hcd);
225 musb->is_active = 0;
226
227 switch (musb->xceiv->otg->state) {
228 case OTG_STATE_A_SUSPEND:
229 if (otg->host->b_hnp_enable) {
230 musb->xceiv->otg->state = OTG_STATE_A_PERIPHERAL;
231 musb->g.is_a_peripheral = 1;
232 break;
233 }
234
235 case OTG_STATE_A_HOST:
236 musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
237 musb->is_active = 0;
238 break;
239 case OTG_STATE_A_WAIT_VFALL:
240 musb->xceiv->otg->state = OTG_STATE_B_IDLE;
241 break;
242 default:
243 dev_dbg(musb->controller, "host disconnect (%s)\n",
244 usb_otg_state_string(musb->xceiv->otg->state));
245 }
246}
247
248
249
250
251
252int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
253{
254 struct musb *musb = hcd_to_musb(hcd);
255 int retval = 0;
256
257
258 if (musb->port1_status & 0xffff0000) {
259 *buf = 0x02;
260 retval = 1;
261 }
262 return retval;
263}
264
265static int musb_has_gadget(struct musb *musb)
266{
267
268
269
270
271
272
273#ifdef CONFIG_USB_MUSB_HOST
274 return 1;
275#else
276 if (musb->port_mode == MUSB_PORT_MODE_HOST)
277 return 1;
278 return musb->g.dev.driver != NULL;
279#endif
280}
281
282int musb_hub_control(
283 struct usb_hcd *hcd,
284 u16 typeReq,
285 u16 wValue,
286 u16 wIndex,
287 char *buf,
288 u16 wLength)
289{
290 struct musb *musb = hcd_to_musb(hcd);
291 u32 temp;
292 int retval = 0;
293 unsigned long flags;
294
295 spin_lock_irqsave(&musb->lock, flags);
296
297 if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
298 spin_unlock_irqrestore(&musb->lock, flags);
299 return -ESHUTDOWN;
300 }
301
302
303
304
305
306 switch (typeReq) {
307 case ClearHubFeature:
308 case SetHubFeature:
309 switch (wValue) {
310 case C_HUB_OVER_CURRENT:
311 case C_HUB_LOCAL_POWER:
312 break;
313 default:
314 goto error;
315 }
316 break;
317 case ClearPortFeature:
318 if ((wIndex & 0xff) != 1)
319 goto error;
320
321 switch (wValue) {
322 case USB_PORT_FEAT_ENABLE:
323 break;
324 case USB_PORT_FEAT_SUSPEND:
325 musb_port_suspend(musb, false);
326 break;
327 case USB_PORT_FEAT_POWER:
328 if (!hcd->self.is_b_host)
329 musb_platform_set_vbus(musb, 0);
330 break;
331 case USB_PORT_FEAT_C_CONNECTION:
332 case USB_PORT_FEAT_C_ENABLE:
333 case USB_PORT_FEAT_C_OVER_CURRENT:
334 case USB_PORT_FEAT_C_RESET:
335 case USB_PORT_FEAT_C_SUSPEND:
336 break;
337 default:
338 goto error;
339 }
340 dev_dbg(musb->controller, "clear feature %d\n", wValue);
341 musb->port1_status &= ~(1 << wValue);
342 break;
343 case GetHubDescriptor:
344 {
345 struct usb_hub_descriptor *desc = (void *)buf;
346
347 desc->bDescLength = 9;
348 desc->bDescriptorType = 0x29;
349 desc->bNbrPorts = 1;
350 desc->wHubCharacteristics = cpu_to_le16(
351 HUB_CHAR_INDV_PORT_LPSM
352 | HUB_CHAR_NO_OCPM
353 );
354 desc->bPwrOn2PwrGood = 5;
355 desc->bHubContrCurrent = 0;
356
357
358 desc->u.hs.DeviceRemovable[0] = 0x02;
359 desc->u.hs.DeviceRemovable[1] = 0xff;
360 }
361 break;
362 case GetHubStatus:
363 temp = 0;
364 *(__le32 *) buf = cpu_to_le32(temp);
365 break;
366 case GetPortStatus:
367 if (wIndex != 1)
368 goto error;
369
370 put_unaligned(cpu_to_le32(musb->port1_status
371 & ~MUSB_PORT_STAT_RESUME),
372 (__le32 *) buf);
373
374
375 dev_dbg(musb->controller, "port status %08x\n",
376 musb->port1_status);
377 break;
378 case SetPortFeature:
379 if ((wIndex & 0xff) != 1)
380 goto error;
381
382 switch (wValue) {
383 case USB_PORT_FEAT_POWER:
384
385
386
387
388
389
390
391
392
393
394 if (!hcd->self.is_b_host && musb_has_gadget(musb))
395 musb_start(musb);
396 break;
397 case USB_PORT_FEAT_RESET:
398 musb_port_reset(musb, true);
399 break;
400 case USB_PORT_FEAT_SUSPEND:
401 musb_port_suspend(musb, true);
402 break;
403 case USB_PORT_FEAT_TEST:
404 if (unlikely(is_host_active(musb)))
405 goto error;
406
407 wIndex >>= 8;
408 switch (wIndex) {
409 case 1:
410 pr_debug("TEST_J\n");
411 temp = MUSB_TEST_J;
412 break;
413 case 2:
414 pr_debug("TEST_K\n");
415 temp = MUSB_TEST_K;
416 break;
417 case 3:
418 pr_debug("TEST_SE0_NAK\n");
419 temp = MUSB_TEST_SE0_NAK;
420 break;
421 case 4:
422 pr_debug("TEST_PACKET\n");
423 temp = MUSB_TEST_PACKET;
424 musb_load_testpacket(musb);
425 break;
426 case 5:
427 pr_debug("TEST_FORCE_ENABLE\n");
428 temp = MUSB_TEST_FORCE_HOST
429 | MUSB_TEST_FORCE_HS;
430
431 musb_writeb(musb->mregs, MUSB_DEVCTL,
432 MUSB_DEVCTL_SESSION);
433 break;
434 case 6:
435 pr_debug("TEST_FIFO_ACCESS\n");
436 temp = MUSB_TEST_FIFO_ACCESS;
437 break;
438 default:
439 goto error;
440 }
441 musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
442 break;
443 default:
444 goto error;
445 }
446 dev_dbg(musb->controller, "set feature %d\n", wValue);
447 musb->port1_status |= 1 << wValue;
448 break;
449
450 default:
451error:
452
453 retval = -EPIPE;
454 }
455 spin_unlock_irqrestore(&musb->lock, flags);
456 return retval;
457}
458