LXR linux/arch/arm/mach-socfpga/platsmp.c

   1/*
   2 * Copyright 2010-2011 Calxeda, Inc.
   3 * Copyright 2012 Pavel Machek <pavel@denx.de>
   4 * Based on platsmp.c, Copyright (C) 2002 ARM Ltd.
   5 * Copyright (C) 2012 Altera Corporation
   6 *
   7 * This program is free software; you can redistribute it and/or modify it
   8 * under the terms and conditions of the GNU General Public License,
   9 * version 2, as published by the Free Software Foundation.
  10 *
  11 * This program is distributed in the hope it will be useful, but WITHOUT
  12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 * more details.
  15 *
  16 * You should have received a copy of the GNU General Public License along with
  17 * this program.  If not, see <http://www.gnu.org/licenses/>.
  18 */
  19#include <linux/delay.h>
  20#include <linux/init.h>
  21#include <linux/smp.h>
  22#include <linux/io.h>
  23#include <linux/of.h>
  24#include <linux/of_address.h>
  25
  26#include <asm/cacheflush.h>
  27#include <asm/smp_scu.h>
  28#include <asm/smp_plat.h>
  29
  30#include "core.h"
  31
  32static int socfpga_boot_secondary(unsigned int cpu, struct task_struct *idle)
  33{
  34        int trampoline_size = &secondary_trampoline_end - &secondary_trampoline;
  35
  36        if (socfpga_cpu1start_addr) {
  37                /* This will put CPU #1 into reset. */
  38                writel(RSTMGR_MPUMODRST_CPU1,
  39                       rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
  40
  41                memcpy(phys_to_virt(0), &secondary_trampoline, trampoline_size);
  42
  43                writel(virt_to_phys(socfpga_secondary_startup),
  44                       sys_manager_base_addr + (socfpga_cpu1start_addr & 0x000000ff));
  45
  46                flush_cache_all();
  47                smp_wmb();
  48                outer_clean_range(0, trampoline_size);
  49
  50                /* This will release CPU #1 out of reset. */
  51                writel(0, rst_manager_base_addr + SOCFPGA_RSTMGR_MODMPURST);
  52        }
  53
  54        return 0;
  55}
  56
  57/*
  58 * Initialise the CPU possible map early - this describes the CPUs
  59 * which may be present or become present in the system.
  60 */
  61static void __init socfpga_smp_init_cpus(void)
  62{
  63        unsigned int i, ncores;
  64
  65        ncores = scu_get_core_count(socfpga_scu_base_addr);
  66
  67        for (i = 0; i < ncores; i++)
  68                set_cpu_possible(i, true);
  69
  70        /* sanity check */
  71        if (ncores > num_possible_cpus()) {
  72                pr_warn("socfpga: no. of cores (%d) greater than configured"
  73                        "maximum of %d - clipping\n", ncores, num_possible_cpus());
  74                ncores = num_possible_cpus();
  75        }
  76
  77        for (i = 0; i < ncores; i++)
  78                set_cpu_possible(i, true);
  79}
  80
  81static void __init socfpga_smp_prepare_cpus(unsigned int max_cpus)
  82{
  83        scu_enable(socfpga_scu_base_addr);
  84}
  85
  86/*
  87 * platform-specific code to shutdown a CPU
  88 *
  89 * Called with IRQs disabled
  90 */
  91static void socfpga_cpu_die(unsigned int cpu)
  92{
  93        /* Do WFI. If we wake up early, go back into WFI */
  94        while (1)
  95                cpu_do_idle();
  96}
  97
  98struct smp_operations socfpga_smp_ops __initdata = {
  99        .smp_init_cpus          = socfpga_smp_init_cpus,
 100        .smp_prepare_cpus       = socfpga_smp_prepare_cpus,
 101        .smp_boot_secondary     = socfpga_boot_secondary,
 102#ifdef CONFIG_HOTPLUG_CPU
 103        .cpu_die                = socfpga_cpu_die,
 104#endif
 105};
 106