1#ifndef _ASM_ARCH_CRIS_IO_H
2#define _ASM_ARCH_CRIS_IO_H
3
4
5
6extern unsigned long gen_config_ii_shadow;
7extern unsigned long port_g_data_shadow;
8extern unsigned char port_pa_dir_shadow;
9extern unsigned char port_pa_data_shadow;
10extern unsigned char port_pb_i2c_shadow;
11extern unsigned char port_pb_config_shadow;
12extern unsigned char port_pb_dir_shadow;
13extern unsigned char port_pb_data_shadow;
14extern unsigned long r_timer_ctrl_shadow;
15
16extern unsigned long port_cse1_shadow;
17extern unsigned long port_csp0_shadow;
18extern unsigned long port_csp4_shadow;
19
20extern volatile unsigned long *port_cse1_addr;
21extern volatile unsigned long *port_csp0_addr;
22extern volatile unsigned long *port_csp4_addr;
23
24
25
26
27
28
29
30
31#define REG_SHADOW_SET(r,s,b,v) *r = s = (s & ~(1 << (b))) | ((v) << (b))
32
33
34
35#if defined(CONFIG_ETRAX_NO_LEDS)
36#undef CONFIG_ETRAX_PA_LEDS
37#undef CONFIG_ETRAX_PB_LEDS
38#undef CONFIG_ETRAX_CSP0_LEDS
39#define CRIS_LED_NETWORK_SET_G(x)
40#define CRIS_LED_NETWORK_SET_R(x)
41#define CRIS_LED_ACTIVE_SET_G(x)
42#define CRIS_LED_ACTIVE_SET_R(x)
43#define CRIS_LED_DISK_WRITE(x)
44#define CRIS_LED_DISK_READ(x)
45#endif
46
47#if !defined(CONFIG_ETRAX_CSP0_LEDS)
48#define CRIS_LED_BIT_SET(x)
49#define CRIS_LED_BIT_CLR(x)
50#endif
51
52#define CRIS_LED_OFF 0x00
53#define CRIS_LED_GREEN 0x01
54#define CRIS_LED_RED 0x02
55#define CRIS_LED_ORANGE (CRIS_LED_GREEN | CRIS_LED_RED)
56
57#if defined(CONFIG_ETRAX_NO_LEDS)
58#define CRIS_LED_NETWORK_SET(x)
59#else
60#if CONFIG_ETRAX_LED1G == CONFIG_ETRAX_LED1R
61#define CRIS_LED_NETWORK_SET(x) \
62 do { \
63 CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
64 } while (0)
65#else
66#define CRIS_LED_NETWORK_SET(x) \
67 do { \
68 CRIS_LED_NETWORK_SET_G((x) & CRIS_LED_GREEN); \
69 CRIS_LED_NETWORK_SET_R((x) & CRIS_LED_RED); \
70 } while (0)
71#endif
72#if CONFIG_ETRAX_LED2G == CONFIG_ETRAX_LED2R
73#define CRIS_LED_ACTIVE_SET(x) \
74 do { \
75 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
76 } while (0)
77#else
78#define CRIS_LED_ACTIVE_SET(x) \
79 do { \
80 CRIS_LED_ACTIVE_SET_G((x) & CRIS_LED_GREEN); \
81 CRIS_LED_ACTIVE_SET_R((x) & CRIS_LED_RED); \
82 } while (0)
83#endif
84#endif
85
86#ifdef CONFIG_ETRAX_PA_LEDS
87#define CRIS_LED_NETWORK_SET_G(x) \
88 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1G, !(x))
89#define CRIS_LED_NETWORK_SET_R(x) \
90 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED1R, !(x))
91#define CRIS_LED_ACTIVE_SET_G(x) \
92 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2G, !(x))
93#define CRIS_LED_ACTIVE_SET_R(x) \
94 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED2R, !(x))
95#define CRIS_LED_DISK_WRITE(x) \
96 do{\
97 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
98 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
99 }while(0)
100#define CRIS_LED_DISK_READ(x) \
101 REG_SHADOW_SET(R_PORT_PA_DATA, port_pa_data_shadow, \
102 CONFIG_ETRAX_LED3G, !(x))
103#endif
104
105#ifdef CONFIG_ETRAX_PB_LEDS
106#define CRIS_LED_NETWORK_SET_G(x) \
107 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1G, !(x))
108#define CRIS_LED_NETWORK_SET_R(x) \
109 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED1R, !(x))
110#define CRIS_LED_ACTIVE_SET_G(x) \
111 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2G, !(x))
112#define CRIS_LED_ACTIVE_SET_R(x) \
113 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED2R, !(x))
114#define CRIS_LED_DISK_WRITE(x) \
115 do{\
116 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3G, !(x));\
117 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, CONFIG_ETRAX_LED3R, !(x));\
118 }while(0)
119#define CRIS_LED_DISK_READ(x) \
120 REG_SHADOW_SET(R_PORT_PB_DATA, port_pb_data_shadow, \
121 CONFIG_ETRAX_LED3G, !(x))
122#endif
123
124#ifdef CONFIG_ETRAX_CSP0_LEDS
125#define CONFIGURABLE_LEDS\
126 ((1 << CONFIG_ETRAX_LED1G ) | (1 << CONFIG_ETRAX_LED1R ) |\
127 (1 << CONFIG_ETRAX_LED2G ) | (1 << CONFIG_ETRAX_LED2R ) |\
128 (1 << CONFIG_ETRAX_LED3G ) | (1 << CONFIG_ETRAX_LED3R ) |\
129 (1 << CONFIG_ETRAX_LED4G ) | (1 << CONFIG_ETRAX_LED4R ) |\
130 (1 << CONFIG_ETRAX_LED5G ) | (1 << CONFIG_ETRAX_LED5R ) |\
131 (1 << CONFIG_ETRAX_LED6G ) | (1 << CONFIG_ETRAX_LED6R ) |\
132 (1 << CONFIG_ETRAX_LED7G ) | (1 << CONFIG_ETRAX_LED7R ) |\
133 (1 << CONFIG_ETRAX_LED8Y ) | (1 << CONFIG_ETRAX_LED9Y ) |\
134 (1 << CONFIG_ETRAX_LED10Y ) |(1 << CONFIG_ETRAX_LED11Y )|\
135 (1 << CONFIG_ETRAX_LED12R ))
136
137#define CRIS_LED_NETWORK_SET_G(x) \
138 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1G, !(x))
139#define CRIS_LED_NETWORK_SET_R(x) \
140 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED1R, !(x))
141#define CRIS_LED_ACTIVE_SET_G(x) \
142 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2G, !(x))
143#define CRIS_LED_ACTIVE_SET_R(x) \
144 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED2R, !(x))
145#define CRIS_LED_DISK_WRITE(x) \
146 do{\
147 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x));\
148 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3R, !(x));\
149 }while(0)
150#define CRIS_LED_DISK_READ(x) \
151 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_LED3G, !(x))
152#define CRIS_LED_BIT_SET(x)\
153 do{\
154 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
155 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 1);\
156 }while(0)
157#define CRIS_LED_BIT_CLR(x)\
158 do{\
159 if((( 1 << x) & CONFIGURABLE_LEDS) != 0)\
160 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, x, 0);\
161 }while(0)
162#endif
163
164#
165#ifdef CONFIG_ETRAX_SOFT_SHUTDOWN
166#define SOFT_SHUTDOWN() \
167 REG_SHADOW_SET(port_csp0_addr, port_csp0_shadow, CONFIG_ETRAX_SHUTDOWN_BIT, 1)
168#else
169#define SOFT_SHUTDOWN()
170#endif
171
172#endif
173
