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13#ifndef _ASM_PROCESSOR_H
14#define _ASM_PROCESSOR_H
15
16#include <linux/threads.h>
17#include <linux/thread_info.h>
18#include <asm/page.h>
19#include <asm/ptrace.h>
20#include <asm/cpu-regs.h>
21#include <asm/uaccess.h>
22#include <asm/current.h>
23
24
25struct task_struct;
26struct mm_struct;
27
28
29
30
31
32#define current_text_addr() \
33({ \
34 void *__pc; \
35 asm("mov pc,%0" : "=a"(__pc)); \
36 __pc; \
37})
38
39extern void get_mem_info(unsigned long *mem_base, unsigned long *mem_size);
40
41extern void show_registers(struct pt_regs *regs);
42
43
44
45
46
47
48
49struct mn10300_cpuinfo {
50 int type;
51 unsigned long loops_per_jiffy;
52 char hard_math;
53};
54
55extern struct mn10300_cpuinfo boot_cpu_data;
56
57#ifdef CONFIG_SMP
58#if CONFIG_NR_CPUS < 2 || CONFIG_NR_CPUS > 8
59# error Sorry, NR_CPUS should be 2 to 8
60#endif
61extern struct mn10300_cpuinfo cpu_data[];
62#define current_cpu_data cpu_data[smp_processor_id()]
63#else
64#define cpu_data &boot_cpu_data
65#define current_cpu_data boot_cpu_data
66#endif
67
68extern void identify_cpu(struct mn10300_cpuinfo *);
69extern void print_cpu_info(struct mn10300_cpuinfo *);
70extern void dodgy_tsc(void);
71
72#define cpu_relax() barrier()
73#define cpu_relax_lowlatency() cpu_relax()
74
75
76
77
78#define TASK_SIZE 0x70000000
79
80
81
82
83#define STACK_TOP 0x70000000
84#define STACK_TOP_MAX STACK_TOP
85
86
87
88
89#define TASK_UNMAPPED_BASE 0x30000000
90
91struct fpu_state_struct {
92 unsigned long fs[32];
93 unsigned long fpcr;
94};
95
96struct thread_struct {
97 struct pt_regs *uregs;
98 unsigned long pc;
99 unsigned long sp;
100 unsigned long a3;
101 unsigned long wchan;
102 unsigned long usp;
103 unsigned long fpu_flags;
104#define THREAD_USING_FPU 0x00000001
105#define THREAD_HAS_FPU 0x00000002
106 struct fpu_state_struct fpu_state;
107};
108
109#define INIT_THREAD \
110{ \
111 .uregs = init_uregs, \
112 .pc = 0, \
113 .sp = 0, \
114 .a3 = 0, \
115 .wchan = 0, \
116}
117
118#define INIT_MMAP \
119{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, \
120 NULL, NULL }
121
122
123
124
125static inline void start_thread(struct pt_regs *regs,
126 unsigned long new_pc, unsigned long new_sp)
127{
128 regs->epsw = EPSW_nSL | EPSW_IE | EPSW_IM;
129 regs->pc = new_pc;
130 regs->sp = new_sp;
131}
132
133
134
135extern void release_thread(struct task_struct *);
136
137
138
139
140extern unsigned long thread_saved_pc(struct task_struct *tsk);
141
142unsigned long get_wchan(struct task_struct *p);
143
144#define task_pt_regs(task) ((task)->thread.uregs)
145#define KSTK_EIP(task) (task_pt_regs(task)->pc)
146#define KSTK_ESP(task) (task_pt_regs(task)->sp)
147
148#define KSTK_TOP(info) \
149({ \
150 (unsigned long)(info) + THREAD_SIZE; \
151})
152
153#define ARCH_HAS_PREFETCH
154#define ARCH_HAS_PREFETCHW
155
156static inline void prefetch(const void *x)
157{
158#ifdef CONFIG_MN10300_CACHE_ENABLED
159#ifdef CONFIG_MN10300_PROC_MN103E010
160 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
161#else
162 asm volatile ("dcpf (%0)" : : "r"(x));
163#endif
164#endif
165}
166
167static inline void prefetchw(const void *x)
168{
169#ifdef CONFIG_MN10300_CACHE_ENABLED
170#ifdef CONFIG_MN10300_PROC_MN103E010
171 asm volatile ("nop; nop; dcpf (%0)" : : "r"(x));
172#else
173 asm volatile ("dcpf (%0)" : : "r"(x));
174#endif
175#endif
176}
177
178#endif
179