1#ifndef _ASM_X86_ATOMIC_H
2#define _ASM_X86_ATOMIC_H
3
4#include <linux/compiler.h>
5#include <linux/types.h>
6#include <asm/processor.h>
7#include <asm/alternative.h>
8#include <asm/cmpxchg.h>
9#include <asm/rmwcc.h>
10#include <asm/barrier.h>
11
12
13
14
15
16
17#define ATOMIC_INIT(i) { (i) }
18
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23
24
25static inline int atomic_read(const atomic_t *v)
26{
27 return ACCESS_ONCE((v)->counter);
28}
29
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35
36
37static inline void atomic_set(atomic_t *v, int i)
38{
39 v->counter = i;
40}
41
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45
46
47
48
49static inline void atomic_add(int i, atomic_t *v)
50{
51 asm volatile(LOCK_PREFIX "addl %1,%0"
52 : "+m" (v->counter)
53 : "ir" (i));
54}
55
56
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61
62
63static inline void atomic_sub(int i, atomic_t *v)
64{
65 asm volatile(LOCK_PREFIX "subl %1,%0"
66 : "+m" (v->counter)
67 : "ir" (i));
68}
69
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77
78
79static inline int atomic_sub_and_test(int i, atomic_t *v)
80{
81 GEN_BINARY_RMWcc(LOCK_PREFIX "subl", v->counter, "er", i, "%0", "e");
82}
83
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88
89
90static inline void atomic_inc(atomic_t *v)
91{
92 asm volatile(LOCK_PREFIX "incl %0"
93 : "+m" (v->counter));
94}
95
96
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99
100
101
102static inline void atomic_dec(atomic_t *v)
103{
104 asm volatile(LOCK_PREFIX "decl %0"
105 : "+m" (v->counter));
106}
107
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114
115
116static inline int atomic_dec_and_test(atomic_t *v)
117{
118 GEN_UNARY_RMWcc(LOCK_PREFIX "decl", v->counter, "%0", "e");
119}
120
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127
128
129static inline int atomic_inc_and_test(atomic_t *v)
130{
131 GEN_UNARY_RMWcc(LOCK_PREFIX "incl", v->counter, "%0", "e");
132}
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142
143static inline int atomic_add_negative(int i, atomic_t *v)
144{
145 GEN_BINARY_RMWcc(LOCK_PREFIX "addl", v->counter, "er", i, "%0", "s");
146}
147
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154
155static inline int atomic_add_return(int i, atomic_t *v)
156{
157 return i + xadd(&v->counter, i);
158}
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165
166
167static inline int atomic_sub_return(int i, atomic_t *v)
168{
169 return atomic_add_return(-i, v);
170}
171
172#define atomic_inc_return(v) (atomic_add_return(1, v))
173#define atomic_dec_return(v) (atomic_sub_return(1, v))
174
175static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
176{
177 return cmpxchg(&v->counter, old, new);
178}
179
180static inline int atomic_xchg(atomic_t *v, int new)
181{
182 return xchg(&v->counter, new);
183}
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192
193
194static inline int __atomic_add_unless(atomic_t *v, int a, int u)
195{
196 int c, old;
197 c = atomic_read(v);
198 for (;;) {
199 if (unlikely(c == (u)))
200 break;
201 old = atomic_cmpxchg((v), c, c + (a));
202 if (likely(old == c))
203 break;
204 c = old;
205 }
206 return c;
207}
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214
215
216static inline short int atomic_inc_short(short int *v)
217{
218 asm(LOCK_PREFIX "addw $1, %0" : "+m" (*v));
219 return *v;
220}
221
222
223#define atomic_clear_mask(mask, addr) \
224 asm volatile(LOCK_PREFIX "andl %0,%1" \
225 : : "r" (~(mask)), "m" (*(addr)) : "memory")
226
227#define atomic_set_mask(mask, addr) \
228 asm volatile(LOCK_PREFIX "orl %0,%1" \
229 : : "r" ((unsigned)(mask)), "m" (*(addr)) \
230 : "memory")
231
232#ifdef CONFIG_X86_32
233# include <asm/atomic64_32.h>
234#else
235# include <asm/atomic64_64.h>
236#endif
237
238#endif
239