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11#ifndef _XTENSA_PROCESSOR_H
12#define _XTENSA_PROCESSOR_H
13
14#include <variant/core.h>
15#include <platform/hardware.h>
16
17#include <linux/compiler.h>
18#include <asm/ptrace.h>
19#include <asm/types.h>
20#include <asm/regs.h>
21
22
23
24#if (XCHAL_HAVE_WINDOWED != 1)
25# error Linux requires the Xtensa Windowed Registers Option.
26#endif
27
28#define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH
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36
37
38#ifdef CONFIG_MMU
39#define TASK_SIZE __XTENSA_UL_CONST(0x40000000)
40#else
41#define TASK_SIZE (PLATFORM_DEFAULT_MEM_START + PLATFORM_DEFAULT_MEM_SIZE)
42#endif
43
44#define STACK_TOP TASK_SIZE
45#define STACK_TOP_MAX STACK_TOP
46
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53
54
55
56#define EXCCAUSE_MAPPED_DEBUG 63
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64
65
66#define VALID_DOUBLE_EXCEPTION_ADDRESS 64
67
68
69
70
71#define LOCKLEVEL XCHAL_EXCM_LEVEL
72
73
74
75
76#define WSBITS (XCHAL_NUM_AREGS / 4)
77#define WBBITS (XCHAL_NUM_AREGS_LOG2 - 2)
78
79#ifndef __ASSEMBLY__
80
81
82
83
84#define MAKE_RA_FOR_CALL(ra,ws) (((ra) & 0x3fffffff) | (ws) << 30)
85
86
87
88
89#define MAKE_PC_FROM_RA(ra,sp) (((ra) & 0x3fffffff) | ((sp) & 0xc0000000))
90
91typedef struct {
92 unsigned long seg;
93} mm_segment_t;
94
95struct thread_struct {
96
97
98 unsigned long ra;
99 unsigned long sp;
100
101 mm_segment_t current_ds;
102
103
104
105 unsigned long bad_vaddr;
106 unsigned long bad_uaddr;
107 unsigned long error_code;
108
109 unsigned long ibreak[XCHAL_NUM_IBREAK];
110 unsigned long dbreaka[XCHAL_NUM_DBREAK];
111 unsigned long dbreakc[XCHAL_NUM_DBREAK];
112
113
114 int align[0] __attribute__ ((aligned(16)));
115};
116
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119
120
121
122#define current_text_addr() ({ __label__ _l; _l: &&_l;})
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126
127
128#define TASK_UNMAPPED_BASE (TASK_SIZE / 2)
129
130#define INIT_THREAD \
131{ \
132 ra: 0, \
133 sp: sizeof(init_stack) + (long) &init_stack, \
134 current_ds: {0}, \
135 \
136 bad_vaddr: 0, \
137 bad_uaddr: 0, \
138 error_code: 0, \
139}
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146
147#define USER_PS_VALUE ((1 << PS_WOE_BIT) | \
148 (1 << PS_CALLINC_SHIFT) | \
149 (USER_RING << PS_RING_SHIFT) | \
150 (1 << PS_UM_BIT) | \
151 (1 << PS_EXCM_BIT))
152
153
154#define start_thread(regs, new_pc, new_sp) \
155 memset(regs, 0, sizeof(*regs)); \
156 regs->pc = new_pc; \
157 regs->ps = USER_PS_VALUE; \
158 regs->areg[1] = new_sp; \
159 regs->areg[0] = 0; \
160 regs->wmask = 1; \
161 regs->depc = 0; \
162 regs->windowbase = 0; \
163 regs->windowstart = 1;
164
165
166struct task_struct;
167struct mm_struct;
168
169
170#define release_thread(thread) do { } while(0)
171
172
173#define copy_segments(p, mm) do { } while(0)
174#define release_segments(mm) do { } while(0)
175#define forget_segments() do { } while (0)
176
177#define thread_saved_pc(tsk) (task_pt_regs(tsk)->pc)
178
179extern unsigned long get_wchan(struct task_struct *p);
180
181#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
182#define KSTK_ESP(tsk) (task_pt_regs(tsk)->areg[1])
183
184#define cpu_relax() barrier()
185#define cpu_relax_lowlatency() cpu_relax()
186
187
188
189#define WSR(v,sr) __asm__ __volatile__ ("wsr %0,"__stringify(sr) :: "a"(v));
190#define RSR(v,sr) __asm__ __volatile__ ("rsr %0,"__stringify(sr) : "=a"(v));
191
192#define set_sr(x,sr) ({unsigned int v=(unsigned int)x; WSR(v,sr);})
193#define get_sr(sr) ({unsigned int v; RSR(v,sr); v; })
194
195#ifndef XCHAL_HAVE_EXTERN_REGS
196#define XCHAL_HAVE_EXTERN_REGS 0
197#endif
198
199#if XCHAL_HAVE_EXTERN_REGS
200
201static inline void set_er(unsigned long value, unsigned long addr)
202{
203 asm volatile ("wer %0, %1" : : "a" (value), "a" (addr) : "memory");
204}
205
206static inline unsigned long get_er(unsigned long addr)
207{
208 register unsigned long value;
209 asm volatile ("rer %0, %1" : "=a" (value) : "a" (addr) : "memory");
210 return value;
211}
212
213#endif
214
215#endif
216#endif
217