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14#include <linux/init.h>
15#include <linux/irq.h>
16#include <linux/interrupt.h>
17#include <linux/jiffies.h>
18#include <linux/clockchips.h>
19#include <linux/types.h>
20#include <linux/clk.h>
21
22#include <linux/io.h>
23#include <asm/mach/time.h>
24
25#include <linux/of.h>
26#include <linux/of_address.h>
27#include <linux/of_irq.h>
28
29
30#define KONA_GPTIMER_STCS_OFFSET 0x00000000
31#define KONA_GPTIMER_STCLO_OFFSET 0x00000004
32#define KONA_GPTIMER_STCHI_OFFSET 0x00000008
33#define KONA_GPTIMER_STCM0_OFFSET 0x0000000C
34
35#define KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT 0
36#define KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT 4
37
38struct kona_bcm_timers {
39 int tmr_irq;
40 void __iomem *tmr_regs;
41};
42
43static struct kona_bcm_timers timers;
44
45static u32 arch_timer_rate;
46
47
48
49
50
51static void kona_timer_disable_and_clear(void __iomem *base)
52{
53 uint32_t reg;
54
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59 reg = readl(base + KONA_GPTIMER_STCS_OFFSET);
60
61
62 reg |= 1 << KONA_GPTIMER_STCS_TIMER_MATCH_SHIFT;
63
64 reg &= ~(1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
65
66 writel(reg, base + KONA_GPTIMER_STCS_OFFSET);
67
68}
69
70static void
71kona_timer_get_counter(void __iomem *timer_base, uint32_t *msw, uint32_t *lsw)
72{
73 int loop_limit = 4;
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86
87 while (--loop_limit) {
88 *msw = readl(timer_base + KONA_GPTIMER_STCHI_OFFSET);
89 *lsw = readl(timer_base + KONA_GPTIMER_STCLO_OFFSET);
90 if (*msw == readl(timer_base + KONA_GPTIMER_STCHI_OFFSET))
91 break;
92 }
93 if (!loop_limit) {
94 pr_err("bcm_kona_timer: getting counter failed.\n");
95 pr_err(" Timer will be impacted\n");
96 }
97
98 return;
99}
100
101static int kona_timer_set_next_event(unsigned long clc,
102 struct clock_event_device *unused)
103{
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113
114 uint32_t lsw, msw;
115 uint32_t reg;
116
117 kona_timer_get_counter(timers.tmr_regs, &msw, &lsw);
118
119
120 writel(lsw + clc, timers.tmr_regs + KONA_GPTIMER_STCM0_OFFSET);
121
122
123 reg = readl(timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
124 reg |= (1 << KONA_GPTIMER_STCS_COMPARE_ENABLE_SHIFT);
125 writel(reg, timers.tmr_regs + KONA_GPTIMER_STCS_OFFSET);
126
127 return 0;
128}
129
130static void kona_timer_set_mode(enum clock_event_mode mode,
131 struct clock_event_device *unused)
132{
133 switch (mode) {
134 case CLOCK_EVT_MODE_ONESHOT:
135
136 break;
137 case CLOCK_EVT_MODE_UNUSED:
138 case CLOCK_EVT_MODE_SHUTDOWN:
139 default:
140 kona_timer_disable_and_clear(timers.tmr_regs);
141 }
142}
143
144static struct clock_event_device kona_clockevent_timer = {
145 .name = "timer 1",
146 .features = CLOCK_EVT_FEAT_ONESHOT,
147 .set_next_event = kona_timer_set_next_event,
148 .set_mode = kona_timer_set_mode
149};
150
151static void __init kona_timer_clockevents_init(void)
152{
153 kona_clockevent_timer.cpumask = cpumask_of(0);
154 clockevents_config_and_register(&kona_clockevent_timer,
155 arch_timer_rate, 6, 0xffffffff);
156}
157
158static irqreturn_t kona_timer_interrupt(int irq, void *dev_id)
159{
160 struct clock_event_device *evt = &kona_clockevent_timer;
161
162 kona_timer_disable_and_clear(timers.tmr_regs);
163 evt->event_handler(evt);
164 return IRQ_HANDLED;
165}
166
167static struct irqaction kona_timer_irq = {
168 .name = "Kona Timer Tick",
169 .flags = IRQF_TIMER,
170 .handler = kona_timer_interrupt,
171};
172
173static void __init kona_timer_init(struct device_node *node)
174{
175 u32 freq;
176 struct clk *external_clk;
177
178 if (!of_device_is_available(node)) {
179 pr_info("Kona Timer v1 marked as disabled in device tree\n");
180 return;
181 }
182
183 external_clk = of_clk_get_by_name(node, NULL);
184
185 if (!IS_ERR(external_clk)) {
186 arch_timer_rate = clk_get_rate(external_clk);
187 clk_prepare_enable(external_clk);
188 } else if (!of_property_read_u32(node, "clock-frequency", &freq)) {
189 arch_timer_rate = freq;
190 } else {
191 pr_err("Kona Timer v1 unable to determine clock-frequency");
192 return;
193 }
194
195
196 timers.tmr_irq = irq_of_parse_and_map(node, 0);
197
198
199 timers.tmr_regs = of_iomap(node, 0);
200
201 kona_timer_disable_and_clear(timers.tmr_regs);
202
203 kona_timer_clockevents_init();
204 setup_irq(timers.tmr_irq, &kona_timer_irq);
205 kona_timer_set_next_event((arch_timer_rate / HZ), NULL);
206}
207
208CLOCKSOURCE_OF_DECLARE(brcm_kona, "brcm,kona-timer", kona_timer_init);
209
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213CLOCKSOURCE_OF_DECLARE(bcm_kona, "bcm,kona-timer", kona_timer_init);
214