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47#ifndef ADF_ACCEL_DEVICES_H_
48#define ADF_ACCEL_DEVICES_H_
49#include <linux/module.h>
50#include <linux/list.h>
51#include <linux/proc_fs.h>
52#include <linux/io.h>
53#include "adf_cfg_common.h"
54
55#define ADF_DH895XCC_DEVICE_NAME "dh895xcc"
56#define ADF_DH895XCC_PCI_DEVICE_ID 0x435
57#define ADF_PCI_MAX_BARS 3
58#define ADF_DEVICE_NAME_LENGTH 32
59#define ADF_ETR_MAX_RINGS_PER_BANK 16
60#define ADF_MAX_MSIX_VECTOR_NAME 16
61#define ADF_DEVICE_NAME_PREFIX "qat_"
62
63enum adf_accel_capabilities {
64 ADF_ACCEL_CAPABILITIES_NULL = 0,
65 ADF_ACCEL_CAPABILITIES_CRYPTO_SYMMETRIC = 1,
66 ADF_ACCEL_CAPABILITIES_CRYPTO_ASYMMETRIC = 2,
67 ADF_ACCEL_CAPABILITIES_CIPHER = 4,
68 ADF_ACCEL_CAPABILITIES_AUTHENTICATION = 8,
69 ADF_ACCEL_CAPABILITIES_COMPRESSION = 32,
70 ADF_ACCEL_CAPABILITIES_LZS_COMPRESSION = 64,
71 ADF_ACCEL_CAPABILITIES_RANDOM_NUMBER = 128
72};
73
74struct adf_bar {
75 resource_size_t base_addr;
76 void __iomem *virt_addr;
77 resource_size_t size;
78} __packed;
79
80struct adf_accel_msix {
81 struct msix_entry *entries;
82 char **names;
83} __packed;
84
85struct adf_accel_pci {
86 struct pci_dev *pci_dev;
87 struct adf_accel_msix msix_entries;
88 struct adf_bar pci_bars[ADF_PCI_MAX_BARS];
89 uint8_t revid;
90 uint8_t sku;
91} __packed;
92
93enum dev_state {
94 DEV_DOWN = 0,
95 DEV_UP
96};
97
98enum dev_sku_info {
99 DEV_SKU_1 = 0,
100 DEV_SKU_2,
101 DEV_SKU_3,
102 DEV_SKU_4,
103 DEV_SKU_UNKNOWN,
104};
105
106static inline const char *get_sku_info(enum dev_sku_info info)
107{
108 switch (info) {
109 case DEV_SKU_1:
110 return "SKU1";
111 case DEV_SKU_2:
112 return "SKU2";
113 case DEV_SKU_3:
114 return "SKU3";
115 case DEV_SKU_4:
116 return "SKU4";
117 case DEV_SKU_UNKNOWN:
118 default:
119 break;
120 }
121 return "Unknown SKU";
122}
123
124struct adf_hw_device_class {
125 const char *name;
126 const enum adf_device_type type;
127 uint32_t instances;
128} __packed;
129
130struct adf_cfg_device_data;
131struct adf_accel_dev;
132struct adf_etr_data;
133struct adf_etr_ring_data;
134
135struct adf_hw_device_data {
136 struct adf_hw_device_class *dev_class;
137 uint32_t (*get_accel_mask)(uint32_t fuse);
138 uint32_t (*get_ae_mask)(uint32_t fuse);
139 uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
140 uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
141 uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
142 uint32_t (*get_num_accels)(struct adf_hw_device_data *self);
143 enum dev_sku_info (*get_sku)(struct adf_hw_device_data *self);
144 void (*hw_arb_ring_enable)(struct adf_etr_ring_data *ring);
145 void (*hw_arb_ring_disable)(struct adf_etr_ring_data *ring);
146 int (*alloc_irq)(struct adf_accel_dev *accel_dev);
147 void (*free_irq)(struct adf_accel_dev *accel_dev);
148 void (*enable_error_correction)(struct adf_accel_dev *accel_dev);
149 int (*init_admin_comms)(struct adf_accel_dev *accel_dev);
150 void (*exit_admin_comms)(struct adf_accel_dev *accel_dev);
151 int (*init_arb)(struct adf_accel_dev *accel_dev);
152 void (*exit_arb)(struct adf_accel_dev *accel_dev);
153 void (*enable_ints)(struct adf_accel_dev *accel_dev);
154 const char *fw_name;
155 uint32_t pci_dev_id;
156 uint32_t fuses;
157 uint32_t accel_capabilities_mask;
158 uint16_t accel_mask;
159 uint16_t ae_mask;
160 uint16_t tx_rings_mask;
161 uint8_t tx_rx_gap;
162 uint8_t instance_id;
163 uint8_t num_banks;
164 uint8_t num_accel;
165 uint8_t num_logical_accel;
166 uint8_t num_engines;
167} __packed;
168
169
170#define ADF_CSR_WR(csr_base, csr_offset, val) \
171 __raw_writel(val, csr_base + csr_offset)
172
173
174#define ADF_CSR_RD(csr_base, csr_offset) __raw_readl(csr_base + csr_offset)
175
176#define GET_DEV(accel_dev) ((accel_dev)->accel_pci_dev.pci_dev->dev)
177#define GET_BARS(accel_dev) ((accel_dev)->accel_pci_dev.pci_bars)
178#define GET_HW_DATA(accel_dev) (accel_dev->hw_device)
179#define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
180#define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
181#define accel_to_pci_dev(accel_ptr) accel_ptr->accel_pci_dev.pci_dev
182
183struct adf_admin_comms;
184struct icp_qat_fw_loader_handle;
185struct adf_fw_loader_data {
186 struct icp_qat_fw_loader_handle *fw_loader;
187 const struct firmware *uof_fw;
188};
189
190struct adf_accel_dev {
191 struct adf_etr_data *transport;
192 struct adf_hw_device_data *hw_device;
193 struct adf_cfg_device_data *cfg;
194 struct adf_fw_loader_data *fw_loader;
195 struct adf_admin_comms *admin;
196 struct list_head crypto_list;
197 unsigned long status;
198 atomic_t ref_count;
199 struct dentry *debugfs_dir;
200 struct list_head list;
201 struct module *owner;
202 struct adf_accel_pci accel_pci_dev;
203 uint8_t accel_id;
204} __packed;
205#endif
206
