LXR linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/gm204.c

   1/*
   2 * Copyright 2012 Red Hat Inc.
   3 *
   4 * Permission is hereby granted, free of charge, to any person obtaining a
   5 * copy of this software and associated documentation files (the "Software"),
   6 * to deal in the Software without restriction, including without limitation
   7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8 * and/or sell copies of the Software, and to permit persons to whom the
   9 * Software is furnished to do so, subject to the following conditions:
  10 *
  11 * The above copyright notice and this permission notice shall be included in
  12 * all copies or substantial portions of the Software.
  13 *
  14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20 * OTHER DEALINGS IN THE SOFTWARE.
  21 *
  22 * Authors: Ben Skeggs
  23 */
  24#include "nv50.h"
  25#include "outpdp.h"
  26
  27#include <nvif/class.h>
  28
  29/*******************************************************************************
  30 * Base display object
  31 ******************************************************************************/
  32
  33static struct nvkm_oclass
  34gm204_disp_sclass[] = {
  35        { GM204_DISP_CORE_CHANNEL_DMA, &gf110_disp_core_ofuncs.base },
  36        { GK110_DISP_BASE_CHANNEL_DMA, &gf110_disp_base_ofuncs.base },
  37        { GK104_DISP_OVERLAY_CONTROL_DMA, &gf110_disp_ovly_ofuncs.base },
  38        { GK104_DISP_OVERLAY, &gf110_disp_oimm_ofuncs.base },
  39        { GK104_DISP_CURSOR, &gf110_disp_curs_ofuncs.base },
  40        {}
  41};
  42
  43static struct nvkm_oclass
  44gm204_disp_main_oclass[] = {
  45        { GM204_DISP, &gf110_disp_main_ofuncs },
  46        {}
  47};
  48
  49/*******************************************************************************
  50 * Display engine implementation
  51 ******************************************************************************/
  52
  53static int
  54gm204_disp_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
  55                struct nvkm_oclass *oclass, void *data, u32 size,
  56                struct nvkm_object **pobject)
  57{
  58        struct nv50_disp_priv *priv;
  59        int heads = nv_rd32(parent, 0x022448);
  60        int ret;
  61
  62        ret = nvkm_disp_create(parent, engine, oclass, heads,
  63                               "PDISP", "display", &priv);
  64        *pobject = nv_object(priv);
  65        if (ret)
  66                return ret;
  67
  68        ret = nvkm_event_init(&gf110_disp_chan_uevent, 1, 17, &priv->uevent);
  69        if (ret)
  70                return ret;
  71
  72        nv_engine(priv)->sclass = gm204_disp_main_oclass;
  73        nv_engine(priv)->cclass = &nv50_disp_cclass;
  74        nv_subdev(priv)->intr = gf110_disp_intr;
  75        INIT_WORK(&priv->supervisor, gf110_disp_intr_supervisor);
  76        priv->sclass = gm204_disp_sclass;
  77        priv->head.nr = heads;
  78        priv->dac.nr = 3;
  79        priv->sor.nr = 4;
  80        priv->dac.power = nv50_dac_power;
  81        priv->dac.sense = nv50_dac_sense;
  82        priv->sor.power = nv50_sor_power;
  83        priv->sor.hda_eld = gf110_hda_eld;
  84        priv->sor.hdmi = gf110_hdmi_ctrl;
  85        priv->sor.magic = gm204_sor_magic;
  86        return 0;
  87}
  88
  89struct nvkm_oclass *
  90gm204_disp_outp_sclass[] = {
  91        &gm204_sor_dp_impl.base.base,
  92        NULL
  93};
  94
  95struct nvkm_oclass *
  96gm204_disp_oclass = &(struct nv50_disp_impl) {
  97        .base.base.handle = NV_ENGINE(DISP, 0x07),
  98        .base.base.ofuncs = &(struct nvkm_ofuncs) {
  99                .ctor = gm204_disp_ctor,
 100                .dtor = _nvkm_disp_dtor,
 101                .init = _nvkm_disp_init,
 102                .fini = _nvkm_disp_fini,
 103        },
 104        .base.vblank = &gf110_disp_vblank_func,
 105        .base.outp =  gm204_disp_outp_sclass,
 106        .mthd.core = &gk104_disp_core_mthd_chan,
 107        .mthd.base = &gf110_disp_base_mthd_chan,
 108        .mthd.ovly = &gk104_disp_ovly_mthd_chan,
 109        .mthd.prev = -0x020000,
 110        .head.scanoutpos = gf110_disp_main_scanoutpos,
 111}.base.base;
 112