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14#include <linux/module.h>
15#include <linux/slab.h>
16#include <linux/i2c.h>
17#include <linux/err.h>
18#include <linux/delay.h>
19#include <linux/sysfs.h>
20#include <linux/jiffies.h>
21#include <linux/irq.h>
22#include <linux/interrupt.h>
23#include <linux/kfifo.h>
24#include <linux/spinlock.h>
25#include <linux/iio/iio.h>
26#include <linux/i2c-mux.h>
27#include <linux/acpi.h>
28#include "inv_mpu_iio.h"
29
30
31
32
33
34static const int gyro_scale_6050[] = {133090, 266181, 532362, 1064724};
35
36
37
38
39
40static const int accel_scale[] = {598, 1196, 2392, 4785};
41
42static const struct inv_mpu6050_reg_map reg_set_6050 = {
43 .sample_rate_div = INV_MPU6050_REG_SAMPLE_RATE_DIV,
44 .lpf = INV_MPU6050_REG_CONFIG,
45 .user_ctrl = INV_MPU6050_REG_USER_CTRL,
46 .fifo_en = INV_MPU6050_REG_FIFO_EN,
47 .gyro_config = INV_MPU6050_REG_GYRO_CONFIG,
48 .accl_config = INV_MPU6050_REG_ACCEL_CONFIG,
49 .fifo_count_h = INV_MPU6050_REG_FIFO_COUNT_H,
50 .fifo_r_w = INV_MPU6050_REG_FIFO_R_W,
51 .raw_gyro = INV_MPU6050_REG_RAW_GYRO,
52 .raw_accl = INV_MPU6050_REG_RAW_ACCEL,
53 .temperature = INV_MPU6050_REG_TEMPERATURE,
54 .int_enable = INV_MPU6050_REG_INT_ENABLE,
55 .pwr_mgmt_1 = INV_MPU6050_REG_PWR_MGMT_1,
56 .pwr_mgmt_2 = INV_MPU6050_REG_PWR_MGMT_2,
57 .int_pin_cfg = INV_MPU6050_REG_INT_PIN_CFG,
58};
59
60static const struct inv_mpu6050_chip_config chip_config_6050 = {
61 .fsr = INV_MPU6050_FSR_2000DPS,
62 .lpf = INV_MPU6050_FILTER_20HZ,
63 .fifo_rate = INV_MPU6050_INIT_FIFO_RATE,
64 .gyro_fifo_enable = false,
65 .accl_fifo_enable = false,
66 .accl_fs = INV_MPU6050_FS_02G,
67};
68
69static const struct inv_mpu6050_hw hw_info[INV_NUM_PARTS] = {
70 {
71 .num_reg = 117,
72 .name = "MPU6050",
73 .reg = ®_set_6050,
74 .config = &chip_config_6050,
75 },
76};
77
78int inv_mpu6050_write_reg(struct inv_mpu6050_state *st, int reg, u8 d)
79{
80 return i2c_smbus_write_i2c_block_data(st->client, reg, 1, &d);
81}
82
83
84
85
86
87
88
89static int inv_mpu6050_write_reg_unlocked(struct inv_mpu6050_state *st,
90 u8 reg, u8 d)
91{
92 int ret;
93 u8 buf[2];
94 struct i2c_msg msg[1] = {
95 {
96 .addr = st->client->addr,
97 .flags = 0,
98 .len = sizeof(buf),
99 .buf = buf,
100 }
101 };
102
103 buf[0] = reg;
104 buf[1] = d;
105 ret = __i2c_transfer(st->client->adapter, msg, 1);
106 if (ret != 1)
107 return ret;
108
109 return 0;
110}
111
112static int inv_mpu6050_select_bypass(struct i2c_adapter *adap, void *mux_priv,
113 u32 chan_id)
114{
115 struct iio_dev *indio_dev = mux_priv;
116 struct inv_mpu6050_state *st = iio_priv(indio_dev);
117 int ret = 0;
118
119
120 mutex_lock(&indio_dev->mlock);
121 if (!st->powerup_count) {
122 ret = inv_mpu6050_write_reg_unlocked(st, st->reg->pwr_mgmt_1,
123 0);
124 if (ret)
125 goto write_error;
126
127 msleep(INV_MPU6050_REG_UP_TIME);
128 }
129 if (!ret) {
130 st->powerup_count++;
131 ret = inv_mpu6050_write_reg_unlocked(st, st->reg->int_pin_cfg,
132 st->client->irq |
133 INV_MPU6050_BIT_BYPASS_EN);
134 }
135write_error:
136 mutex_unlock(&indio_dev->mlock);
137
138 return ret;
139}
140
141static int inv_mpu6050_deselect_bypass(struct i2c_adapter *adap,
142 void *mux_priv, u32 chan_id)
143{
144 struct iio_dev *indio_dev = mux_priv;
145 struct inv_mpu6050_state *st = iio_priv(indio_dev);
146
147 mutex_lock(&indio_dev->mlock);
148
149 inv_mpu6050_write_reg_unlocked(st, st->reg->int_pin_cfg,
150 st->client->irq);
151 st->powerup_count--;
152 if (!st->powerup_count)
153 inv_mpu6050_write_reg_unlocked(st, st->reg->pwr_mgmt_1,
154 INV_MPU6050_BIT_SLEEP);
155 mutex_unlock(&indio_dev->mlock);
156
157 return 0;
158}
159
160int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, u32 mask)
161{
162 u8 d, mgmt_1;
163 int result;
164
165
166
167
168 if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
169 result = i2c_smbus_read_i2c_block_data(st->client,
170 st->reg->pwr_mgmt_1, 1, &mgmt_1);
171 if (result != 1)
172 return result;
173
174 mgmt_1 &= ~INV_MPU6050_BIT_CLK_MASK;
175 }
176
177 if ((INV_MPU6050_BIT_PWR_GYRO_STBY == mask) && (!en)) {
178
179
180 mgmt_1 |= INV_CLK_INTERNAL;
181 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1, mgmt_1);
182 if (result)
183 return result;
184 }
185
186 result = i2c_smbus_read_i2c_block_data(st->client,
187 st->reg->pwr_mgmt_2, 1, &d);
188 if (result != 1)
189 return result;
190 if (en)
191 d &= ~mask;
192 else
193 d |= mask;
194 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_2, d);
195 if (result)
196 return result;
197
198 if (en) {
199
200 msleep(INV_MPU6050_TEMP_UP_TIME);
201 if (INV_MPU6050_BIT_PWR_GYRO_STBY == mask) {
202
203 mgmt_1 |= INV_CLK_PLL;
204 result = inv_mpu6050_write_reg(st,
205 st->reg->pwr_mgmt_1, mgmt_1);
206 if (result)
207 return result;
208 }
209 }
210
211 return 0;
212}
213
214int inv_mpu6050_set_power_itg(struct inv_mpu6050_state *st, bool power_on)
215{
216 int result = 0;
217
218 if (power_on) {
219
220 if (!st->powerup_count)
221 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1,
222 0);
223 if (!result)
224 st->powerup_count++;
225 } else {
226 st->powerup_count--;
227 if (!st->powerup_count)
228 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1,
229 INV_MPU6050_BIT_SLEEP);
230 }
231
232 if (result)
233 return result;
234
235 if (power_on)
236 msleep(INV_MPU6050_REG_UP_TIME);
237
238 return 0;
239}
240
241
242
243
244
245
246
247
248
249
250static int inv_mpu6050_init_config(struct iio_dev *indio_dev)
251{
252 int result;
253 u8 d;
254 struct inv_mpu6050_state *st = iio_priv(indio_dev);
255
256 result = inv_mpu6050_set_power_itg(st, true);
257 if (result)
258 return result;
259 d = (INV_MPU6050_FSR_2000DPS << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
260 result = inv_mpu6050_write_reg(st, st->reg->gyro_config, d);
261 if (result)
262 return result;
263
264 d = INV_MPU6050_FILTER_20HZ;
265 result = inv_mpu6050_write_reg(st, st->reg->lpf, d);
266 if (result)
267 return result;
268
269 d = INV_MPU6050_ONE_K_HZ / INV_MPU6050_INIT_FIFO_RATE - 1;
270 result = inv_mpu6050_write_reg(st, st->reg->sample_rate_div, d);
271 if (result)
272 return result;
273
274 d = (INV_MPU6050_FS_02G << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
275 result = inv_mpu6050_write_reg(st, st->reg->accl_config, d);
276 if (result)
277 return result;
278
279 memcpy(&st->chip_config, hw_info[st->chip_type].config,
280 sizeof(struct inv_mpu6050_chip_config));
281 result = inv_mpu6050_set_power_itg(st, false);
282
283 return result;
284}
285
286static int inv_mpu6050_sensor_show(struct inv_mpu6050_state *st, int reg,
287 int axis, int *val)
288{
289 int ind, result;
290 __be16 d;
291
292 ind = (axis - IIO_MOD_X) * 2;
293 result = i2c_smbus_read_i2c_block_data(st->client, reg + ind, 2,
294 (u8 *)&d);
295 if (result != 2)
296 return -EINVAL;
297 *val = (short)be16_to_cpup(&d);
298
299 return IIO_VAL_INT;
300}
301
302static int inv_mpu6050_read_raw(struct iio_dev *indio_dev,
303 struct iio_chan_spec const *chan,
304 int *val,
305 int *val2,
306 long mask) {
307 struct inv_mpu6050_state *st = iio_priv(indio_dev);
308
309 switch (mask) {
310 case IIO_CHAN_INFO_RAW:
311 {
312 int ret, result;
313
314 ret = IIO_VAL_INT;
315 result = 0;
316 mutex_lock(&indio_dev->mlock);
317 if (!st->chip_config.enable) {
318 result = inv_mpu6050_set_power_itg(st, true);
319 if (result)
320 goto error_read_raw;
321 }
322
323 switch (chan->type) {
324 case IIO_ANGL_VEL:
325 if (!st->chip_config.gyro_fifo_enable ||
326 !st->chip_config.enable) {
327 result = inv_mpu6050_switch_engine(st, true,
328 INV_MPU6050_BIT_PWR_GYRO_STBY);
329 if (result)
330 goto error_read_raw;
331 }
332 ret = inv_mpu6050_sensor_show(st, st->reg->raw_gyro,
333 chan->channel2, val);
334 if (!st->chip_config.gyro_fifo_enable ||
335 !st->chip_config.enable) {
336 result = inv_mpu6050_switch_engine(st, false,
337 INV_MPU6050_BIT_PWR_GYRO_STBY);
338 if (result)
339 goto error_read_raw;
340 }
341 break;
342 case IIO_ACCEL:
343 if (!st->chip_config.accl_fifo_enable ||
344 !st->chip_config.enable) {
345 result = inv_mpu6050_switch_engine(st, true,
346 INV_MPU6050_BIT_PWR_ACCL_STBY);
347 if (result)
348 goto error_read_raw;
349 }
350 ret = inv_mpu6050_sensor_show(st, st->reg->raw_accl,
351 chan->channel2, val);
352 if (!st->chip_config.accl_fifo_enable ||
353 !st->chip_config.enable) {
354 result = inv_mpu6050_switch_engine(st, false,
355 INV_MPU6050_BIT_PWR_ACCL_STBY);
356 if (result)
357 goto error_read_raw;
358 }
359 break;
360 case IIO_TEMP:
361
362 msleep(INV_MPU6050_SENSOR_UP_TIME);
363 inv_mpu6050_sensor_show(st, st->reg->temperature,
364 IIO_MOD_X, val);
365 break;
366 default:
367 ret = -EINVAL;
368 break;
369 }
370error_read_raw:
371 if (!st->chip_config.enable)
372 result |= inv_mpu6050_set_power_itg(st, false);
373 mutex_unlock(&indio_dev->mlock);
374 if (result)
375 return result;
376
377 return ret;
378 }
379 case IIO_CHAN_INFO_SCALE:
380 switch (chan->type) {
381 case IIO_ANGL_VEL:
382 *val = 0;
383 *val2 = gyro_scale_6050[st->chip_config.fsr];
384
385 return IIO_VAL_INT_PLUS_NANO;
386 case IIO_ACCEL:
387 *val = 0;
388 *val2 = accel_scale[st->chip_config.accl_fs];
389
390 return IIO_VAL_INT_PLUS_MICRO;
391 case IIO_TEMP:
392 *val = 0;
393 *val2 = INV_MPU6050_TEMP_SCALE;
394
395 return IIO_VAL_INT_PLUS_MICRO;
396 default:
397 return -EINVAL;
398 }
399 case IIO_CHAN_INFO_OFFSET:
400 switch (chan->type) {
401 case IIO_TEMP:
402 *val = INV_MPU6050_TEMP_OFFSET;
403
404 return IIO_VAL_INT;
405 default:
406 return -EINVAL;
407 }
408 default:
409 return -EINVAL;
410 }
411}
412
413static int inv_mpu6050_write_gyro_scale(struct inv_mpu6050_state *st, int val)
414{
415 int result, i;
416 u8 d;
417
418 for (i = 0; i < ARRAY_SIZE(gyro_scale_6050); ++i) {
419 if (gyro_scale_6050[i] == val) {
420 d = (i << INV_MPU6050_GYRO_CONFIG_FSR_SHIFT);
421 result = inv_mpu6050_write_reg(st,
422 st->reg->gyro_config, d);
423 if (result)
424 return result;
425
426 st->chip_config.fsr = i;
427 return 0;
428 }
429 }
430
431 return -EINVAL;
432}
433
434static int inv_mpu6050_write_accel_scale(struct inv_mpu6050_state *st, int val)
435{
436 int result, i;
437 u8 d;
438
439 for (i = 0; i < ARRAY_SIZE(accel_scale); ++i) {
440 if (accel_scale[i] == val) {
441 d = (i << INV_MPU6050_ACCL_CONFIG_FSR_SHIFT);
442 result = inv_mpu6050_write_reg(st,
443 st->reg->accl_config, d);
444 if (result)
445 return result;
446
447 st->chip_config.accl_fs = i;
448 return 0;
449 }
450 }
451
452 return -EINVAL;
453}
454
455static int inv_mpu6050_write_raw(struct iio_dev *indio_dev,
456 struct iio_chan_spec const *chan,
457 int val,
458 int val2,
459 long mask) {
460 struct inv_mpu6050_state *st = iio_priv(indio_dev);
461 int result;
462
463 mutex_lock(&indio_dev->mlock);
464
465
466 if (st->chip_config.enable) {
467 result = -EBUSY;
468 goto error_write_raw;
469 }
470 result = inv_mpu6050_set_power_itg(st, true);
471 if (result)
472 goto error_write_raw;
473
474 switch (mask) {
475 case IIO_CHAN_INFO_SCALE:
476 switch (chan->type) {
477 case IIO_ANGL_VEL:
478 result = inv_mpu6050_write_gyro_scale(st, val2);
479 break;
480 case IIO_ACCEL:
481 result = inv_mpu6050_write_accel_scale(st, val2);
482 break;
483 default:
484 result = -EINVAL;
485 break;
486 }
487 break;
488 default:
489 result = -EINVAL;
490 break;
491 }
492
493error_write_raw:
494 result |= inv_mpu6050_set_power_itg(st, false);
495 mutex_unlock(&indio_dev->mlock);
496
497 return result;
498}
499
500
501
502
503
504
505
506
507
508
509static int inv_mpu6050_set_lpf(struct inv_mpu6050_state *st, int rate)
510{
511 const int hz[] = {188, 98, 42, 20, 10, 5};
512 const int d[] = {INV_MPU6050_FILTER_188HZ, INV_MPU6050_FILTER_98HZ,
513 INV_MPU6050_FILTER_42HZ, INV_MPU6050_FILTER_20HZ,
514 INV_MPU6050_FILTER_10HZ, INV_MPU6050_FILTER_5HZ};
515 int i, h, result;
516 u8 data;
517
518 h = (rate >> 1);
519 i = 0;
520 while ((h < hz[i]) && (i < ARRAY_SIZE(d) - 1))
521 i++;
522 data = d[i];
523 result = inv_mpu6050_write_reg(st, st->reg->lpf, data);
524 if (result)
525 return result;
526 st->chip_config.lpf = data;
527
528 return 0;
529}
530
531
532
533
534static ssize_t inv_mpu6050_fifo_rate_store(struct device *dev,
535 struct device_attribute *attr, const char *buf, size_t count)
536{
537 s32 fifo_rate;
538 u8 d;
539 int result;
540 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
541 struct inv_mpu6050_state *st = iio_priv(indio_dev);
542
543 if (kstrtoint(buf, 10, &fifo_rate))
544 return -EINVAL;
545 if (fifo_rate < INV_MPU6050_MIN_FIFO_RATE ||
546 fifo_rate > INV_MPU6050_MAX_FIFO_RATE)
547 return -EINVAL;
548 if (fifo_rate == st->chip_config.fifo_rate)
549 return count;
550
551 mutex_lock(&indio_dev->mlock);
552 if (st->chip_config.enable) {
553 result = -EBUSY;
554 goto fifo_rate_fail;
555 }
556 result = inv_mpu6050_set_power_itg(st, true);
557 if (result)
558 goto fifo_rate_fail;
559
560 d = INV_MPU6050_ONE_K_HZ / fifo_rate - 1;
561 result = inv_mpu6050_write_reg(st, st->reg->sample_rate_div, d);
562 if (result)
563 goto fifo_rate_fail;
564 st->chip_config.fifo_rate = fifo_rate;
565
566 result = inv_mpu6050_set_lpf(st, fifo_rate);
567 if (result)
568 goto fifo_rate_fail;
569
570fifo_rate_fail:
571 result |= inv_mpu6050_set_power_itg(st, false);
572 mutex_unlock(&indio_dev->mlock);
573 if (result)
574 return result;
575
576 return count;
577}
578
579
580
581
582static ssize_t inv_fifo_rate_show(struct device *dev,
583 struct device_attribute *attr, char *buf)
584{
585 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
586
587 return sprintf(buf, "%d\n", st->chip_config.fifo_rate);
588}
589
590
591
592
593
594static ssize_t inv_attr_show(struct device *dev,
595 struct device_attribute *attr, char *buf)
596{
597 struct inv_mpu6050_state *st = iio_priv(dev_to_iio_dev(dev));
598 struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
599 s8 *m;
600
601 switch (this_attr->address) {
602
603
604 case ATTR_GYRO_MATRIX:
605 case ATTR_ACCL_MATRIX:
606 m = st->plat_data.orientation;
607
608 return sprintf(buf, "%d, %d, %d; %d, %d, %d; %d, %d, %d\n",
609 m[0], m[1], m[2], m[3], m[4], m[5], m[6], m[7], m[8]);
610 default:
611 return -EINVAL;
612 }
613}
614
615
616
617
618
619
620
621
622
623
624static int inv_mpu6050_validate_trigger(struct iio_dev *indio_dev,
625 struct iio_trigger *trig)
626{
627 struct inv_mpu6050_state *st = iio_priv(indio_dev);
628
629 if (st->trig != trig)
630 return -EINVAL;
631
632 return 0;
633}
634
635#define INV_MPU6050_CHAN(_type, _channel2, _index) \
636 { \
637 .type = _type, \
638 .modified = 1, \
639 .channel2 = _channel2, \
640 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \
641 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
642 .scan_index = _index, \
643 .scan_type = { \
644 .sign = 's', \
645 .realbits = 16, \
646 .storagebits = 16, \
647 .shift = 0 , \
648 .endianness = IIO_BE, \
649 }, \
650 }
651
652static const struct iio_chan_spec inv_mpu_channels[] = {
653 IIO_CHAN_SOFT_TIMESTAMP(INV_MPU6050_SCAN_TIMESTAMP),
654
655
656
657
658 {
659 .type = IIO_TEMP,
660 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW)
661 | BIT(IIO_CHAN_INFO_OFFSET)
662 | BIT(IIO_CHAN_INFO_SCALE),
663 .scan_index = -1,
664 },
665 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_X, INV_MPU6050_SCAN_GYRO_X),
666 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Y, INV_MPU6050_SCAN_GYRO_Y),
667 INV_MPU6050_CHAN(IIO_ANGL_VEL, IIO_MOD_Z, INV_MPU6050_SCAN_GYRO_Z),
668
669 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_X, INV_MPU6050_SCAN_ACCL_X),
670 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Y, INV_MPU6050_SCAN_ACCL_Y),
671 INV_MPU6050_CHAN(IIO_ACCEL, IIO_MOD_Z, INV_MPU6050_SCAN_ACCL_Z),
672};
673
674
675static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("10 20 50 100 200 500");
676static IIO_DEV_ATTR_SAMP_FREQ(S_IRUGO | S_IWUSR, inv_fifo_rate_show,
677 inv_mpu6050_fifo_rate_store);
678static IIO_DEVICE_ATTR(in_gyro_matrix, S_IRUGO, inv_attr_show, NULL,
679 ATTR_GYRO_MATRIX);
680static IIO_DEVICE_ATTR(in_accel_matrix, S_IRUGO, inv_attr_show, NULL,
681 ATTR_ACCL_MATRIX);
682
683static struct attribute *inv_attributes[] = {
684 &iio_dev_attr_in_gyro_matrix.dev_attr.attr,
685 &iio_dev_attr_in_accel_matrix.dev_attr.attr,
686 &iio_dev_attr_sampling_frequency.dev_attr.attr,
687 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
688 NULL,
689};
690
691static const struct attribute_group inv_attribute_group = {
692 .attrs = inv_attributes
693};
694
695static const struct iio_info mpu_info = {
696 .driver_module = THIS_MODULE,
697 .read_raw = &inv_mpu6050_read_raw,
698 .write_raw = &inv_mpu6050_write_raw,
699 .attrs = &inv_attribute_group,
700 .validate_trigger = inv_mpu6050_validate_trigger,
701};
702
703
704
705
706static int inv_check_and_setup_chip(struct inv_mpu6050_state *st,
707 const struct i2c_device_id *id)
708{
709 int result;
710
711 st->chip_type = INV_MPU6050;
712 st->hw = &hw_info[st->chip_type];
713 st->reg = hw_info[st->chip_type].reg;
714
715
716 result = inv_mpu6050_write_reg(st, st->reg->pwr_mgmt_1,
717 INV_MPU6050_BIT_H_RESET);
718 if (result)
719 return result;
720 msleep(INV_MPU6050_POWER_UP_TIME);
721
722
723
724
725 result = inv_mpu6050_set_power_itg(st, false);
726 if (result)
727 return result;
728 result = inv_mpu6050_set_power_itg(st, true);
729 if (result)
730 return result;
731
732 result = inv_mpu6050_switch_engine(st, false,
733 INV_MPU6050_BIT_PWR_ACCL_STBY);
734 if (result)
735 return result;
736 result = inv_mpu6050_switch_engine(st, false,
737 INV_MPU6050_BIT_PWR_GYRO_STBY);
738 if (result)
739 return result;
740
741 return 0;
742}
743
744
745
746
747
748
749
750
751static int inv_mpu_probe(struct i2c_client *client,
752 const struct i2c_device_id *id)
753{
754 struct inv_mpu6050_state *st;
755 struct iio_dev *indio_dev;
756 struct inv_mpu6050_platform_data *pdata;
757 int result;
758
759 if (!i2c_check_functionality(client->adapter,
760 I2C_FUNC_SMBUS_I2C_BLOCK))
761 return -ENOSYS;
762
763 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*st));
764 if (!indio_dev)
765 return -ENOMEM;
766
767 st = iio_priv(indio_dev);
768 st->client = client;
769 st->powerup_count = 0;
770 pdata = dev_get_platdata(&client->dev);
771 if (pdata)
772 st->plat_data = *pdata;
773
774 result = inv_check_and_setup_chip(st, id);
775 if (result)
776 return result;
777
778 result = inv_mpu6050_init_config(indio_dev);
779 if (result) {
780 dev_err(&client->dev,
781 "Could not initialize device.\n");
782 return result;
783 }
784
785 i2c_set_clientdata(client, indio_dev);
786 indio_dev->dev.parent = &client->dev;
787
788 if (id)
789 indio_dev->name = (char *)id->name;
790 else
791 indio_dev->name = (char *)dev_name(&client->dev);
792 indio_dev->channels = inv_mpu_channels;
793 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
794
795 indio_dev->info = &mpu_info;
796 indio_dev->modes = INDIO_BUFFER_TRIGGERED;
797
798 result = iio_triggered_buffer_setup(indio_dev,
799 inv_mpu6050_irq_handler,
800 inv_mpu6050_read_fifo,
801 NULL);
802 if (result) {
803 dev_err(&st->client->dev, "configure buffer fail %d\n",
804 result);
805 return result;
806 }
807 result = inv_mpu6050_probe_trigger(indio_dev);
808 if (result) {
809 dev_err(&st->client->dev, "trigger probe fail %d\n", result);
810 goto out_unreg_ring;
811 }
812
813 INIT_KFIFO(st->timestamps);
814 spin_lock_init(&st->time_stamp_lock);
815 result = iio_device_register(indio_dev);
816 if (result) {
817 dev_err(&st->client->dev, "IIO register fail %d\n", result);
818 goto out_remove_trigger;
819 }
820
821 st->mux_adapter = i2c_add_mux_adapter(client->adapter,
822 &client->dev,
823 indio_dev,
824 0, 0, 0,
825 inv_mpu6050_select_bypass,
826 inv_mpu6050_deselect_bypass);
827 if (!st->mux_adapter) {
828 result = -ENODEV;
829 goto out_unreg_device;
830 }
831
832 result = inv_mpu_acpi_create_mux_client(st);
833 if (result)
834 goto out_del_mux;
835
836 return 0;
837
838out_del_mux:
839 i2c_del_mux_adapter(st->mux_adapter);
840out_unreg_device:
841 iio_device_unregister(indio_dev);
842out_remove_trigger:
843 inv_mpu6050_remove_trigger(st);
844out_unreg_ring:
845 iio_triggered_buffer_cleanup(indio_dev);
846 return result;
847}
848
849static int inv_mpu_remove(struct i2c_client *client)
850{
851 struct iio_dev *indio_dev = i2c_get_clientdata(client);
852 struct inv_mpu6050_state *st = iio_priv(indio_dev);
853
854 inv_mpu_acpi_delete_mux_client(st);
855 i2c_del_mux_adapter(st->mux_adapter);
856 iio_device_unregister(indio_dev);
857 inv_mpu6050_remove_trigger(st);
858 iio_triggered_buffer_cleanup(indio_dev);
859
860 return 0;
861}
862#ifdef CONFIG_PM_SLEEP
863
864static int inv_mpu_resume(struct device *dev)
865{
866 return inv_mpu6050_set_power_itg(
867 iio_priv(i2c_get_clientdata(to_i2c_client(dev))), true);
868}
869
870static int inv_mpu_suspend(struct device *dev)
871{
872 return inv_mpu6050_set_power_itg(
873 iio_priv(i2c_get_clientdata(to_i2c_client(dev))), false);
874}
875static SIMPLE_DEV_PM_OPS(inv_mpu_pmops, inv_mpu_suspend, inv_mpu_resume);
876
877#define INV_MPU6050_PMOPS (&inv_mpu_pmops)
878#else
879#define INV_MPU6050_PMOPS NULL
880#endif
881
882
883
884
885
886static const struct i2c_device_id inv_mpu_id[] = {
887 {"mpu6050", INV_MPU6050},
888 {"mpu6500", INV_MPU6500},
889 {}
890};
891
892MODULE_DEVICE_TABLE(i2c, inv_mpu_id);
893
894static const struct acpi_device_id inv_acpi_match[] = {
895 {"INVN6500", 0},
896 { },
897};
898
899MODULE_DEVICE_TABLE(acpi, inv_acpi_match);
900
901static struct i2c_driver inv_mpu_driver = {
902 .probe = inv_mpu_probe,
903 .remove = inv_mpu_remove,
904 .id_table = inv_mpu_id,
905 .driver = {
906 .owner = THIS_MODULE,
907 .name = "inv-mpu6050",
908 .pm = INV_MPU6050_PMOPS,
909 .acpi_match_table = ACPI_PTR(inv_acpi_match),
910 },
911};
912
913module_i2c_driver(inv_mpu_driver);
914
915MODULE_AUTHOR("Invensense Corporation");
916MODULE_DESCRIPTION("Invensense device MPU6050 driver");
917MODULE_LICENSE("GPL");
918