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33#include <linux/module.h>
34#include <linux/moduleparam.h>
35#include <linux/pci.h>
36#include <linux/netdevice.h>
37#include <linux/etherdevice.h>
38#include <linux/inetdevice.h>
39#include <linux/interrupt.h>
40#include <linux/delay.h>
41#include <linux/ethtool.h>
42#include <linux/mii.h>
43#include <linux/if_vlan.h>
44#include <linux/crc32.h>
45#include <linux/in.h>
46#include <linux/ip.h>
47#include <linux/tcp.h>
48#include <linux/init.h>
49#include <linux/dma-mapping.h>
50#include <linux/slab.h>
51#include <linux/prefetch.h>
52
53#include <asm/io.h>
54#include <asm/irq.h>
55#include <asm/byteorder.h>
56
57#include <rdma/ib_smi.h>
58#include "c2.h"
59#include "c2_provider.h"
60
61MODULE_AUTHOR("Tom Tucker <tom@opengridcomputing.com>");
62MODULE_DESCRIPTION("Ammasso AMSO1100 Low-level iWARP Driver");
63MODULE_LICENSE("Dual BSD/GPL");
64MODULE_VERSION(DRV_VERSION);
65
66static const u32 default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK
67 | NETIF_MSG_IFUP | NETIF_MSG_IFDOWN;
68
69static int debug = -1;
70module_param(debug, int, 0);
71MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
72
73static int c2_up(struct net_device *netdev);
74static int c2_down(struct net_device *netdev);
75static int c2_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
76static void c2_tx_interrupt(struct net_device *netdev);
77static void c2_rx_interrupt(struct net_device *netdev);
78static irqreturn_t c2_interrupt(int irq, void *dev_id);
79static void c2_tx_timeout(struct net_device *netdev);
80static int c2_change_mtu(struct net_device *netdev, int new_mtu);
81static void c2_reset(struct c2_port *c2_port);
82
83static struct pci_device_id c2_pci_table[] = {
84 { PCI_DEVICE(0x18b8, 0xb001) },
85 { 0 }
86};
87
88MODULE_DEVICE_TABLE(pci, c2_pci_table);
89
90static void c2_print_macaddr(struct net_device *netdev)
91{
92 pr_debug("%s: MAC %pM, IRQ %u\n", netdev->name, netdev->dev_addr, netdev->irq);
93}
94
95static void c2_set_rxbufsize(struct c2_port *c2_port)
96{
97 struct net_device *netdev = c2_port->netdev;
98
99 if (netdev->mtu > RX_BUF_SIZE)
100 c2_port->rx_buf_size =
101 netdev->mtu + ETH_HLEN + sizeof(struct c2_rxp_hdr) +
102 NET_IP_ALIGN;
103 else
104 c2_port->rx_buf_size = sizeof(struct c2_rxp_hdr) + RX_BUF_SIZE;
105}
106
107
108
109
110
111static int c2_tx_ring_alloc(struct c2_ring *tx_ring, void *vaddr,
112 dma_addr_t base, void __iomem * mmio_txp_ring)
113{
114 struct c2_tx_desc *tx_desc;
115 struct c2_txp_desc __iomem *txp_desc;
116 struct c2_element *elem;
117 int i;
118
119 tx_ring->start = kmalloc(sizeof(*elem) * tx_ring->count, GFP_KERNEL);
120 if (!tx_ring->start)
121 return -ENOMEM;
122
123 elem = tx_ring->start;
124 tx_desc = vaddr;
125 txp_desc = mmio_txp_ring;
126 for (i = 0; i < tx_ring->count; i++, elem++, tx_desc++, txp_desc++) {
127 tx_desc->len = 0;
128 tx_desc->status = 0;
129
130
131 __raw_writeq((__force u64) cpu_to_be64(0x1122334455667788ULL),
132 (void __iomem *) txp_desc + C2_TXP_ADDR);
133 __raw_writew(0, (void __iomem *) txp_desc + C2_TXP_LEN);
134 __raw_writew((__force u16) cpu_to_be16(TXP_HTXD_UNINIT),
135 (void __iomem *) txp_desc + C2_TXP_FLAGS);
136
137 elem->skb = NULL;
138 elem->ht_desc = tx_desc;
139 elem->hw_desc = txp_desc;
140
141 if (i == tx_ring->count - 1) {
142 elem->next = tx_ring->start;
143 tx_desc->next_offset = base;
144 } else {
145 elem->next = elem + 1;
146 tx_desc->next_offset =
147 base + (i + 1) * sizeof(*tx_desc);
148 }
149 }
150
151 tx_ring->to_use = tx_ring->to_clean = tx_ring->start;
152
153 return 0;
154}
155
156
157
158
159
160static int c2_rx_ring_alloc(struct c2_ring *rx_ring, void *vaddr,
161 dma_addr_t base, void __iomem * mmio_rxp_ring)
162{
163 struct c2_rx_desc *rx_desc;
164 struct c2_rxp_desc __iomem *rxp_desc;
165 struct c2_element *elem;
166 int i;
167
168 rx_ring->start = kmalloc(sizeof(*elem) * rx_ring->count, GFP_KERNEL);
169 if (!rx_ring->start)
170 return -ENOMEM;
171
172 elem = rx_ring->start;
173 rx_desc = vaddr;
174 rxp_desc = mmio_rxp_ring;
175 for (i = 0; i < rx_ring->count; i++, elem++, rx_desc++, rxp_desc++) {
176 rx_desc->len = 0;
177 rx_desc->status = 0;
178
179
180 __raw_writew((__force u16) cpu_to_be16(RXP_HRXD_OK),
181 (void __iomem *) rxp_desc + C2_RXP_STATUS);
182 __raw_writew(0, (void __iomem *) rxp_desc + C2_RXP_COUNT);
183 __raw_writew(0, (void __iomem *) rxp_desc + C2_RXP_LEN);
184 __raw_writeq((__force u64) cpu_to_be64(0x99aabbccddeeffULL),
185 (void __iomem *) rxp_desc + C2_RXP_ADDR);
186 __raw_writew((__force u16) cpu_to_be16(RXP_HRXD_UNINIT),
187 (void __iomem *) rxp_desc + C2_RXP_FLAGS);
188
189 elem->skb = NULL;
190 elem->ht_desc = rx_desc;
191 elem->hw_desc = rxp_desc;
192
193 if (i == rx_ring->count - 1) {
194 elem->next = rx_ring->start;
195 rx_desc->next_offset = base;
196 } else {
197 elem->next = elem + 1;
198 rx_desc->next_offset =
199 base + (i + 1) * sizeof(*rx_desc);
200 }
201 }
202
203 rx_ring->to_use = rx_ring->to_clean = rx_ring->start;
204
205 return 0;
206}
207
208
209static inline int c2_rx_alloc(struct c2_port *c2_port, struct c2_element *elem)
210{
211 struct c2_dev *c2dev = c2_port->c2dev;
212 struct c2_rx_desc *rx_desc = elem->ht_desc;
213 struct sk_buff *skb;
214 dma_addr_t mapaddr;
215 u32 maplen;
216 struct c2_rxp_hdr *rxp_hdr;
217
218 skb = dev_alloc_skb(c2_port->rx_buf_size);
219 if (unlikely(!skb)) {
220 pr_debug("%s: out of memory for receive\n",
221 c2_port->netdev->name);
222 return -ENOMEM;
223 }
224
225
226 memset(skb->data, 0, sizeof(*rxp_hdr));
227
228 skb->dev = c2_port->netdev;
229
230 maplen = c2_port->rx_buf_size;
231 mapaddr =
232 pci_map_single(c2dev->pcidev, skb->data, maplen,
233 PCI_DMA_FROMDEVICE);
234
235
236 rxp_hdr = (struct c2_rxp_hdr *) skb->data;
237 rxp_hdr->flags = RXP_HRXD_READY;
238
239 __raw_writew(0, elem->hw_desc + C2_RXP_STATUS);
240 __raw_writew((__force u16) cpu_to_be16((u16) maplen - sizeof(*rxp_hdr)),
241 elem->hw_desc + C2_RXP_LEN);
242 __raw_writeq((__force u64) cpu_to_be64(mapaddr), elem->hw_desc + C2_RXP_ADDR);
243 __raw_writew((__force u16) cpu_to_be16(RXP_HRXD_READY),
244 elem->hw_desc + C2_RXP_FLAGS);
245
246 elem->skb = skb;
247 elem->mapaddr = mapaddr;
248 elem->maplen = maplen;
249 rx_desc->len = maplen;
250
251 return 0;
252}
253
254
255
256
257
258static int c2_rx_fill(struct c2_port *c2_port)
259{
260 struct c2_ring *rx_ring = &c2_port->rx_ring;
261 struct c2_element *elem;
262 int ret = 0;
263
264 elem = rx_ring->start;
265 do {
266 if (c2_rx_alloc(c2_port, elem)) {
267 ret = 1;
268 break;
269 }
270 } while ((elem = elem->next) != rx_ring->start);
271
272 rx_ring->to_clean = rx_ring->start;
273 return ret;
274}
275
276
277static void c2_rx_clean(struct c2_port *c2_port)
278{
279 struct c2_dev *c2dev = c2_port->c2dev;
280 struct c2_ring *rx_ring = &c2_port->rx_ring;
281 struct c2_element *elem;
282 struct c2_rx_desc *rx_desc;
283
284 elem = rx_ring->start;
285 do {
286 rx_desc = elem->ht_desc;
287 rx_desc->len = 0;
288
289 __raw_writew(0, elem->hw_desc + C2_RXP_STATUS);
290 __raw_writew(0, elem->hw_desc + C2_RXP_COUNT);
291 __raw_writew(0, elem->hw_desc + C2_RXP_LEN);
292 __raw_writeq((__force u64) cpu_to_be64(0x99aabbccddeeffULL),
293 elem->hw_desc + C2_RXP_ADDR);
294 __raw_writew((__force u16) cpu_to_be16(RXP_HRXD_UNINIT),
295 elem->hw_desc + C2_RXP_FLAGS);
296
297 if (elem->skb) {
298 pci_unmap_single(c2dev->pcidev, elem->mapaddr,
299 elem->maplen, PCI_DMA_FROMDEVICE);
300 dev_kfree_skb(elem->skb);
301 elem->skb = NULL;
302 }
303 } while ((elem = elem->next) != rx_ring->start);
304}
305
306static inline int c2_tx_free(struct c2_dev *c2dev, struct c2_element *elem)
307{
308 struct c2_tx_desc *tx_desc = elem->ht_desc;
309
310 tx_desc->len = 0;
311
312 pci_unmap_single(c2dev->pcidev, elem->mapaddr, elem->maplen,
313 PCI_DMA_TODEVICE);
314
315 if (elem->skb) {
316 dev_kfree_skb_any(elem->skb);
317 elem->skb = NULL;
318 }
319
320 return 0;
321}
322
323
324static void c2_tx_clean(struct c2_port *c2_port)
325{
326 struct c2_ring *tx_ring = &c2_port->tx_ring;
327 struct c2_element *elem;
328 struct c2_txp_desc txp_htxd;
329 int retry;
330 unsigned long flags;
331
332 spin_lock_irqsave(&c2_port->tx_lock, flags);
333
334 elem = tx_ring->start;
335
336 do {
337 retry = 0;
338 do {
339 txp_htxd.flags =
340 readw(elem->hw_desc + C2_TXP_FLAGS);
341
342 if (txp_htxd.flags == TXP_HTXD_READY) {
343 retry = 1;
344 __raw_writew(0,
345 elem->hw_desc + C2_TXP_LEN);
346 __raw_writeq(0,
347 elem->hw_desc + C2_TXP_ADDR);
348 __raw_writew((__force u16) cpu_to_be16(TXP_HTXD_DONE),
349 elem->hw_desc + C2_TXP_FLAGS);
350 c2_port->netdev->stats.tx_dropped++;
351 break;
352 } else {
353 __raw_writew(0,
354 elem->hw_desc + C2_TXP_LEN);
355 __raw_writeq((__force u64) cpu_to_be64(0x1122334455667788ULL),
356 elem->hw_desc + C2_TXP_ADDR);
357 __raw_writew((__force u16) cpu_to_be16(TXP_HTXD_UNINIT),
358 elem->hw_desc + C2_TXP_FLAGS);
359 }
360
361 c2_tx_free(c2_port->c2dev, elem);
362
363 } while ((elem = elem->next) != tx_ring->start);
364 } while (retry);
365
366 c2_port->tx_avail = c2_port->tx_ring.count - 1;
367 c2_port->c2dev->cur_tx = tx_ring->to_use - tx_ring->start;
368
369 if (c2_port->tx_avail > MAX_SKB_FRAGS + 1)
370 netif_wake_queue(c2_port->netdev);
371
372 spin_unlock_irqrestore(&c2_port->tx_lock, flags);
373}
374
375
376
377
378
379static void c2_tx_interrupt(struct net_device *netdev)
380{
381 struct c2_port *c2_port = netdev_priv(netdev);
382 struct c2_dev *c2dev = c2_port->c2dev;
383 struct c2_ring *tx_ring = &c2_port->tx_ring;
384 struct c2_element *elem;
385 struct c2_txp_desc txp_htxd;
386
387 spin_lock(&c2_port->tx_lock);
388
389 for (elem = tx_ring->to_clean; elem != tx_ring->to_use;
390 elem = elem->next) {
391 txp_htxd.flags =
392 be16_to_cpu((__force __be16) readw(elem->hw_desc + C2_TXP_FLAGS));
393
394 if (txp_htxd.flags != TXP_HTXD_DONE)
395 break;
396
397 if (netif_msg_tx_done(c2_port)) {
398
399 txp_htxd.len =
400 be16_to_cpu((__force __be16) readw(elem->hw_desc + C2_TXP_LEN));
401 pr_debug("%s: tx done slot %3Zu status 0x%x len "
402 "%5u bytes\n",
403 netdev->name, elem - tx_ring->start,
404 txp_htxd.flags, txp_htxd.len);
405 }
406
407 c2_tx_free(c2dev, elem);
408 ++(c2_port->tx_avail);
409 }
410
411 tx_ring->to_clean = elem;
412
413 if (netif_queue_stopped(netdev)
414 && c2_port->tx_avail > MAX_SKB_FRAGS + 1)
415 netif_wake_queue(netdev);
416
417 spin_unlock(&c2_port->tx_lock);
418}
419
420static void c2_rx_error(struct c2_port *c2_port, struct c2_element *elem)
421{
422 struct c2_rx_desc *rx_desc = elem->ht_desc;
423 struct c2_rxp_hdr *rxp_hdr = (struct c2_rxp_hdr *) elem->skb->data;
424
425 if (rxp_hdr->status != RXP_HRXD_OK ||
426 rxp_hdr->len > (rx_desc->len - sizeof(*rxp_hdr))) {
427 pr_debug("BAD RXP_HRXD\n");
428 pr_debug(" rx_desc : %p\n", rx_desc);
429 pr_debug(" index : %Zu\n",
430 elem - c2_port->rx_ring.start);
431 pr_debug(" len : %u\n", rx_desc->len);
432 pr_debug(" rxp_hdr : %p [PA %p]\n", rxp_hdr,
433 (void *) __pa((unsigned long) rxp_hdr));
434 pr_debug(" flags : 0x%x\n", rxp_hdr->flags);
435 pr_debug(" status: 0x%x\n", rxp_hdr->status);
436 pr_debug(" len : %u\n", rxp_hdr->len);
437 pr_debug(" rsvd : 0x%x\n", rxp_hdr->rsvd);
438 }
439
440
441 elem->skb->data = elem->skb->head;
442 skb_reset_tail_pointer(elem->skb);
443
444
445 memset(elem->skb->data, 0, sizeof(*rxp_hdr));
446
447
448 __raw_writew(0, elem->hw_desc + C2_RXP_STATUS);
449 __raw_writew(0, elem->hw_desc + C2_RXP_COUNT);
450 __raw_writew((__force u16) cpu_to_be16((u16) elem->maplen - sizeof(*rxp_hdr)),
451 elem->hw_desc + C2_RXP_LEN);
452 __raw_writeq((__force u64) cpu_to_be64(elem->mapaddr),
453 elem->hw_desc + C2_RXP_ADDR);
454 __raw_writew((__force u16) cpu_to_be16(RXP_HRXD_READY),
455 elem->hw_desc + C2_RXP_FLAGS);
456
457 pr_debug("packet dropped\n");
458 c2_port->netdev->stats.rx_dropped++;
459}
460
461static void c2_rx_interrupt(struct net_device *netdev)
462{
463 struct c2_port *c2_port = netdev_priv(netdev);
464 struct c2_dev *c2dev = c2_port->c2dev;
465 struct c2_ring *rx_ring = &c2_port->rx_ring;
466 struct c2_element *elem;
467 struct c2_rx_desc *rx_desc;
468 struct c2_rxp_hdr *rxp_hdr;
469 struct sk_buff *skb;
470 dma_addr_t mapaddr;
471 u32 maplen, buflen;
472 unsigned long flags;
473
474 spin_lock_irqsave(&c2dev->lock, flags);
475
476
477 rx_ring->to_clean = rx_ring->start + c2dev->cur_rx;
478
479 for (elem = rx_ring->to_clean; elem->next != rx_ring->to_clean;
480 elem = elem->next) {
481 rx_desc = elem->ht_desc;
482 mapaddr = elem->mapaddr;
483 maplen = elem->maplen;
484 skb = elem->skb;
485 rxp_hdr = (struct c2_rxp_hdr *) skb->data;
486
487 if (rxp_hdr->flags != RXP_HRXD_DONE)
488 break;
489 buflen = rxp_hdr->len;
490
491
492 if (rxp_hdr->status != RXP_HRXD_OK ||
493 buflen > (rx_desc->len - sizeof(*rxp_hdr))) {
494 c2_rx_error(c2_port, elem);
495 continue;
496 }
497
498
499
500
501
502 if (c2_rx_alloc(c2_port, elem)) {
503 c2_rx_error(c2_port, elem);
504 continue;
505 }
506
507
508 pci_unmap_single(c2dev->pcidev, mapaddr, maplen,
509 PCI_DMA_FROMDEVICE);
510
511 prefetch(skb->data);
512
513
514
515
516
517
518
519
520
521
522
523
524
525 skb->data += sizeof(*rxp_hdr);
526 skb_set_tail_pointer(skb, buflen);
527 skb->len = buflen;
528 skb->protocol = eth_type_trans(skb, netdev);
529
530 netif_rx(skb);
531
532 netdev->stats.rx_packets++;
533 netdev->stats.rx_bytes += buflen;
534 }
535
536
537 rx_ring->to_clean = elem;
538 c2dev->cur_rx = elem - rx_ring->start;
539 C2_SET_CUR_RX(c2dev, c2dev->cur_rx);
540
541 spin_unlock_irqrestore(&c2dev->lock, flags);
542}
543
544
545
546
547static irqreturn_t c2_interrupt(int irq, void *dev_id)
548{
549 unsigned int netisr0, dmaisr;
550 int handled = 0;
551 struct c2_dev *c2dev = (struct c2_dev *) dev_id;
552
553
554 netisr0 = readl(c2dev->regs + C2_NISR0);
555 if (netisr0) {
556
557
558
559
560
561
562 c2_rx_interrupt(c2dev->netdev);
563 c2_tx_interrupt(c2dev->netdev);
564
565
566 writel(netisr0, c2dev->regs + C2_NISR0);
567 handled++;
568 }
569
570
571 dmaisr = readl(c2dev->regs + C2_DISR);
572 if (dmaisr) {
573 writel(dmaisr, c2dev->regs + C2_DISR);
574 c2_rnic_interrupt(c2dev);
575 handled++;
576 }
577
578 if (handled) {
579 return IRQ_HANDLED;
580 } else {
581 return IRQ_NONE;
582 }
583}
584
585static int c2_up(struct net_device *netdev)
586{
587 struct c2_port *c2_port = netdev_priv(netdev);
588 struct c2_dev *c2dev = c2_port->c2dev;
589 struct c2_element *elem;
590 struct c2_rxp_hdr *rxp_hdr;
591 struct in_device *in_dev;
592 size_t rx_size, tx_size;
593 int ret, i;
594 unsigned int netimr0;
595
596 if (netif_msg_ifup(c2_port))
597 pr_debug("%s: enabling interface\n", netdev->name);
598
599
600 c2_set_rxbufsize(c2_port);
601
602
603 rx_size = c2_port->rx_ring.count * sizeof(struct c2_rx_desc);
604 tx_size = c2_port->tx_ring.count * sizeof(struct c2_tx_desc);
605
606 c2_port->mem_size = tx_size + rx_size;
607 c2_port->mem = pci_zalloc_consistent(c2dev->pcidev, c2_port->mem_size,
608 &c2_port->dma);
609 if (c2_port->mem == NULL) {
610 pr_debug("Unable to allocate memory for "
611 "host descriptor rings\n");
612 return -ENOMEM;
613 }
614
615
616 if ((ret =
617 c2_rx_ring_alloc(&c2_port->rx_ring, c2_port->mem, c2_port->dma,
618 c2dev->mmio_rxp_ring))) {
619 pr_debug("Unable to create RX ring\n");
620 goto bail0;
621 }
622
623
624 if (c2_rx_fill(c2_port)) {
625 pr_debug("Unable to fill RX ring\n");
626 goto bail1;
627 }
628
629
630 if ((ret = c2_tx_ring_alloc(&c2_port->tx_ring, c2_port->mem + rx_size,
631 c2_port->dma + rx_size,
632 c2dev->mmio_txp_ring))) {
633 pr_debug("Unable to create TX ring\n");
634 goto bail1;
635 }
636
637
638 c2_port->tx_avail = c2_port->tx_ring.count - 1;
639 c2_port->tx_ring.to_use = c2_port->tx_ring.to_clean =
640 c2_port->tx_ring.start + c2dev->cur_tx;
641
642
643
644 BUG_ON(c2_port->tx_ring.to_use != c2_port->tx_ring.to_clean);
645
646
647 c2_reset(c2_port);
648
649
650 for (i = 0, elem = c2_port->rx_ring.start; i < c2_port->rx_ring.count;
651 i++, elem++) {
652 rxp_hdr = (struct c2_rxp_hdr *) elem->skb->data;
653 rxp_hdr->flags = 0;
654 __raw_writew((__force u16) cpu_to_be16(RXP_HRXD_READY),
655 elem->hw_desc + C2_RXP_FLAGS);
656 }
657
658
659 netif_start_queue(netdev);
660
661
662 writel(0, c2dev->regs + C2_IDIS);
663 netimr0 = readl(c2dev->regs + C2_NIMR0);
664 netimr0 &= ~(C2_PCI_HTX_INT | C2_PCI_HRX_INT);
665 writel(netimr0, c2dev->regs + C2_NIMR0);
666
667
668
669
670
671
672 in_dev = in_dev_get(netdev);
673 IN_DEV_CONF_SET(in_dev, ARP_IGNORE, 1);
674 in_dev_put(in_dev);
675
676 return 0;
677
678 bail1:
679 c2_rx_clean(c2_port);
680 kfree(c2_port->rx_ring.start);
681
682 bail0:
683 pci_free_consistent(c2dev->pcidev, c2_port->mem_size, c2_port->mem,
684 c2_port->dma);
685
686 return ret;
687}
688
689static int c2_down(struct net_device *netdev)
690{
691 struct c2_port *c2_port = netdev_priv(netdev);
692 struct c2_dev *c2dev = c2_port->c2dev;
693
694 if (netif_msg_ifdown(c2_port))
695 pr_debug("%s: disabling interface\n",
696 netdev->name);
697
698
699 c2_tx_interrupt(netdev);
700
701
702 netif_stop_queue(netdev);
703
704
705 writel(1, c2dev->regs + C2_IDIS);
706 writel(0, c2dev->regs + C2_NIMR0);
707
708
709
710
711
712
713 c2_reset(c2_port);
714
715
716
717
718 c2_tx_clean(c2_port);
719 c2_rx_clean(c2_port);
720
721
722 kfree(c2_port->rx_ring.start);
723 kfree(c2_port->tx_ring.start);
724 pci_free_consistent(c2dev->pcidev, c2_port->mem_size, c2_port->mem,
725 c2_port->dma);
726
727 return 0;
728}
729
730static void c2_reset(struct c2_port *c2_port)
731{
732 struct c2_dev *c2dev = c2_port->c2dev;
733 unsigned int cur_rx = c2dev->cur_rx;
734
735
736 C2_SET_CUR_RX(c2dev, cur_rx | C2_PCI_HRX_QUI);
737
738
739
740
741
742 ssleep(2);
743
744 cur_rx = C2_GET_CUR_RX(c2dev);
745
746 if (cur_rx & C2_PCI_HRX_QUI)
747 pr_debug("c2_reset: failed to quiesce the hardware!\n");
748
749 cur_rx &= ~C2_PCI_HRX_QUI;
750
751 c2dev->cur_rx = cur_rx;
752
753 pr_debug("Current RX: %u\n", c2dev->cur_rx);
754}
755
756static int c2_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
757{
758 struct c2_port *c2_port = netdev_priv(netdev);
759 struct c2_dev *c2dev = c2_port->c2dev;
760 struct c2_ring *tx_ring = &c2_port->tx_ring;
761 struct c2_element *elem;
762 dma_addr_t mapaddr;
763 u32 maplen;
764 unsigned long flags;
765 unsigned int i;
766
767 spin_lock_irqsave(&c2_port->tx_lock, flags);
768
769 if (unlikely(c2_port->tx_avail < (skb_shinfo(skb)->nr_frags + 1))) {
770 netif_stop_queue(netdev);
771 spin_unlock_irqrestore(&c2_port->tx_lock, flags);
772
773 pr_debug("%s: Tx ring full when queue awake!\n",
774 netdev->name);
775 return NETDEV_TX_BUSY;
776 }
777
778 maplen = skb_headlen(skb);
779 mapaddr =
780 pci_map_single(c2dev->pcidev, skb->data, maplen, PCI_DMA_TODEVICE);
781
782 elem = tx_ring->to_use;
783 elem->skb = skb;
784 elem->mapaddr = mapaddr;
785 elem->maplen = maplen;
786
787
788 __raw_writeq((__force u64) cpu_to_be64(mapaddr),
789 elem->hw_desc + C2_TXP_ADDR);
790 __raw_writew((__force u16) cpu_to_be16(maplen),
791 elem->hw_desc + C2_TXP_LEN);
792 __raw_writew((__force u16) cpu_to_be16(TXP_HTXD_READY),
793 elem->hw_desc + C2_TXP_FLAGS);
794
795 netdev->stats.tx_packets++;
796 netdev->stats.tx_bytes += maplen;
797
798
799 if (skb_shinfo(skb)->nr_frags) {
800 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
801 const skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
802 maplen = skb_frag_size(frag);
803 mapaddr = skb_frag_dma_map(&c2dev->pcidev->dev, frag,
804 0, maplen, DMA_TO_DEVICE);
805 elem = elem->next;
806 elem->skb = NULL;
807 elem->mapaddr = mapaddr;
808 elem->maplen = maplen;
809
810
811 __raw_writeq((__force u64) cpu_to_be64(mapaddr),
812 elem->hw_desc + C2_TXP_ADDR);
813 __raw_writew((__force u16) cpu_to_be16(maplen),
814 elem->hw_desc + C2_TXP_LEN);
815 __raw_writew((__force u16) cpu_to_be16(TXP_HTXD_READY),
816 elem->hw_desc + C2_TXP_FLAGS);
817
818 netdev->stats.tx_packets++;
819 netdev->stats.tx_bytes += maplen;
820 }
821 }
822
823 tx_ring->to_use = elem->next;
824 c2_port->tx_avail -= (skb_shinfo(skb)->nr_frags + 1);
825
826 if (c2_port->tx_avail <= MAX_SKB_FRAGS + 1) {
827 netif_stop_queue(netdev);
828 if (netif_msg_tx_queued(c2_port))
829 pr_debug("%s: transmit queue full\n",
830 netdev->name);
831 }
832
833 spin_unlock_irqrestore(&c2_port->tx_lock, flags);
834
835 netdev->trans_start = jiffies;
836
837 return NETDEV_TX_OK;
838}
839
840static void c2_tx_timeout(struct net_device *netdev)
841{
842 struct c2_port *c2_port = netdev_priv(netdev);
843
844 if (netif_msg_timer(c2_port))
845 pr_debug("%s: tx timeout\n", netdev->name);
846
847 c2_tx_clean(c2_port);
848}
849
850static int c2_change_mtu(struct net_device *netdev, int new_mtu)
851{
852 int ret = 0;
853
854 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
855 return -EINVAL;
856
857 netdev->mtu = new_mtu;
858
859 if (netif_running(netdev)) {
860 c2_down(netdev);
861
862 c2_up(netdev);
863 }
864
865 return ret;
866}
867
868static const struct net_device_ops c2_netdev = {
869 .ndo_open = c2_up,
870 .ndo_stop = c2_down,
871 .ndo_start_xmit = c2_xmit_frame,
872 .ndo_tx_timeout = c2_tx_timeout,
873 .ndo_change_mtu = c2_change_mtu,
874 .ndo_set_mac_address = eth_mac_addr,
875 .ndo_validate_addr = eth_validate_addr,
876};
877
878
879static struct net_device *c2_devinit(struct c2_dev *c2dev,
880 void __iomem * mmio_addr)
881{
882 struct c2_port *c2_port = NULL;
883 struct net_device *netdev = alloc_etherdev(sizeof(*c2_port));
884
885 if (!netdev) {
886 pr_debug("c2_port etherdev alloc failed");
887 return NULL;
888 }
889
890 SET_NETDEV_DEV(netdev, &c2dev->pcidev->dev);
891
892 netdev->netdev_ops = &c2_netdev;
893 netdev->watchdog_timeo = C2_TX_TIMEOUT;
894 netdev->irq = c2dev->pcidev->irq;
895
896 c2_port = netdev_priv(netdev);
897 c2_port->netdev = netdev;
898 c2_port->c2dev = c2dev;
899 c2_port->msg_enable = netif_msg_init(debug, default_msg);
900 c2_port->tx_ring.count = C2_NUM_TX_DESC;
901 c2_port->rx_ring.count = C2_NUM_RX_DESC;
902
903 spin_lock_init(&c2_port->tx_lock);
904
905
906 memcpy_fromio(netdev->dev_addr, mmio_addr + C2_REGS_ENADDR, 6);
907
908
909 if (!is_valid_ether_addr(netdev->dev_addr)) {
910 pr_debug("Invalid MAC Address\n");
911 c2_print_macaddr(netdev);
912 free_netdev(netdev);
913 return NULL;
914 }
915
916 c2dev->netdev = netdev;
917
918 return netdev;
919}
920
921static int c2_probe(struct pci_dev *pcidev, const struct pci_device_id *ent)
922{
923 int ret = 0, i;
924 unsigned long reg0_start, reg0_flags, reg0_len;
925 unsigned long reg2_start, reg2_flags, reg2_len;
926 unsigned long reg4_start, reg4_flags, reg4_len;
927 unsigned kva_map_size;
928 struct net_device *netdev = NULL;
929 struct c2_dev *c2dev = NULL;
930 void __iomem *mmio_regs = NULL;
931
932 printk(KERN_INFO PFX "AMSO1100 Gigabit Ethernet driver v%s loaded\n",
933 DRV_VERSION);
934
935
936 ret = pci_enable_device(pcidev);
937 if (ret) {
938 printk(KERN_ERR PFX "%s: Unable to enable PCI device\n",
939 pci_name(pcidev));
940 goto bail0;
941 }
942
943 reg0_start = pci_resource_start(pcidev, BAR_0);
944 reg0_len = pci_resource_len(pcidev, BAR_0);
945 reg0_flags = pci_resource_flags(pcidev, BAR_0);
946
947 reg2_start = pci_resource_start(pcidev, BAR_2);
948 reg2_len = pci_resource_len(pcidev, BAR_2);
949 reg2_flags = pci_resource_flags(pcidev, BAR_2);
950
951 reg4_start = pci_resource_start(pcidev, BAR_4);
952 reg4_len = pci_resource_len(pcidev, BAR_4);
953 reg4_flags = pci_resource_flags(pcidev, BAR_4);
954
955 pr_debug("BAR0 size = 0x%lX bytes\n", reg0_len);
956 pr_debug("BAR2 size = 0x%lX bytes\n", reg2_len);
957 pr_debug("BAR4 size = 0x%lX bytes\n", reg4_len);
958
959
960 if (!(reg0_flags & IORESOURCE_MEM) ||
961 !(reg2_flags & IORESOURCE_MEM) || !(reg4_flags & IORESOURCE_MEM)) {
962 printk(KERN_ERR PFX "PCI regions not an MMIO resource\n");
963 ret = -ENODEV;
964 goto bail1;
965 }
966
967
968 if ((reg0_len < C2_REG0_SIZE) ||
969 (reg2_len < C2_REG2_SIZE) || (reg4_len < C2_REG4_SIZE)) {
970 printk(KERN_ERR PFX "Invalid PCI region sizes\n");
971 ret = -ENODEV;
972 goto bail1;
973 }
974
975
976 ret = pci_request_regions(pcidev, DRV_NAME);
977 if (ret) {
978 printk(KERN_ERR PFX "%s: Unable to request regions\n",
979 pci_name(pcidev));
980 goto bail1;
981 }
982
983 if ((sizeof(dma_addr_t) > 4)) {
984 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(64));
985 if (ret < 0) {
986 printk(KERN_ERR PFX "64b DMA configuration failed\n");
987 goto bail2;
988 }
989 } else {
990 ret = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32));
991 if (ret < 0) {
992 printk(KERN_ERR PFX "32b DMA configuration failed\n");
993 goto bail2;
994 }
995 }
996
997
998 pci_set_master(pcidev);
999
1000
1001 mmio_regs = ioremap_nocache(reg4_start + C2_PCI_REGS_OFFSET,
1002 sizeof(struct c2_adapter_pci_regs));
1003 if (!mmio_regs) {
1004 printk(KERN_ERR PFX
1005 "Unable to remap adapter PCI registers in BAR4\n");
1006 ret = -EIO;
1007 goto bail2;
1008 }
1009
1010
1011 for (i = 0; i < sizeof(c2_magic); i++) {
1012 if (c2_magic[i] != readb(mmio_regs + C2_REGS_MAGIC + i)) {
1013 printk(KERN_ERR PFX "Downlevel Firmware boot loader "
1014 "[%d/%Zd: got 0x%x, exp 0x%x]. Use the cc_flash "
1015 "utility to update your boot loader\n",
1016 i + 1, sizeof(c2_magic),
1017 readb(mmio_regs + C2_REGS_MAGIC + i),
1018 c2_magic[i]);
1019 printk(KERN_ERR PFX "Adapter not claimed\n");
1020 iounmap(mmio_regs);
1021 ret = -EIO;
1022 goto bail2;
1023 }
1024 }
1025
1026
1027 if (be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_VERS)) != C2_VERSION) {
1028 printk(KERN_ERR PFX "Version mismatch "
1029 "[fw=%u, c2=%u], Adapter not claimed\n",
1030 be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_VERS)),
1031 C2_VERSION);
1032 ret = -EINVAL;
1033 iounmap(mmio_regs);
1034 goto bail2;
1035 }
1036
1037
1038 if (be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_IVN)) != C2_IVN) {
1039 printk(KERN_ERR PFX "Downlevel FIrmware level. You should be using "
1040 "the OpenIB device support kit. "
1041 "[fw=0x%x, c2=0x%x], Adapter not claimed\n",
1042 be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_IVN)),
1043 C2_IVN);
1044 ret = -EINVAL;
1045 iounmap(mmio_regs);
1046 goto bail2;
1047 }
1048
1049
1050 c2dev = (struct c2_dev *) ib_alloc_device(sizeof(*c2dev));
1051 if (!c2dev) {
1052 printk(KERN_ERR PFX "%s: Unable to alloc hardware struct\n",
1053 pci_name(pcidev));
1054 ret = -ENOMEM;
1055 iounmap(mmio_regs);
1056 goto bail2;
1057 }
1058
1059 memset(c2dev, 0, sizeof(*c2dev));
1060 spin_lock_init(&c2dev->lock);
1061 c2dev->pcidev = pcidev;
1062 c2dev->cur_tx = 0;
1063
1064
1065 c2dev->cur_rx =
1066 (be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_HRX_CUR)) -
1067 0xffffc000) / sizeof(struct c2_rxp_desc);
1068
1069
1070 ret = request_irq(pcidev->irq, c2_interrupt, IRQF_SHARED, DRV_NAME, c2dev);
1071 if (ret) {
1072 printk(KERN_ERR PFX "%s: requested IRQ %u is busy\n",
1073 pci_name(pcidev), pcidev->irq);
1074 iounmap(mmio_regs);
1075 goto bail3;
1076 }
1077
1078
1079 pci_set_drvdata(pcidev, c2dev);
1080
1081
1082 if ((netdev = c2_devinit(c2dev, mmio_regs)) == NULL) {
1083 ret = -ENOMEM;
1084 iounmap(mmio_regs);
1085 goto bail4;
1086 }
1087
1088
1089 kva_map_size = be32_to_cpu((__force __be32) readl(mmio_regs + C2_REGS_PCI_WINSIZE));
1090
1091
1092 iounmap(mmio_regs);
1093
1094
1095 ret = register_netdev(netdev);
1096 if (ret) {
1097 printk(KERN_ERR PFX "Unable to register netdev, ret = %d\n",
1098 ret);
1099 goto bail5;
1100 }
1101
1102
1103 netif_stop_queue(netdev);
1104
1105
1106 c2dev->mmio_rxp_ring = ioremap_nocache(reg4_start + C2_RXP_HRXDQ_OFFSET,
1107 C2_RXP_HRXDQ_SIZE);
1108 if (!c2dev->mmio_rxp_ring) {
1109 printk(KERN_ERR PFX "Unable to remap MMIO HRXDQ region\n");
1110 ret = -EIO;
1111 goto bail6;
1112 }
1113
1114
1115 c2dev->mmio_txp_ring = ioremap_nocache(reg4_start + C2_TXP_HTXDQ_OFFSET,
1116 C2_TXP_HTXDQ_SIZE);
1117 if (!c2dev->mmio_txp_ring) {
1118 printk(KERN_ERR PFX "Unable to remap MMIO HTXDQ region\n");
1119 ret = -EIO;
1120 goto bail7;
1121 }
1122
1123
1124 C2_SET_CUR_RX(c2dev, c2dev->cur_rx);
1125
1126
1127 c2dev->regs = ioremap_nocache(reg0_start, reg0_len);
1128 if (!c2dev->regs) {
1129 printk(KERN_ERR PFX "Unable to remap BAR0\n");
1130 ret = -EIO;
1131 goto bail8;
1132 }
1133
1134
1135 c2dev->pa = reg4_start + C2_PCI_REGS_OFFSET;
1136 c2dev->kva = ioremap_nocache(reg4_start + C2_PCI_REGS_OFFSET,
1137 kva_map_size);
1138 if (!c2dev->kva) {
1139 printk(KERN_ERR PFX "Unable to remap BAR4\n");
1140 ret = -EIO;
1141 goto bail9;
1142 }
1143
1144
1145 c2_print_macaddr(netdev);
1146
1147 ret = c2_rnic_init(c2dev);
1148 if (ret) {
1149 printk(KERN_ERR PFX "c2_rnic_init failed: %d\n", ret);
1150 goto bail10;
1151 }
1152
1153 ret = c2_register_device(c2dev);
1154 if (ret)
1155 goto bail10;
1156
1157 return 0;
1158
1159 bail10:
1160 iounmap(c2dev->kva);
1161
1162 bail9:
1163 iounmap(c2dev->regs);
1164
1165 bail8:
1166 iounmap(c2dev->mmio_txp_ring);
1167
1168 bail7:
1169 iounmap(c2dev->mmio_rxp_ring);
1170
1171 bail6:
1172 unregister_netdev(netdev);
1173
1174 bail5:
1175 free_netdev(netdev);
1176
1177 bail4:
1178 free_irq(pcidev->irq, c2dev);
1179
1180 bail3:
1181 ib_dealloc_device(&c2dev->ibdev);
1182
1183 bail2:
1184 pci_release_regions(pcidev);
1185
1186 bail1:
1187 pci_disable_device(pcidev);
1188
1189 bail0:
1190 return ret;
1191}
1192
1193static void c2_remove(struct pci_dev *pcidev)
1194{
1195 struct c2_dev *c2dev = pci_get_drvdata(pcidev);
1196 struct net_device *netdev = c2dev->netdev;
1197
1198
1199 c2_unregister_device(c2dev);
1200
1201
1202 c2_rnic_term(c2dev);
1203
1204
1205 unregister_netdev(netdev);
1206
1207
1208 free_netdev(netdev);
1209
1210
1211 free_irq(pcidev->irq, c2dev);
1212
1213
1214
1215
1216 iounmap(c2dev->kva);
1217 iounmap(c2dev->regs);
1218 iounmap(c2dev->mmio_txp_ring);
1219 iounmap(c2dev->mmio_rxp_ring);
1220
1221
1222 ib_dealloc_device(&c2dev->ibdev);
1223
1224
1225 pci_release_regions(pcidev);
1226
1227
1228 pci_disable_device(pcidev);
1229
1230
1231 pci_set_drvdata(pcidev, NULL);
1232}
1233
1234static struct pci_driver c2_pci_driver = {
1235 .name = DRV_NAME,
1236 .id_table = c2_pci_table,
1237 .probe = c2_probe,
1238 .remove = c2_remove,
1239};
1240
1241module_pci_driver(c2_pci_driver);
1242