LXR linux/drivers/media/i2c/tvp7002.c

   1/* Texas Instruments Triple 8-/10-BIT 165-/110-MSPS Video and Graphics
   2 * Digitizer with Horizontal PLL registers
   3 *
   4 * Copyright (C) 2009 Texas Instruments Inc
   5 * Author: Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>
   6 *
   7 * This code is partially based upon the TVP5150 driver
   8 * written by Mauro Carvalho Chehab (mchehab@infradead.org),
   9 * the TVP514x driver written by Vaibhav Hiremath <hvaibhav@ti.com>
  10 * and the TVP7002 driver in the TI LSP 2.10.00.14. Revisions by
  11 * Muralidharan Karicheri and Snehaprabha Narnakaje (TI).
  12 *
  13 * This program is free software; you can redistribute it and/or modify
  14 * it under the terms of the GNU General Public License as published by
  15 * the Free Software Foundation; either version 2 of the License, or
  16 * (at your option) any later version.
  17 *
  18 * This program is distributed in the hope that it will be useful,
  19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  21 * GNU General Public License for more details.
  22 *
  23 * You should have received a copy of the GNU General Public License
  24 * along with this program; if not, write to the Free Software
  25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26 */
  27#include <linux/delay.h>
  28#include <linux/i2c.h>
  29#include <linux/slab.h>
  30#include <linux/videodev2.h>
  31#include <linux/module.h>
  32#include <linux/of.h>
  33#include <linux/of_graph.h>
  34#include <linux/v4l2-dv-timings.h>
  35#include <media/tvp7002.h>
  36#include <media/v4l2-async.h>
  37#include <media/v4l2-device.h>
  38#include <media/v4l2-common.h>
  39#include <media/v4l2-ctrls.h>
  40#include <media/v4l2-of.h>
  41
  42#include "tvp7002_reg.h"
  43
  44MODULE_DESCRIPTION("TI TVP7002 Video and Graphics Digitizer driver");
  45MODULE_AUTHOR("Santiago Nunez-Corrales <santiago.nunez@ridgerun.com>");
  46MODULE_LICENSE("GPL");
  47
  48/* I2C retry attempts */
  49#define I2C_RETRY_COUNT         (5)
  50
  51/* End of registers */
  52#define TVP7002_EOR             0x5c
  53
  54/* Read write definition for registers */
  55#define TVP7002_READ            0
  56#define TVP7002_WRITE           1
  57#define TVP7002_RESERVED        2
  58
  59/* Interlaced vs progressive mask and shift */
  60#define TVP7002_IP_SHIFT        5
  61#define TVP7002_INPR_MASK       (0x01 << TVP7002_IP_SHIFT)
  62
  63/* Shift for CPL and LPF registers */
  64#define TVP7002_CL_SHIFT        8
  65#define TVP7002_CL_MASK         0x0f
  66
  67/* Debug functions */
  68static bool debug;
  69module_param(debug, bool, 0644);
  70MODULE_PARM_DESC(debug, "Debug level (0-2)");
  71
  72/* Structure for register values */
  73struct i2c_reg_value {
  74        u8 reg;
  75        u8 value;
  76        u8 type;
  77};
  78
  79/*
  80 * Register default values (according to tvp7002 datasheet)
  81 * In the case of read-only registers, the value (0xff) is
  82 * never written. R/W functionality is controlled by the
  83 * writable bit in the register struct definition.
  84 */
  85static const struct i2c_reg_value tvp7002_init_default[] = {
  86        { TVP7002_CHIP_REV, 0xff, TVP7002_READ },
  87        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
  88        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
  89        { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
  90        { TVP7002_HPLL_PHASE_SEL, 0x80, TVP7002_WRITE },
  91        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
  92        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
  93        { TVP7002_HSYNC_OUT_W, 0x60, TVP7002_WRITE },
  94        { TVP7002_B_FINE_GAIN, 0x00, TVP7002_WRITE },
  95        { TVP7002_G_FINE_GAIN, 0x00, TVP7002_WRITE },
  96        { TVP7002_R_FINE_GAIN, 0x00, TVP7002_WRITE },
  97        { TVP7002_B_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  98        { TVP7002_G_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
  99        { TVP7002_R_FINE_OFF_MSBS, 0x80, TVP7002_WRITE },
 100        { TVP7002_SYNC_CTL_1, 0x20, TVP7002_WRITE },
 101        { TVP7002_HPLL_AND_CLAMP_CTL, 0x2e, TVP7002_WRITE },
 102        { TVP7002_SYNC_ON_G_THRS, 0x5d, TVP7002_WRITE },
 103        { TVP7002_SYNC_SEPARATOR_THRS, 0x47, TVP7002_WRITE },
 104        { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
 105        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 106        { TVP7002_SYNC_DETECT_STAT, 0xff, TVP7002_READ },
 107        { TVP7002_OUT_FORMATTER, 0x47, TVP7002_WRITE },
 108        { TVP7002_MISC_CTL_1, 0x01, TVP7002_WRITE },
 109        { TVP7002_MISC_CTL_2, 0x00, TVP7002_WRITE },
 110        { TVP7002_MISC_CTL_3, 0x01, TVP7002_WRITE },
 111        { TVP7002_IN_MUX_SEL_1, 0x00, TVP7002_WRITE },
 112        { TVP7002_IN_MUX_SEL_2, 0x67, TVP7002_WRITE },
 113        { TVP7002_B_AND_G_COARSE_GAIN, 0x77, TVP7002_WRITE },
 114        { TVP7002_R_COARSE_GAIN, 0x07, TVP7002_WRITE },
 115        { TVP7002_FINE_OFF_LSBS, 0x00, TVP7002_WRITE },
 116        { TVP7002_B_COARSE_OFF, 0x10, TVP7002_WRITE },
 117        { TVP7002_G_COARSE_OFF, 0x10, TVP7002_WRITE },
 118        { TVP7002_R_COARSE_OFF, 0x10, TVP7002_WRITE },
 119        { TVP7002_HSOUT_OUT_START, 0x08, TVP7002_WRITE },
 120        { TVP7002_MISC_CTL_4, 0x00, TVP7002_WRITE },
 121        { TVP7002_B_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
 122        { TVP7002_G_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
 123        { TVP7002_R_DGTL_ALC_OUT_LSBS, 0xff, TVP7002_READ },
 124        { TVP7002_AUTO_LVL_CTL_ENABLE, 0x80, TVP7002_WRITE },
 125        { TVP7002_DGTL_ALC_OUT_MSBS, 0xff, TVP7002_READ },
 126        { TVP7002_AUTO_LVL_CTL_FILTER, 0x53, TVP7002_WRITE },
 127        { 0x29, 0x08, TVP7002_RESERVED },
 128        { TVP7002_FINE_CLAMP_CTL, 0x07, TVP7002_WRITE },
 129        /* PWR_CTL is controlled only by the probe and reset functions */
 130        { TVP7002_PWR_CTL, 0x00, TVP7002_RESERVED },
 131        { TVP7002_ADC_SETUP, 0x50, TVP7002_WRITE },
 132        { TVP7002_COARSE_CLAMP_CTL, 0x00, TVP7002_WRITE },
 133        { TVP7002_SOG_CLAMP, 0x80, TVP7002_WRITE },
 134        { TVP7002_RGB_COARSE_CLAMP_CTL, 0x8c, TVP7002_WRITE },
 135        { TVP7002_SOG_COARSE_CLAMP_CTL, 0x04, TVP7002_WRITE },
 136        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 137        { 0x32, 0x18, TVP7002_RESERVED },
 138        { 0x33, 0x60, TVP7002_RESERVED },
 139        { TVP7002_MVIS_STRIPPER_W, 0xff, TVP7002_RESERVED },
 140        { TVP7002_VSYNC_ALGN, 0x10, TVP7002_WRITE },
 141        { TVP7002_SYNC_BYPASS, 0x00, TVP7002_WRITE },
 142        { TVP7002_L_FRAME_STAT_LSBS, 0xff, TVP7002_READ },
 143        { TVP7002_L_FRAME_STAT_MSBS, 0xff, TVP7002_READ },
 144        { TVP7002_CLK_L_STAT_LSBS, 0xff, TVP7002_READ },
 145        { TVP7002_CLK_L_STAT_MSBS, 0xff, TVP7002_READ },
 146        { TVP7002_HSYNC_W, 0xff, TVP7002_READ },
 147        { TVP7002_VSYNC_W, 0xff, TVP7002_READ },
 148        { TVP7002_L_LENGTH_TOL, 0x03, TVP7002_WRITE },
 149        { 0x3e, 0x60, TVP7002_RESERVED },
 150        { TVP7002_VIDEO_BWTH_CTL, 0x01, TVP7002_WRITE },
 151        { TVP7002_AVID_START_PIXEL_LSBS, 0x01, TVP7002_WRITE },
 152        { TVP7002_AVID_START_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
 153        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 154        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x2c, TVP7002_WRITE },
 155        { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
 156        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 157        { TVP7002_VBLK_F_0_DURATION, 0x1e, TVP7002_WRITE },
 158        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 159        { TVP7002_FBIT_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
 160        { TVP7002_FBIT_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 161        { TVP7002_YUV_Y_G_COEF_LSBS, 0xe3, TVP7002_WRITE },
 162        { TVP7002_YUV_Y_G_COEF_MSBS, 0x16, TVP7002_WRITE },
 163        { TVP7002_YUV_Y_B_COEF_LSBS, 0x4f, TVP7002_WRITE },
 164        { TVP7002_YUV_Y_B_COEF_MSBS, 0x02, TVP7002_WRITE },
 165        { TVP7002_YUV_Y_R_COEF_LSBS, 0xce, TVP7002_WRITE },
 166        { TVP7002_YUV_Y_R_COEF_MSBS, 0x06, TVP7002_WRITE },
 167        { TVP7002_YUV_U_G_COEF_LSBS, 0xab, TVP7002_WRITE },
 168        { TVP7002_YUV_U_G_COEF_MSBS, 0xf3, TVP7002_WRITE },
 169        { TVP7002_YUV_U_B_COEF_LSBS, 0x00, TVP7002_WRITE },
 170        { TVP7002_YUV_U_B_COEF_MSBS, 0x10, TVP7002_WRITE },
 171        { TVP7002_YUV_U_R_COEF_LSBS, 0x55, TVP7002_WRITE },
 172        { TVP7002_YUV_U_R_COEF_MSBS, 0xfc, TVP7002_WRITE },
 173        { TVP7002_YUV_V_G_COEF_LSBS, 0x78, TVP7002_WRITE },
 174        { TVP7002_YUV_V_G_COEF_MSBS, 0xf1, TVP7002_WRITE },
 175        { TVP7002_YUV_V_B_COEF_LSBS, 0x88, TVP7002_WRITE },
 176        { TVP7002_YUV_V_B_COEF_MSBS, 0xfe, TVP7002_WRITE },
 177        { TVP7002_YUV_V_R_COEF_LSBS, 0x00, TVP7002_WRITE },
 178        { TVP7002_YUV_V_R_COEF_MSBS, 0x10, TVP7002_WRITE },
 179        /* This signals end of register values */
 180        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 181};
 182
 183/* Register parameters for 480P */
 184static const struct i2c_reg_value tvp7002_parms_480P[] = {
 185        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x35, TVP7002_WRITE },
 186        { TVP7002_HPLL_FDBK_DIV_LSBS, 0xa0, TVP7002_WRITE },
 187        { TVP7002_HPLL_CRTL, 0x02, TVP7002_WRITE },
 188        { TVP7002_AVID_START_PIXEL_LSBS, 0x91, TVP7002_WRITE },
 189        { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 190        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0B, TVP7002_WRITE },
 191        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 192        { TVP7002_VBLK_F_0_START_L_OFF, 0x03, TVP7002_WRITE },
 193        { TVP7002_VBLK_F_1_START_L_OFF, 0x01, TVP7002_WRITE },
 194        { TVP7002_VBLK_F_0_DURATION, 0x13, TVP7002_WRITE },
 195        { TVP7002_VBLK_F_1_DURATION, 0x13, TVP7002_WRITE },
 196        { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
 197        { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
 198        { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
 199        { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
 200        { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
 201        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 202};
 203
 204/* Register parameters for 576P */
 205static const struct i2c_reg_value tvp7002_parms_576P[] = {
 206        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x36, TVP7002_WRITE },
 207        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
 208        { TVP7002_HPLL_CRTL, 0x18, TVP7002_WRITE },
 209        { TVP7002_AVID_START_PIXEL_LSBS, 0x9B, TVP7002_WRITE },
 210        { TVP7002_AVID_START_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 211        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x0F, TVP7002_WRITE },
 212        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x00, TVP7002_WRITE },
 213        { TVP7002_VBLK_F_0_START_L_OFF, 0x00, TVP7002_WRITE },
 214        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 215        { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
 216        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 217        { TVP7002_ALC_PLACEMENT, 0x18, TVP7002_WRITE },
 218        { TVP7002_CLAMP_START, 0x06, TVP7002_WRITE },
 219        { TVP7002_CLAMP_W, 0x10, TVP7002_WRITE },
 220        { TVP7002_HPLL_PRE_COAST, 0x03, TVP7002_WRITE },
 221        { TVP7002_HPLL_POST_COAST, 0x03, TVP7002_WRITE },
 222        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 223};
 224
 225/* Register parameters for 1080I60 */
 226static const struct i2c_reg_value tvp7002_parms_1080I60[] = {
 227        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
 228        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
 229        { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
 230        { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 231        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 232        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
 233        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
 234        { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
 235        { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
 236        { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
 237        { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
 238        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 239        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 240        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 241        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 242        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 243        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 244};
 245
 246/* Register parameters for 1080P60 */
 247static const struct i2c_reg_value tvp7002_parms_1080P60[] = {
 248        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x89, TVP7002_WRITE },
 249        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x80, TVP7002_WRITE },
 250        { TVP7002_HPLL_CRTL, 0xE0, TVP7002_WRITE },
 251        { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 252        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 253        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
 254        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
 255        { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
 256        { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
 257        { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
 258        { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
 259        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 260        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 261        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 262        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 263        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 264        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 265};
 266
 267/* Register parameters for 1080I50 */
 268static const struct i2c_reg_value tvp7002_parms_1080I50[] = {
 269        { TVP7002_HPLL_FDBK_DIV_MSBS, 0xa5, TVP7002_WRITE },
 270        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x00, TVP7002_WRITE },
 271        { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
 272        { TVP7002_AVID_START_PIXEL_LSBS, 0x06, TVP7002_WRITE },
 273        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 274        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x8a, TVP7002_WRITE },
 275        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x08, TVP7002_WRITE },
 276        { TVP7002_VBLK_F_0_START_L_OFF, 0x02, TVP7002_WRITE },
 277        { TVP7002_VBLK_F_1_START_L_OFF, 0x02, TVP7002_WRITE },
 278        { TVP7002_VBLK_F_0_DURATION, 0x16, TVP7002_WRITE },
 279        { TVP7002_VBLK_F_1_DURATION, 0x17, TVP7002_WRITE },
 280        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 281        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 282        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 283        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 284        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 285        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 286};
 287
 288/* Register parameters for 720P60 */
 289static const struct i2c_reg_value tvp7002_parms_720P60[] = {
 290        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x67, TVP7002_WRITE },
 291        { TVP7002_HPLL_FDBK_DIV_LSBS, 0x20, TVP7002_WRITE },
 292        { TVP7002_HPLL_CRTL, 0xa0, TVP7002_WRITE },
 293        { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
 294        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 295        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
 296        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
 297        { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
 298        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 299        { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
 300        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 301        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 302        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 303        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 304        { TVP7002_HPLL_PRE_COAST, 0x00, TVP7002_WRITE },
 305        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 306        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 307};
 308
 309/* Register parameters for 720P50 */
 310static const struct i2c_reg_value tvp7002_parms_720P50[] = {
 311        { TVP7002_HPLL_FDBK_DIV_MSBS, 0x7b, TVP7002_WRITE },
 312        { TVP7002_HPLL_FDBK_DIV_LSBS, 0xc0, TVP7002_WRITE },
 313        { TVP7002_HPLL_CRTL, 0x98, TVP7002_WRITE },
 314        { TVP7002_AVID_START_PIXEL_LSBS, 0x47, TVP7002_WRITE },
 315        { TVP7002_AVID_START_PIXEL_MSBS, 0x01, TVP7002_WRITE },
 316        { TVP7002_AVID_STOP_PIXEL_LSBS, 0x4B, TVP7002_WRITE },
 317        { TVP7002_AVID_STOP_PIXEL_MSBS, 0x06, TVP7002_WRITE },
 318        { TVP7002_VBLK_F_0_START_L_OFF, 0x05, TVP7002_WRITE },
 319        { TVP7002_VBLK_F_1_START_L_OFF, 0x00, TVP7002_WRITE },
 320        { TVP7002_VBLK_F_0_DURATION, 0x2D, TVP7002_WRITE },
 321        { TVP7002_VBLK_F_1_DURATION, 0x00, TVP7002_WRITE },
 322        { TVP7002_ALC_PLACEMENT, 0x5a, TVP7002_WRITE },
 323        { TVP7002_CLAMP_START, 0x32, TVP7002_WRITE },
 324        { TVP7002_CLAMP_W, 0x20, TVP7002_WRITE },
 325        { TVP7002_HPLL_PRE_COAST, 0x01, TVP7002_WRITE },
 326        { TVP7002_HPLL_POST_COAST, 0x00, TVP7002_WRITE },
 327        { TVP7002_EOR, 0xff, TVP7002_RESERVED }
 328};
 329
 330/* Timings definition for handling device operation */
 331struct tvp7002_timings_definition {
 332        struct v4l2_dv_timings timings;
 333        const struct i2c_reg_value *p_settings;
 334        enum v4l2_colorspace color_space;
 335        enum v4l2_field scanmode;
 336        u16 progressive;
 337        u16 lines_per_frame;
 338        u16 cpl_min;
 339        u16 cpl_max;
 340};
 341
 342/* Struct list for digital video timings */
 343static const struct tvp7002_timings_definition tvp7002_timings[] = {
 344        {
 345                V4L2_DV_BT_CEA_1280X720P60,
 346                tvp7002_parms_720P60,
 347                V4L2_COLORSPACE_REC709,
 348                V4L2_FIELD_NONE,
 349                1,
 350                0x2EE,
 351                135,
 352                153
 353        },
 354        {
 355                V4L2_DV_BT_CEA_1920X1080I60,
 356                tvp7002_parms_1080I60,
 357                V4L2_COLORSPACE_REC709,
 358                V4L2_FIELD_INTERLACED,
 359                0,
 360                0x465,
 361                181,
 362                205
 363        },
 364        {
 365                V4L2_DV_BT_CEA_1920X1080I50,
 366                tvp7002_parms_1080I50,
 367                V4L2_COLORSPACE_REC709,
 368                V4L2_FIELD_INTERLACED,
 369                0,
 370                0x465,
 371                217,
 372                245
 373        },
 374        {
 375                V4L2_DV_BT_CEA_1280X720P50,
 376                tvp7002_parms_720P50,
 377                V4L2_COLORSPACE_REC709,
 378                V4L2_FIELD_NONE,
 379                1,
 380                0x2EE,
 381                163,
 382                183
 383        },
 384        {
 385                V4L2_DV_BT_CEA_1920X1080P60,
 386                tvp7002_parms_1080P60,
 387                V4L2_COLORSPACE_REC709,
 388                V4L2_FIELD_NONE,
 389                1,
 390                0x465,
 391                90,
 392                102
 393        },
 394        {
 395                V4L2_DV_BT_CEA_720X480P59_94,
 396                tvp7002_parms_480P,
 397                V4L2_COLORSPACE_SMPTE170M,
 398                V4L2_FIELD_NONE,
 399                1,
 400                0x20D,
 401                0xffff,
 402                0xffff
 403        },
 404        {
 405                V4L2_DV_BT_CEA_720X576P50,
 406                tvp7002_parms_576P,
 407                V4L2_COLORSPACE_SMPTE170M,
 408                V4L2_FIELD_NONE,
 409                1,
 410                0x271,
 411                0xffff,
 412                0xffff
 413        }
 414};
 415
 416#define NUM_TIMINGS ARRAY_SIZE(tvp7002_timings)
 417
 418/* Device definition */
 419struct tvp7002 {
 420        struct v4l2_subdev sd;
 421        struct v4l2_ctrl_handler hdl;
 422        const struct tvp7002_config *pdata;
 423
 424        int ver;
 425        int streaming;
 426
 427        const struct tvp7002_timings_definition *current_timings;
 428        struct media_pad pad;
 429};
 430
 431/*
 432 * to_tvp7002 - Obtain device handler TVP7002
 433 * @sd: ptr to v4l2_subdev struct
 434 *
 435 * Returns device handler tvp7002.
 436 */
 437static inline struct tvp7002 *to_tvp7002(struct v4l2_subdev *sd)
 438{
 439        return container_of(sd, struct tvp7002, sd);
 440}
 441
 442static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
 443{
 444        return &container_of(ctrl->handler, struct tvp7002, hdl)->sd;
 445}
 446
 447/*
 448 * tvp7002_read - Read a value from a register in an TVP7002
 449 * @sd: ptr to v4l2_subdev struct
 450 * @addr: TVP7002 register address
 451 * @dst: pointer to 8-bit destination
 452 *
 453 * Returns value read if successful, or non-zero (-1) otherwise.
 454 */
 455static int tvp7002_read(struct v4l2_subdev *sd, u8 addr, u8 *dst)
 456{
 457        struct i2c_client *c = v4l2_get_subdevdata(sd);
 458        int retry;
 459        int error;
 460
 461        for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
 462                error = i2c_smbus_read_byte_data(c, addr);
 463
 464                if (error >= 0) {
 465                        *dst = (u8)error;
 466                        return 0;
 467                }
 468
 469                msleep_interruptible(10);
 470        }
 471        v4l2_err(sd, "TVP7002 read error %d\n", error);
 472        return error;
 473}
 474
 475/*
 476 * tvp7002_read_err() - Read a register value with error code
 477 * @sd: pointer to standard V4L2 sub-device structure
 478 * @reg: destination register
 479 * @val: value to be read
 480 * @err: pointer to error value
 481 *
 482 * Read a value in a register and save error value in pointer.
 483 * Also update the register table if successful
 484 */
 485static inline void tvp7002_read_err(struct v4l2_subdev *sd, u8 reg,
 486                                                        u8 *dst, int *err)
 487{
 488        if (!*err)
 489                *err = tvp7002_read(sd, reg, dst);
 490}
 491
 492/*
 493 * tvp7002_write() - Write a value to a register in TVP7002
 494 * @sd: ptr to v4l2_subdev struct
 495 * @addr: TVP7002 register address
 496 * @value: value to be written to the register
 497 *
 498 * Write a value to a register in an TVP7002 decoder device.
 499 * Returns zero if successful, or non-zero otherwise.
 500 */
 501static int tvp7002_write(struct v4l2_subdev *sd, u8 addr, u8 value)
 502{
 503        struct i2c_client *c;
 504        int retry;
 505        int error;
 506
 507        c = v4l2_get_subdevdata(sd);
 508
 509        for (retry = 0; retry < I2C_RETRY_COUNT; retry++) {
 510                error = i2c_smbus_write_byte_data(c, addr, value);
 511
 512                if (error >= 0)
 513                        return 0;
 514
 515                v4l2_warn(sd, "Write: retry ... %d\n", retry);
 516                msleep_interruptible(10);
 517        }
 518        v4l2_err(sd, "TVP7002 write error %d\n", error);
 519        return error;
 520}
 521
 522/*
 523 * tvp7002_write_err() - Write a register value with error code
 524 * @sd: pointer to standard V4L2 sub-device structure
 525 * @reg: destination register
 526 * @val: value to be written
 527 * @err: pointer to error value
 528 *
 529 * Write a value in a register and save error value in pointer.
 530 * Also update the register table if successful
 531 */
 532static inline void tvp7002_write_err(struct v4l2_subdev *sd, u8 reg,
 533                                                        u8 val, int *err)
 534{
 535        if (!*err)
 536                *err = tvp7002_write(sd, reg, val);
 537}
 538
 539/*
 540 * tvp7002_write_inittab() - Write initialization values
 541 * @sd: ptr to v4l2_subdev struct
 542 * @regs: ptr to i2c_reg_value struct
 543 *
 544 * Write initialization values.
 545 * Returns zero or -EINVAL if read operation fails.
 546 */
 547static int tvp7002_write_inittab(struct v4l2_subdev *sd,
 548                                        const struct i2c_reg_value *regs)
 549{
 550        int error = 0;
 551
 552        /* Initialize the first (defined) registers */
 553        while (TVP7002_EOR != regs->reg) {
 554                if (TVP7002_WRITE == regs->type)
 555                        tvp7002_write_err(sd, regs->reg, regs->value, &error);
 556                regs++;
 557        }
 558
 559        return error;
 560}
 561
 562static int tvp7002_s_dv_timings(struct v4l2_subdev *sd,
 563                                        struct v4l2_dv_timings *dv_timings)
 564{
 565        struct tvp7002 *device = to_tvp7002(sd);
 566        const struct v4l2_bt_timings *bt = &dv_timings->bt;
 567        int i;
 568
 569        if (dv_timings->type != V4L2_DV_BT_656_1120)
 570                return -EINVAL;
 571        for (i = 0; i < NUM_TIMINGS; i++) {
 572                const struct v4l2_bt_timings *t = &tvp7002_timings[i].timings.bt;
 573
 574                if (!memcmp(bt, t, &bt->standards - &bt->width)) {
 575                        device->current_timings = &tvp7002_timings[i];
 576                        return tvp7002_write_inittab(sd, tvp7002_timings[i].p_settings);
 577                }
 578        }
 579        return -EINVAL;
 580}
 581
 582static int tvp7002_g_dv_timings(struct v4l2_subdev *sd,
 583                                        struct v4l2_dv_timings *dv_timings)
 584{
 585        struct tvp7002 *device = to_tvp7002(sd);
 586
 587        *dv_timings = device->current_timings->timings;
 588        return 0;
 589}
 590
 591/*
 592 * tvp7002_s_ctrl() - Set a control
 593 * @ctrl: ptr to v4l2_ctrl struct
 594 *
 595 * Set a control in TVP7002 decoder device.
 596 * Returns zero when successful or -EINVAL if register access fails.
 597 */
 598static int tvp7002_s_ctrl(struct v4l2_ctrl *ctrl)
 599{
 600        struct v4l2_subdev *sd = to_sd(ctrl);
 601        int error = 0;
 602
 603        switch (ctrl->id) {
 604        case V4L2_CID_GAIN:
 605                tvp7002_write_err(sd, TVP7002_R_FINE_GAIN, ctrl->val, &error);
 606                tvp7002_write_err(sd, TVP7002_G_FINE_GAIN, ctrl->val, &error);
 607                tvp7002_write_err(sd, TVP7002_B_FINE_GAIN, ctrl->val, &error);
 608                return error;
 609        }
 610        return -EINVAL;
 611}
 612
 613/*
 614 * tvp7002_mbus_fmt() - V4L2 decoder interface handler for try/s/g_mbus_fmt
 615 * @sd: pointer to standard V4L2 sub-device structure
 616 * @f: pointer to mediabus format structure
 617 *
 618 * Negotiate the image capture size and mediabus format.
 619 * There is only one possible format, so this single function works for
 620 * get, set and try.
 621 */
 622static int tvp7002_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *f)
 623{
 624        struct tvp7002 *device = to_tvp7002(sd);
 625        const struct v4l2_bt_timings *bt = &device->current_timings->timings.bt;
 626
 627        f->width = bt->width;
 628        f->height = bt->height;
 629        f->code = MEDIA_BUS_FMT_YUYV10_1X20;
 630        f->field = device->current_timings->scanmode;
 631        f->colorspace = device->current_timings->color_space;
 632
 633        v4l2_dbg(1, debug, sd, "MBUS_FMT: Width - %d, Height - %d",
 634                        f->width, f->height);
 635        return 0;
 636}
 637
 638/*
 639 * tvp7002_query_dv() - query DV timings
 640 * @sd: pointer to standard V4L2 sub-device structure
 641 * @index: index into the tvp7002_timings array
 642 *
 643 * Returns the current DV timings detected by TVP7002. If no active input is
 644 * detected, returns -EINVAL
 645 */
 646static int tvp7002_query_dv(struct v4l2_subdev *sd, int *index)
 647{
 648        const struct tvp7002_timings_definition *timings = tvp7002_timings;
 649        u8 progressive;
 650        u32 lpfr;
 651        u32 cpln;
 652        int error = 0;
 653        u8 lpf_lsb;
 654        u8 lpf_msb;
 655        u8 cpl_lsb;
 656        u8 cpl_msb;
 657
 658        /* Return invalid index if no active input is detected */
 659        *index = NUM_TIMINGS;
 660
 661        /* Read standards from device registers */
 662        tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_LSBS, &lpf_lsb, &error);
 663        tvp7002_read_err(sd, TVP7002_L_FRAME_STAT_MSBS, &lpf_msb, &error);
 664
 665        if (error < 0)
 666                return error;
 667
 668        tvp7002_read_err(sd, TVP7002_CLK_L_STAT_LSBS, &cpl_lsb, &error);
 669        tvp7002_read_err(sd, TVP7002_CLK_L_STAT_MSBS, &cpl_msb, &error);
 670
 671        if (error < 0)
 672                return error;
 673
 674        /* Get lines per frame, clocks per line and interlaced/progresive */
 675        lpfr = lpf_lsb | ((TVP7002_CL_MASK & lpf_msb) << TVP7002_CL_SHIFT);
 676        cpln = cpl_lsb | ((TVP7002_CL_MASK & cpl_msb) << TVP7002_CL_SHIFT);
 677        progressive = (lpf_msb & TVP7002_INPR_MASK) >> TVP7002_IP_SHIFT;
 678
 679        /* Do checking of video modes */
 680        for (*index = 0; *index < NUM_TIMINGS; (*index)++, timings++)
 681                if (lpfr == timings->lines_per_frame &&
 682                        progressive == timings->progressive) {
 683                        if (timings->cpl_min == 0xffff)
 684                                break;
 685                        if (cpln >= timings->cpl_min && cpln <= timings->cpl_max)
 686                                break;
 687                }
 688
 689        if (*index == NUM_TIMINGS) {
 690                v4l2_dbg(1, debug, sd, "detection failed: lpf = %x, cpl = %x\n",
 691                                                                lpfr, cpln);
 692                return -ENOLINK;
 693        }
 694
 695        /* Update lines per frame and clocks per line info */
 696        v4l2_dbg(1, debug, sd, "detected timings: %d\n", *index);
 697        return 0;
 698}
 699
 700static int tvp7002_query_dv_timings(struct v4l2_subdev *sd,
 701                                        struct v4l2_dv_timings *timings)
 702{
 703        int index;
 704        int err = tvp7002_query_dv(sd, &index);
 705
 706        if (err)
 707                return err;
 708        *timings = tvp7002_timings[index].timings;
 709        return 0;
 710}
 711
 712#ifdef CONFIG_VIDEO_ADV_DEBUG
 713/*
 714 * tvp7002_g_register() - Get the value of a register
 715 * @sd: ptr to v4l2_subdev struct
 716 * @reg: ptr to v4l2_dbg_register struct
 717 *
 718 * Get the value of a TVP7002 decoder device register.
 719 * Returns zero when successful, -EINVAL if register read fails or
 720 * access to I2C client fails.
 721 */
 722static int tvp7002_g_register(struct v4l2_subdev *sd,
 723                                                struct v4l2_dbg_register *reg)
 724{
 725        u8 val;
 726        int ret;
 727
 728        ret = tvp7002_read(sd, reg->reg & 0xff, &val);
 729        reg->val = val;
 730        reg->size = 1;
 731        return ret;
 732}
 733
 734/*
 735 * tvp7002_s_register() - set a control
 736 * @sd: ptr to v4l2_subdev struct
 737 * @reg: ptr to v4l2_dbg_register struct
 738 *
 739 * Get the value of a TVP7002 decoder device register.
 740 * Returns zero when successful, -EINVAL if register read fails.
 741 */
 742static int tvp7002_s_register(struct v4l2_subdev *sd,
 743                                                const struct v4l2_dbg_register *reg)
 744{
 745        return tvp7002_write(sd, reg->reg & 0xff, reg->val & 0xff);
 746}
 747#endif
 748
 749/*
 750 * tvp7002_enum_mbus_fmt() - Enum supported mediabus formats
 751 * @sd: pointer to standard V4L2 sub-device structure
 752 * @index: format index
 753 * @code: pointer to mediabus format
 754 *
 755 * Enumerate supported mediabus formats.
 756 */
 757
 758static int tvp7002_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned index,
 759                                        u32 *code)
 760{
 761        /* Check requested format index is within range */
 762        if (index)
 763                return -EINVAL;
 764        *code = MEDIA_BUS_FMT_YUYV10_1X20;
 765        return 0;
 766}
 767
 768/*
 769 * tvp7002_s_stream() - V4L2 decoder i/f handler for s_stream
 770 * @sd: pointer to standard V4L2 sub-device structure
 771 * @enable: streaming enable or disable
 772 *
 773 * Sets streaming to enable or disable, if possible.
 774 */
 775static int tvp7002_s_stream(struct v4l2_subdev *sd, int enable)
 776{
 777        struct tvp7002 *device = to_tvp7002(sd);
 778        int error;
 779
 780        if (device->streaming == enable)
 781                return 0;
 782
 783        /* low impedance: on, high impedance: off */
 784        error = tvp7002_write(sd, TVP7002_MISC_CTL_2, enable ? 0x00 : 0x03);
 785        if (error) {
 786                v4l2_dbg(1, debug, sd, "Fail to set streaming\n");
 787                return error;
 788        }
 789
 790        device->streaming = enable;
 791        return 0;
 792}
 793
 794/*
 795 * tvp7002_log_status() - Print information about register settings
 796 * @sd: ptr to v4l2_subdev struct
 797 *
 798 * Log register values of a TVP7002 decoder device.
 799 * Returns zero or -EINVAL if read operation fails.
 800 */
 801static int tvp7002_log_status(struct v4l2_subdev *sd)
 802{
 803        struct tvp7002 *device = to_tvp7002(sd);
 804        const struct v4l2_bt_timings *bt;
 805        int detected;
 806
 807        /* Find my current timings */
 808        tvp7002_query_dv(sd, &detected);
 809
 810        bt = &device->current_timings->timings.bt;
 811        v4l2_info(sd, "Selected DV Timings: %ux%u\n", bt->width, bt->height);
 812        if (detected == NUM_TIMINGS) {
 813                v4l2_info(sd, "Detected DV Timings: None\n");
 814        } else {
 815                bt = &tvp7002_timings[detected].timings.bt;
 816                v4l2_info(sd, "Detected DV Timings: %ux%u\n",
 817                                bt->width, bt->height);
 818        }
 819        v4l2_info(sd, "Streaming enabled: %s\n",
 820                                        device->streaming ? "yes" : "no");
 821
 822        /* Print the current value of the gain control */
 823        v4l2_ctrl_handler_log_status(&device->hdl, sd->name);
 824
 825        return 0;
 826}
 827
 828static int tvp7002_enum_dv_timings(struct v4l2_subdev *sd,
 829                struct v4l2_enum_dv_timings *timings)
 830{
 831        if (timings->pad != 0)
 832                return -EINVAL;
 833
 834        /* Check requested format index is within range */
 835        if (timings->index >= NUM_TIMINGS)
 836                return -EINVAL;
 837
 838        timings->timings = tvp7002_timings[timings->index].timings;
 839        return 0;
 840}
 841
 842static const struct v4l2_ctrl_ops tvp7002_ctrl_ops = {
 843        .s_ctrl = tvp7002_s_ctrl,
 844};
 845
 846/*
 847 * tvp7002_enum_mbus_code() - Enum supported digital video format on pad
 848 * @sd: pointer to standard V4L2 sub-device structure
 849 * @cfg: pad configuration
 850 * @code: pointer to subdev enum mbus code struct
 851 *
 852 * Enumerate supported digital video formats for pad.
 853 */
 854static int
 855tvp7002_enum_mbus_code(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 856                       struct v4l2_subdev_mbus_code_enum *code)
 857{
 858        /* Check requested format index is within range */
 859        if (code->index != 0)
 860                return -EINVAL;
 861
 862        code->code = MEDIA_BUS_FMT_YUYV10_1X20;
 863
 864        return 0;
 865}
 866
 867/*
 868 * tvp7002_get_pad_format() - get video format on pad
 869 * @sd: pointer to standard V4L2 sub-device structure
 870 * @cfg: pad configuration
 871 * @fmt: pointer to subdev format struct
 872 *
 873 * get video format for pad.
 874 */
 875static int
 876tvp7002_get_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 877                       struct v4l2_subdev_format *fmt)
 878{
 879        struct tvp7002 *tvp7002 = to_tvp7002(sd);
 880
 881        fmt->format.code = MEDIA_BUS_FMT_YUYV10_1X20;
 882        fmt->format.width = tvp7002->current_timings->timings.bt.width;
 883        fmt->format.height = tvp7002->current_timings->timings.bt.height;
 884        fmt->format.field = tvp7002->current_timings->scanmode;
 885        fmt->format.colorspace = tvp7002->current_timings->color_space;
 886
 887        return 0;
 888}
 889
 890/*
 891 * tvp7002_set_pad_format() - set video format on pad
 892 * @sd: pointer to standard V4L2 sub-device structure
 893 * @cfg: pad configuration
 894 * @fmt: pointer to subdev format struct
 895 *
 896 * set video format for pad.
 897 */
 898static int
 899tvp7002_set_pad_format(struct v4l2_subdev *sd, struct v4l2_subdev_pad_config *cfg,
 900                       struct v4l2_subdev_format *fmt)
 901{
 902        return tvp7002_get_pad_format(sd, cfg, fmt);
 903}
 904
 905/* V4L2 core operation handlers */
 906static const struct v4l2_subdev_core_ops tvp7002_core_ops = {
 907        .log_status = tvp7002_log_status,
 908        .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
 909        .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
 910        .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
 911        .g_ctrl = v4l2_subdev_g_ctrl,
 912        .s_ctrl = v4l2_subdev_s_ctrl,
 913        .queryctrl = v4l2_subdev_queryctrl,
 914        .querymenu = v4l2_subdev_querymenu,
 915#ifdef CONFIG_VIDEO_ADV_DEBUG
 916        .g_register = tvp7002_g_register,
 917        .s_register = tvp7002_s_register,
 918#endif
 919};
 920
 921/* Specific video subsystem operation handlers */
 922static const struct v4l2_subdev_video_ops tvp7002_video_ops = {
 923        .g_dv_timings = tvp7002_g_dv_timings,
 924        .s_dv_timings = tvp7002_s_dv_timings,
 925        .query_dv_timings = tvp7002_query_dv_timings,
 926        .s_stream = tvp7002_s_stream,
 927        .g_mbus_fmt = tvp7002_mbus_fmt,
 928        .try_mbus_fmt = tvp7002_mbus_fmt,
 929        .s_mbus_fmt = tvp7002_mbus_fmt,
 930        .enum_mbus_fmt = tvp7002_enum_mbus_fmt,
 931};
 932
 933/* media pad related operation handlers */
 934static const struct v4l2_subdev_pad_ops tvp7002_pad_ops = {
 935        .enum_mbus_code = tvp7002_enum_mbus_code,
 936        .get_fmt = tvp7002_get_pad_format,
 937        .set_fmt = tvp7002_set_pad_format,
 938        .enum_dv_timings = tvp7002_enum_dv_timings,
 939};
 940
 941/* V4L2 top level operation handlers */
 942static const struct v4l2_subdev_ops tvp7002_ops = {
 943        .core = &tvp7002_core_ops,
 944        .video = &tvp7002_video_ops,
 945        .pad = &tvp7002_pad_ops,
 946};
 947
 948static struct tvp7002_config *
 949tvp7002_get_pdata(struct i2c_client *client)
 950{
 951        struct v4l2_of_endpoint bus_cfg;
 952        struct tvp7002_config *pdata;
 953        struct device_node *endpoint;
 954        unsigned int flags;
 955
 956        if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
 957                return client->dev.platform_data;
 958
 959        endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
 960        if (!endpoint)
 961                return NULL;
 962
 963        pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
 964        if (!pdata)
 965                goto done;
 966
 967        v4l2_of_parse_endpoint(endpoint, &bus_cfg);
 968        flags = bus_cfg.bus.parallel.flags;
 969
 970        if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
 971                pdata->hs_polarity = 1;
 972
 973        if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
 974                pdata->vs_polarity = 1;
 975
 976        if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
 977                pdata->clk_polarity = 1;
 978
 979        if (flags & V4L2_MBUS_FIELD_EVEN_HIGH)
 980                pdata->fid_polarity = 1;
 981
 982        if (flags & V4L2_MBUS_VIDEO_SOG_ACTIVE_HIGH)
 983                pdata->sog_polarity = 1;
 984
 985done:
 986        of_node_put(endpoint);
 987        return pdata;
 988}
 989
 990/*
 991 * tvp7002_probe - Probe a TVP7002 device
 992 * @c: ptr to i2c_client struct
 993 * @id: ptr to i2c_device_id struct
 994 *
 995 * Initialize the TVP7002 device
 996 * Returns zero when successful, -EINVAL if register read fails or
 997 * -EIO if i2c access is not available.
 998 */
 999static int tvp7002_probe(struct i2c_client *c, const struct i2c_device_id *id)
1000{

1001        struct tvp7002_config *pdata = tvp7002_get_pdata(c);
1002        struct v4l2_subdev *sd;
1003        struct tvp7002 *device;
1004        struct v4l2_dv_timings timings;
1005        int polarity_a;
1006        int polarity_b;
1007        u8 revision;
1008        int error;
1009
1010        if (pdata == NULL) {
1011                dev_err(&c->dev, "No platform data\n");
1012                return -EINVAL;
1013        }
1014
1015        /* Check if the adapter supports the needed features */
1016        if (!i2c_check_functionality(c->adapter,
1017                I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
1018                return -EIO;
1019
1020        device = devm_kzalloc(&c->dev, sizeof(struct tvp7002), GFP_KERNEL);
1021
1022        if (!device)
1023                return -ENOMEM;
1024
1025        sd = &device->sd;
1026        device->pdata = pdata;
1027        device->current_timings = tvp7002_timings;
1028
1029        /* Tell v4l2 the device is ready */
1030        v4l2_i2c_subdev_init(sd, c, &tvp7002_ops);
1031        v4l_info(c, "tvp7002 found @ 0x%02x (%s)\n",
1032                                        c->addr, c->adapter->name);
1033
1034        error = tvp7002_read(sd, TVP7002_CHIP_REV, &revision);
1035        if (error < 0)
1036                return error;
1037
1038        /* Get revision number */
1039        v4l2_info(sd, "Rev. %02x detected.\n", revision);
1040        if (revision != 0x02)
1041                v4l2_info(sd, "Unknown revision detected.\n");
1042
1043        /* Initializes TVP7002 to its default values */
1044        error = tvp7002_write_inittab(sd, tvp7002_init_default);
1045
1046        if (error < 0)
1047                return error;
1048
1049        /* Set polarity information after registers have been set */
1050        polarity_a = 0x20 | device->pdata->hs_polarity << 5
1051                        | device->pdata->vs_polarity << 2;
1052        error = tvp7002_write(sd, TVP7002_SYNC_CTL_1, polarity_a);
1053        if (error < 0)
1054                return error;
1055
1056        polarity_b = 0x01  | device->pdata->fid_polarity << 2
1057                        | device->pdata->sog_polarity << 1
1058                        | device->pdata->clk_polarity;
1059        error = tvp7002_write(sd, TVP7002_MISC_CTL_3, polarity_b);
1060        if (error < 0)
1061                return error;
1062
1063        /* Set registers according to default video mode */
1064        timings = device->current_timings->timings;
1065        error = tvp7002_s_dv_timings(sd, &timings);
1066
1067#if defined(CONFIG_MEDIA_CONTROLLER)
1068        device->pad.flags = MEDIA_PAD_FL_SOURCE;
1069        device->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1070        device->sd.entity.flags |= MEDIA_ENT_T_V4L2_SUBDEV_DECODER;
1071
1072        error = media_entity_init(&device->sd.entity, 1, &device->pad, 0);
1073        if (error < 0)
1074                return error;
1075#endif
1076
1077        v4l2_ctrl_handler_init(&device->hdl, 1);
1078        v4l2_ctrl_new_std(&device->hdl, &tvp7002_ctrl_ops,
1079                        V4L2_CID_GAIN, 0, 255, 1, 0);
1080        sd->ctrl_handler = &device->hdl;
1081        if (device->hdl.error) {
1082                error = device->hdl.error;
1083                goto error;
1084        }
1085        v4l2_ctrl_handler_setup(&device->hdl);
1086
1087        error = v4l2_async_register_subdev(&device->sd);
1088        if (error)
1089                goto error;
1090
1091        return 0;
1092
1093error:
1094        v4l2_ctrl_handler_free(&device->hdl);
1095#if defined(CONFIG_MEDIA_CONTROLLER)
1096        media_entity_cleanup(&device->sd.entity);
1097#endif
1098        return error;
1099}
1100
1101/*
1102 * tvp7002_remove - Remove TVP7002 device support
1103 * @c: ptr to i2c_client struct
1104 *
1105 * Reset the TVP7002 device
1106 * Returns zero.
1107 */
1108static int tvp7002_remove(struct i2c_client *c)
1109{
1110        struct v4l2_subdev *sd = i2c_get_clientdata(c);
1111        struct tvp7002 *device = to_tvp7002(sd);
1112
1113        v4l2_dbg(1, debug, sd, "Removing tvp7002 adapter"
1114                                "on address 0x%x\n", c->addr);
1115        v4l2_async_unregister_subdev(&device->sd);
1116#if defined(CONFIG_MEDIA_CONTROLLER)
1117        media_entity_cleanup(&device->sd.entity);
1118#endif
1119        v4l2_ctrl_handler_free(&device->hdl);
1120        return 0;
1121}
1122
1123/* I2C Device ID table */
1124static const struct i2c_device_id tvp7002_id[] = {
1125        { "tvp7002", 0 },
1126        { }
1127};
1128MODULE_DEVICE_TABLE(i2c, tvp7002_id);
1129
1130#if IS_ENABLED(CONFIG_OF)
1131static const struct of_device_id tvp7002_of_match[] = {
1132        { .compatible = "ti,tvp7002", },
1133        { /* sentinel */ },
1134};
1135MODULE_DEVICE_TABLE(of, tvp7002_of_match);
1136#endif
1137
1138/* I2C driver data */
1139static struct i2c_driver tvp7002_driver = {
1140        .driver = {
1141                .of_match_table = of_match_ptr(tvp7002_of_match),
1142                .owner = THIS_MODULE,
1143                .name = TVP7002_MODULE_NAME,
1144        },
1145        .probe = tvp7002_probe,
1146        .remove = tvp7002_remove,
1147        .id_table = tvp7002_id,
1148};
1149
1150module_i2c_driver(tvp7002_driver);
1151