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91#include <linux/of_address.h>
92#include <linux/of_irq.h>
93#include <linux/of_platform.h>
94#include <linux/dma-mapping.h>
95#include <linux/miscdevice.h>
96#include <linux/interrupt.h>
97#include <linux/dmaengine.h>
98#include <linux/seq_file.h>
99#include <linux/highmem.h>
100#include <linux/debugfs.h>
101#include <linux/vmalloc.h>
102#include <linux/kernel.h>
103#include <linux/module.h>
104#include <linux/poll.h>
105#include <linux/slab.h>
106#include <linux/kref.h>
107#include <linux/io.h>
108
109
110#define SYS_IRQ_SOURCE_CTL 0x24
111#define SYS_IRQ_OUTPUT_EN 0x28
112#define SYS_IRQ_OUTPUT_DATA 0x2C
113#define SYS_IRQ_INPUT_DATA 0x30
114#define SYS_FPGA_CONFIG_STATUS 0x44
115
116
117#define IRQ_CORL_DONE 0x10
118
119
120#define MMAP_REG_VERSION 0x00
121#define MMAP_REG_CORL_CONF1 0x08
122#define MMAP_REG_CORL_CONF2 0x0C
123#define MMAP_REG_STATUS 0x48
124
125#define SYS_FPGA_BLOCK 0xF0000000
126
127#define DATA_FPGA_START 0x400000
128#define DATA_FPGA_SIZE 0x80000
129
130static const char drv_name[] = "carma-fpga";
131
132#define NUM_FPGA 4
133
134#define MIN_DATA_BUFS 8
135#define MAX_DATA_BUFS 64
136
137struct fpga_info {
138 unsigned int num_lag_ram;
139 unsigned int blk_size;
140};
141
142struct data_buf {
143 struct list_head entry;
144 void *vaddr;
145 struct scatterlist *sglist;
146 int sglen;
147 int nr_pages;
148 size_t size;
149};
150
151struct fpga_device {
152
153 struct miscdevice miscdev;
154 struct device *dev;
155 struct mutex mutex;
156
157
158 struct kref ref;
159
160
161 struct fpga_info info[NUM_FPGA];
162 void __iomem *regs;
163 int irq;
164
165
166 resource_size_t phys_addr;
167 size_t phys_size;
168
169
170 struct sg_table corl_table;
171 unsigned int corl_nents;
172 struct dma_chan *chan;
173
174
175 spinlock_t lock;
176
177
178 bool enabled;
179
180
181 wait_queue_head_t wait;
182 struct list_head free;
183 struct list_head used;
184 struct data_buf *inflight;
185
186
187 unsigned int num_dropped;
188 unsigned int num_buffers;
189 size_t bufsize;
190 struct dentry *dbg_entry;
191};
192
193struct fpga_reader {
194 struct fpga_device *priv;
195 struct data_buf *buf;
196 off_t buf_start;
197};
198
199static void fpga_device_release(struct kref *ref)
200{
201 struct fpga_device *priv = container_of(ref, struct fpga_device, ref);
202
203
204 mutex_destroy(&priv->mutex);
205 kfree(priv);
206}
207
208
209
210
211
212static int carma_dma_init(struct data_buf *buf, int nr_pages)
213{
214 struct page *pg;
215 int i;
216
217 buf->vaddr = vmalloc_32(nr_pages << PAGE_SHIFT);
218 if (NULL == buf->vaddr) {
219 pr_debug("vmalloc_32(%d pages) failed\n", nr_pages);
220 return -ENOMEM;
221 }
222
223 pr_debug("vmalloc is at addr 0x%08lx, size=%d\n",
224 (unsigned long)buf->vaddr,
225 nr_pages << PAGE_SHIFT);
226
227 memset(buf->vaddr, 0, nr_pages << PAGE_SHIFT);
228 buf->nr_pages = nr_pages;
229
230 buf->sglist = vzalloc(buf->nr_pages * sizeof(*buf->sglist));
231 if (NULL == buf->sglist)
232 goto vzalloc_err;
233
234 sg_init_table(buf->sglist, buf->nr_pages);
235 for (i = 0; i < buf->nr_pages; i++) {
236 pg = vmalloc_to_page(buf->vaddr + i * PAGE_SIZE);
237 if (NULL == pg)
238 goto vmalloc_to_page_err;
239 sg_set_page(&buf->sglist[i], pg, PAGE_SIZE, 0);
240 }
241 return 0;
242
243vmalloc_to_page_err:
244 vfree(buf->sglist);
245 buf->sglist = NULL;
246vzalloc_err:
247 vfree(buf->vaddr);
248 buf->vaddr = NULL;
249 return -ENOMEM;
250}
251
252static int carma_dma_map(struct device *dev, struct data_buf *buf)
253{
254 buf->sglen = dma_map_sg(dev, buf->sglist,
255 buf->nr_pages, DMA_FROM_DEVICE);
256
257 if (0 == buf->sglen) {
258 pr_warn("%s: dma_map_sg failed\n", __func__);
259 return -ENOMEM;
260 }
261 return 0;
262}
263
264static int carma_dma_unmap(struct device *dev, struct data_buf *buf)
265{
266 if (!buf->sglen)
267 return 0;
268
269 dma_unmap_sg(dev, buf->sglist, buf->sglen, DMA_FROM_DEVICE);
270 buf->sglen = 0;
271 return 0;
272}
273
274
275
276
277
278
279
280
281static void data_free_buffer(struct data_buf *buf)
282{
283
284 if (!buf)
285 return;
286
287
288 vfree(buf->sglist);
289 vfree(buf->vaddr);
290 kfree(buf);
291}
292
293
294
295
296
297
298
299
300
301
302static struct data_buf *data_alloc_buffer(const size_t bytes)
303{
304 unsigned int nr_pages;
305 struct data_buf *buf;
306 int ret;
307
308
309 nr_pages = DIV_ROUND_UP(bytes, PAGE_SIZE);
310
311
312 buf = kzalloc(sizeof(*buf), GFP_KERNEL);
313 if (!buf)
314 goto out_return;
315
316
317 INIT_LIST_HEAD(&buf->entry);
318 buf->size = bytes;
319
320
321 ret = carma_dma_init(buf, nr_pages);
322 if (ret)
323 goto out_free_buf;
324
325 return buf;
326
327out_free_buf:
328 kfree(buf);
329out_return:
330 return NULL;
331}
332
333
334
335
336
337
338
339
340
341
342
343static void data_free_buffers(struct fpga_device *priv)
344{
345 struct data_buf *buf, *tmp;
346
347
348 BUG_ON(priv->inflight != NULL);
349
350 list_for_each_entry_safe(buf, tmp, &priv->free, entry) {
351 list_del_init(&buf->entry);
352 carma_dma_unmap(priv->dev, buf);
353 data_free_buffer(buf);
354 }
355
356 list_for_each_entry_safe(buf, tmp, &priv->used, entry) {
357 list_del_init(&buf->entry);
358 carma_dma_unmap(priv->dev, buf);
359 data_free_buffer(buf);
360 }
361
362 priv->num_buffers = 0;
363 priv->bufsize = 0;
364}
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384static int data_alloc_buffers(struct fpga_device *priv)
385{
386 struct data_buf *buf;
387 int i, ret;
388
389 for (i = 0; i < MAX_DATA_BUFS; i++) {
390
391
392 buf = data_alloc_buffer(priv->bufsize);
393 if (!buf)
394 break;
395
396
397 ret = carma_dma_map(priv->dev, buf);
398 if (ret) {
399 data_free_buffer(buf);
400 break;
401 }
402
403
404 list_add_tail(&buf->entry, &priv->free);
405 priv->num_buffers++;
406 }
407
408
409 if (priv->num_buffers < MIN_DATA_BUFS) {
410 dev_err(priv->dev, "Unable to allocate enough data buffers\n");
411 data_free_buffers(priv);
412 return -ENOMEM;
413 }
414
415
416 if (priv->num_buffers < MAX_DATA_BUFS) {
417 dev_warn(priv->dev,
418 "Unable to allocate %d buffers, using %d buffers instead\n",
419 MAX_DATA_BUFS, i);
420 }
421
422 return 0;
423}
424
425
426
427
428
429
430
431
432
433
434static dma_addr_t fpga_start_addr(struct fpga_device *priv, unsigned int fpga)
435{
436 return priv->phys_addr + 0x400000 + (0x80000 * fpga);
437}
438
439
440
441
442
443
444
445static dma_addr_t fpga_block_addr(struct fpga_device *priv, unsigned int fpga,
446 unsigned int blknum)
447{
448 return fpga_start_addr(priv, fpga) + (0x10000 * (1 + blknum));
449}
450
451#define REG_BLOCK_SIZE (32 * 4)
452
453
454
455
456
457
458
459
460
461
462
463static int data_setup_corl_table(struct fpga_device *priv)
464{
465 struct sg_table *table = &priv->corl_table;
466 struct scatterlist *sg;
467 struct fpga_info *info;
468 int i, j, ret;
469
470
471 priv->corl_nents = (1 + NUM_FPGA) * REG_BLOCK_SIZE;
472 for (i = 0; i < NUM_FPGA; i++)
473 priv->corl_nents += priv->info[i].num_lag_ram;
474
475
476 ret = sg_alloc_table(table, priv->corl_nents, GFP_KERNEL);
477 if (ret) {
478 dev_err(priv->dev, "unable to allocate DMA table\n");
479 return ret;
480 }
481
482
483 sg = table->sgl;
484 for (i = 0; i < NUM_FPGA; i++) {
485 sg_dma_address(sg) = fpga_start_addr(priv, i);
486 sg_dma_len(sg) = REG_BLOCK_SIZE;
487 sg = sg_next(sg);
488 }
489
490
491 sg_dma_address(sg) = SYS_FPGA_BLOCK;
492 sg_dma_len(sg) = REG_BLOCK_SIZE;
493 sg = sg_next(sg);
494
495
496 for (i = 0; i < NUM_FPGA; i++) {
497 info = &priv->info[i];
498 for (j = 0; j < info->num_lag_ram; j++) {
499 sg_dma_address(sg) = fpga_block_addr(priv, i, j);
500 sg_dma_len(sg) = info->blk_size;
501 sg = sg_next(sg);
502 }
503 }
504
505
506
507
508
509 return 0;
510}
511
512
513
514
515
516static void fpga_write_reg(struct fpga_device *priv, unsigned int fpga,
517 unsigned int reg, u32 val)
518{
519 const int fpga_start = DATA_FPGA_START + (fpga * DATA_FPGA_SIZE);
520 iowrite32be(val, priv->regs + fpga_start + reg);
521}
522
523static u32 fpga_read_reg(struct fpga_device *priv, unsigned int fpga,
524 unsigned int reg)
525{
526 const int fpga_start = DATA_FPGA_START + (fpga * DATA_FPGA_SIZE);
527 return ioread32be(priv->regs + fpga_start + reg);
528}
529
530
531
532
533
534
535
536
537
538
539
540
541static int data_calculate_bufsize(struct fpga_device *priv)
542{
543 u32 num_corl, num_lags, num_meta, num_qcnt, num_pack;
544 u32 conf1, conf2, version;
545 u32 num_lag_ram, blk_size;
546 int i;
547
548
549 priv->bufsize = (1 + NUM_FPGA) * REG_BLOCK_SIZE;
550
551
552 for (i = 0; i < NUM_FPGA; i++) {
553 version = fpga_read_reg(priv, i, MMAP_REG_VERSION);
554 conf1 = fpga_read_reg(priv, i, MMAP_REG_CORL_CONF1);
555 conf2 = fpga_read_reg(priv, i, MMAP_REG_CORL_CONF2);
556
557
558 if ((version & 0x000000FF) >= 2) {
559 num_corl = (conf1 & 0x000000F0) >> 4;
560 num_pack = (conf1 & 0x00000F00) >> 8;
561 num_lags = (conf1 & 0x00FFF000) >> 12;
562 num_meta = (conf1 & 0x7F000000) >> 24;
563 num_qcnt = (conf2 & 0x00000FFF) >> 0;
564 } else {
565 num_corl = (conf1 & 0x000000F0) >> 4;
566 num_pack = 1;
567 num_lags = (conf1 & 0x000FFF00) >> 8;
568 num_meta = (conf1 & 0x7FF00000) >> 20;
569 num_qcnt = (conf2 & 0x00000FFF) >> 0;
570 }
571
572 num_lag_ram = (num_corl + num_pack - 1) / num_pack;
573 blk_size = ((num_pack * num_lags) + num_meta + num_qcnt) * 8;
574
575 priv->info[i].num_lag_ram = num_lag_ram;
576 priv->info[i].blk_size = blk_size;
577 priv->bufsize += num_lag_ram * blk_size;
578
579 dev_dbg(priv->dev, "FPGA %d NUM_CORL: %d\n", i, num_corl);
580 dev_dbg(priv->dev, "FPGA %d NUM_PACK: %d\n", i, num_pack);
581 dev_dbg(priv->dev, "FPGA %d NUM_LAGS: %d\n", i, num_lags);
582 dev_dbg(priv->dev, "FPGA %d NUM_META: %d\n", i, num_meta);
583 dev_dbg(priv->dev, "FPGA %d NUM_QCNT: %d\n", i, num_qcnt);
584 dev_dbg(priv->dev, "FPGA %d BLK_SIZE: %d\n", i, blk_size);
585 }
586
587 dev_dbg(priv->dev, "TOTAL BUFFER SIZE: %zu bytes\n", priv->bufsize);
588 return 0;
589}
590
591
592
593
594
595
596
597
598
599
600
601
602
603static void data_disable_interrupts(struct fpga_device *priv)
604{
605
606 iowrite32be(0x2F, priv->regs + SYS_IRQ_SOURCE_CTL);
607}
608
609
610
611
612
613
614
615
616
617
618static void data_enable_interrupts(struct fpga_device *priv)
619{
620
621 fpga_write_reg(priv, 0, MMAP_REG_STATUS, 0x0);
622 fpga_write_reg(priv, 1, MMAP_REG_STATUS, 0x0);
623 fpga_write_reg(priv, 2, MMAP_REG_STATUS, 0x0);
624 fpga_write_reg(priv, 3, MMAP_REG_STATUS, 0x0);
625
626
627 fpga_read_reg(priv, 0, MMAP_REG_STATUS);
628 fpga_read_reg(priv, 1, MMAP_REG_STATUS);
629 fpga_read_reg(priv, 2, MMAP_REG_STATUS);
630 fpga_read_reg(priv, 3, MMAP_REG_STATUS);
631
632
633 iowrite32be(0x3F, priv->regs + SYS_IRQ_SOURCE_CTL);
634}
635
636
637
638
639
640
641
642
643
644
645
646
647
648static void data_dma_cb(void *data)
649{
650 struct fpga_device *priv = data;
651 unsigned long flags;
652
653 spin_lock_irqsave(&priv->lock, flags);
654
655
656 BUG_ON(priv->inflight == NULL);
657
658
659 list_move_tail(&priv->inflight->entry, &priv->used);
660 priv->inflight = NULL;
661
662
663
664
665
666 if (priv->enabled)
667 data_enable_interrupts(priv);
668
669 spin_unlock_irqrestore(&priv->lock, flags);
670
671
672
673
674
675 wake_up(&priv->wait);
676}
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691static int data_submit_dma(struct fpga_device *priv, struct data_buf *buf)
692{
693 struct scatterlist *dst_sg, *src_sg;
694 unsigned int dst_nents, src_nents;
695 struct dma_chan *chan = priv->chan;
696 struct dma_async_tx_descriptor *tx;
697 dma_cookie_t cookie;
698 dma_addr_t dst, src;
699 unsigned long dma_flags = 0;
700
701 dst_sg = buf->sglist;
702 dst_nents = buf->sglen;
703
704 src_sg = priv->corl_table.sgl;
705 src_nents = priv->corl_nents;
706
707
708
709
710
711
712
713
714 tx = chan->device->device_prep_dma_sg(chan,
715 dst_sg, dst_nents,
716 src_sg, src_nents,
717 0);
718 if (!tx) {
719 dev_err(priv->dev, "unable to prep scatterlist DMA\n");
720 return -ENOMEM;
721 }
722
723
724 cookie = tx->tx_submit(tx);
725 if (dma_submit_error(cookie)) {
726 dev_err(priv->dev, "unable to submit scatterlist DMA\n");
727 return -ENOMEM;
728 }
729
730
731 dst = sg_dma_address(dst_sg) + (NUM_FPGA * REG_BLOCK_SIZE);
732 src = SYS_FPGA_BLOCK;
733 tx = chan->device->device_prep_dma_memcpy(chan, dst, src,
734 REG_BLOCK_SIZE,
735 dma_flags);
736 if (!tx) {
737 dev_err(priv->dev, "unable to prep SYS-FPGA DMA\n");
738 return -ENOMEM;
739 }
740
741
742 tx->callback = data_dma_cb;
743 tx->callback_param = priv;
744
745
746 cookie = tx->tx_submit(tx);
747 if (dma_submit_error(cookie)) {
748 dev_err(priv->dev, "unable to submit SYS-FPGA DMA\n");
749 return -ENOMEM;
750 }
751
752 return 0;
753}
754
755#define CORL_DONE 0x1
756#define CORL_ERR 0x2
757
758static irqreturn_t data_irq(int irq, void *dev_id)
759{
760 struct fpga_device *priv = dev_id;
761 bool submitted = false;
762 struct data_buf *buf;
763 u32 status;
764 int i;
765
766
767 for (i = 0; i < 4; i++) {
768 status = fpga_read_reg(priv, i, MMAP_REG_STATUS);
769 if (!(status & (CORL_DONE | CORL_ERR))) {
770 dev_err(priv->dev, "spurious irq detected (FPGA)\n");
771 return IRQ_NONE;
772 }
773 }
774
775
776 status = ioread32be(priv->regs + SYS_IRQ_INPUT_DATA);
777 if (status & IRQ_CORL_DONE) {
778 dev_err(priv->dev, "spurious irq detected (IRQ)\n");
779 return IRQ_NONE;
780 }
781
782 spin_lock(&priv->lock);
783
784
785
786
787
788
789
790
791 BUG_ON(priv->inflight != NULL);
792
793
794 data_disable_interrupts(priv);
795
796
797 if (list_empty(&priv->free)) {
798 priv->num_dropped++;
799 goto out;
800 }
801
802 buf = list_first_entry(&priv->free, struct data_buf, entry);
803 list_del_init(&buf->entry);
804 BUG_ON(buf->size != priv->bufsize);
805
806
807 if (data_submit_dma(priv, buf)) {
808 dev_err(priv->dev, "Unable to setup DMA transfer\n");
809 list_move_tail(&buf->entry, &priv->free);
810 goto out;
811 }
812
813
814 priv->inflight = buf;
815 submitted = true;
816
817
818 dma_async_issue_pending(priv->chan);
819
820out:
821
822 if (!submitted)
823 data_enable_interrupts(priv);
824
825 spin_unlock(&priv->lock);
826 return IRQ_HANDLED;
827}
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845static int data_device_enable(struct fpga_device *priv)
846{
847 bool enabled;
848 u32 val;
849 int ret;
850
851
852 spin_lock_irq(&priv->lock);
853 enabled = priv->enabled;
854 spin_unlock_irq(&priv->lock);
855 if (enabled)
856 return 0;
857
858
859 val = ioread32be(priv->regs + SYS_FPGA_CONFIG_STATUS);
860 if (!(val & (1 << 18))) {
861 dev_err(priv->dev, "DATA-FPGAs are not enabled\n");
862 return -ENODATA;
863 }
864
865
866 ret = data_calculate_bufsize(priv);
867 if (ret) {
868 dev_err(priv->dev, "unable to calculate buffer size\n");
869 goto out_error;
870 }
871
872
873 ret = data_alloc_buffers(priv);
874 if (ret) {
875 dev_err(priv->dev, "unable to allocate buffers\n");
876 goto out_error;
877 }
878
879
880 ret = data_setup_corl_table(priv);
881 if (ret) {
882 dev_err(priv->dev, "unable to setup correlation DMA table\n");
883 goto out_error;
884 }
885
886
887 data_disable_interrupts(priv);
888
889
890 ret = request_irq(priv->irq, data_irq, IRQF_SHARED, drv_name, priv);
891 if (ret) {
892 dev_err(priv->dev, "unable to request IRQ handler\n");
893 goto out_error;
894 }
895
896
897 spin_lock_irq(&priv->lock);
898 priv->enabled = true;
899 spin_unlock_irq(&priv->lock);
900
901
902 data_enable_interrupts(priv);
903 return 0;
904
905out_error:
906 sg_free_table(&priv->corl_table);
907 priv->corl_nents = 0;
908
909 data_free_buffers(priv);
910 return ret;
911}
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926static int data_device_disable(struct fpga_device *priv)
927{
928 spin_lock_irq(&priv->lock);
929
930
931 if (!priv->enabled) {
932 spin_unlock_irq(&priv->lock);
933 return 0;
934 }
935
936
937
938
939
940
941 priv->enabled = false;
942
943
944 data_disable_interrupts(priv);
945
946
947 while (priv->inflight != NULL) {
948 spin_unlock_irq(&priv->lock);
949 wait_event(priv->wait, priv->inflight == NULL);
950 spin_lock_irq(&priv->lock);
951 }
952
953 spin_unlock_irq(&priv->lock);
954
955
956 free_irq(priv->irq, priv);
957
958
959 sg_free_table(&priv->corl_table);
960 priv->corl_nents = 0;
961
962
963 data_free_buffers(priv);
964 return 0;
965}
966
967
968
969
970#ifdef CONFIG_DEBUG_FS
971
972
973
974
975static unsigned int list_num_entries(struct list_head *list)
976{
977 struct list_head *entry;
978 unsigned int ret = 0;
979
980 list_for_each(entry, list)
981 ret++;
982
983 return ret;
984}
985
986static int data_debug_show(struct seq_file *f, void *offset)
987{
988 struct fpga_device *priv = f->private;
989
990 spin_lock_irq(&priv->lock);
991
992 seq_printf(f, "enabled: %d\n", priv->enabled);
993 seq_printf(f, "bufsize: %d\n", priv->bufsize);
994 seq_printf(f, "num_buffers: %d\n", priv->num_buffers);
995 seq_printf(f, "num_free: %d\n", list_num_entries(&priv->free));
996 seq_printf(f, "inflight: %d\n", priv->inflight != NULL);
997 seq_printf(f, "num_used: %d\n", list_num_entries(&priv->used));
998 seq_printf(f, "num_dropped: %d\n", priv->num_dropped);
999
1000 spin_unlock_irq(&priv->lock);
1001 return 0;
1002}
1003
1004static int data_debug_open(struct inode *inode, struct file *file)
1005{
1006 return single_open(file, data_debug_show, inode->i_private);
1007}
1008
1009static const struct file_operations data_debug_fops = {
1010 .owner = THIS_MODULE,
1011 .open = data_debug_open,
1012 .read = seq_read,
1013 .llseek = seq_lseek,
1014 .release = single_release,
1015};
1016
1017static int data_debugfs_init(struct fpga_device *priv)
1018{
1019 priv->dbg_entry = debugfs_create_file(drv_name, S_IRUGO, NULL, priv,
1020 &data_debug_fops);
1021 return PTR_ERR_OR_ZERO(priv->dbg_entry);
1022}
1023
1024static void data_debugfs_exit(struct fpga_device *priv)
1025{
1026 debugfs_remove(priv->dbg_entry);
1027}
1028
1029#else
1030
1031static inline int data_debugfs_init(struct fpga_device *priv)
1032{
1033 return 0;
1034}
1035
1036static inline void data_debugfs_exit(struct fpga_device *priv)
1037{
1038}
1039
1040#endif
1041
1042
1043
1044
1045
1046static ssize_t data_en_show(struct device *dev, struct device_attribute *attr,
1047 char *buf)
1048{
1049 struct fpga_device *priv = dev_get_drvdata(dev);
1050 int ret;
1051
1052 spin_lock_irq(&priv->lock);
1053 ret = snprintf(buf, PAGE_SIZE, "%u\n", priv->enabled);
1054 spin_unlock_irq(&priv->lock);
1055
1056 return ret;
1057}
1058
1059static ssize_t data_en_set(struct device *dev, struct device_attribute *attr,
1060 const char *buf, size_t count)
1061{
1062 struct fpga_device *priv = dev_get_drvdata(dev);
1063 unsigned long enable;
1064 int ret;
1065
1066 ret = kstrtoul(buf, 0, &enable);
1067 if (ret) {
1068 dev_err(priv->dev, "unable to parse enable input\n");
1069 return ret;
1070 }
1071
1072
1073 ret = mutex_lock_interruptible(&priv->mutex);
1074 if (ret)
1075 return ret;
1076
1077 if (enable)
1078 ret = data_device_enable(priv);
1079 else
1080 ret = data_device_disable(priv);
1081
1082 if (ret) {
1083 dev_err(priv->dev, "device %s failed\n",
1084 enable ? "enable" : "disable");
1085 count = ret;
1086 goto out_unlock;
1087 }
1088
1089out_unlock:
1090 mutex_unlock(&priv->mutex);
1091 return count;
1092}
1093
1094static DEVICE_ATTR(enable, S_IWUSR | S_IRUGO, data_en_show, data_en_set);
1095
1096static struct attribute *data_sysfs_attrs[] = {
1097 &dev_attr_enable.attr,
1098 NULL,
1099};
1100
1101static const struct attribute_group rt_sysfs_attr_group = {
1102 .attrs = data_sysfs_attrs,
1103};
1104
1105
1106
1107
1108
1109static int data_open(struct inode *inode, struct file *filp)
1110{
1111
1112
1113
1114
1115
1116 struct fpga_device *priv = container_of(filp->private_data,
1117 struct fpga_device, miscdev);
1118 struct fpga_reader *reader;
1119 int ret;
1120
1121
1122 reader = kzalloc(sizeof(*reader), GFP_KERNEL);
1123 if (!reader)
1124 return -ENOMEM;
1125
1126 reader->priv = priv;
1127 reader->buf = NULL;
1128
1129 filp->private_data = reader;
1130 ret = nonseekable_open(inode, filp);
1131 if (ret) {
1132 dev_err(priv->dev, "nonseekable-open failed\n");
1133 kfree(reader);
1134 return ret;
1135 }
1136
1137
1138
1139
1140
1141 kref_get(&priv->ref);
1142 return 0;
1143}
1144
1145static int data_release(struct inode *inode, struct file *filp)
1146{
1147 struct fpga_reader *reader = filp->private_data;
1148 struct fpga_device *priv = reader->priv;
1149
1150
1151 data_free_buffer(reader->buf);
1152 kfree(reader);
1153 filp->private_data = NULL;
1154
1155
1156 kref_put(&priv->ref, fpga_device_release);
1157 return 0;
1158}
1159
1160static ssize_t data_read(struct file *filp, char __user *ubuf, size_t count,
1161 loff_t *f_pos)
1162{
1163 struct fpga_reader *reader = filp->private_data;
1164 struct fpga_device *priv = reader->priv;
1165 struct list_head *used = &priv->used;
1166 bool drop_buffer = false;
1167 struct data_buf *dbuf;
1168 size_t avail;
1169 void *data;
1170 int ret;
1171
1172
1173 if (reader->buf) {
1174 dbuf = reader->buf;
1175 goto have_buffer;
1176 }
1177
1178 spin_lock_irq(&priv->lock);
1179
1180
1181 while (list_empty(used)) {
1182 spin_unlock_irq(&priv->lock);
1183
1184 if (filp->f_flags & O_NONBLOCK)
1185 return -EAGAIN;
1186
1187 ret = wait_event_interruptible(priv->wait, !list_empty(used));
1188 if (ret)
1189 return ret;
1190
1191 spin_lock_irq(&priv->lock);
1192 }
1193
1194
1195 dbuf = list_first_entry(used, struct data_buf, entry);
1196 list_del_init(&dbuf->entry);
1197
1198 spin_unlock_irq(&priv->lock);
1199
1200
1201 carma_dma_unmap(priv->dev, dbuf);
1202
1203
1204 reader->buf = dbuf;
1205 reader->buf_start = 0;
1206
1207have_buffer:
1208
1209 avail = dbuf->size - reader->buf_start;
1210 data = dbuf->vaddr + reader->buf_start;
1211
1212
1213 count = min(count, avail);
1214
1215
1216 if (copy_to_user(ubuf, data, count))
1217 return -EFAULT;
1218
1219
1220 avail -= count;
1221
1222
1223
1224
1225
1226 if (avail > 0) {
1227 reader->buf_start += count;
1228 reader->buf = dbuf;
1229 return count;
1230 }
1231
1232
1233
1234
1235
1236
1237
1238 ret = carma_dma_map(priv->dev, dbuf);
1239 if (ret) {
1240 dev_err(priv->dev, "unable to remap buffer for DMA\n");
1241 return -EFAULT;
1242 }
1243
1244
1245 spin_lock_irq(&priv->lock);
1246
1247
1248 reader->buf = NULL;
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258 if (!priv->enabled || dbuf->size != priv->bufsize) {
1259 drop_buffer = true;
1260 goto out_unlock;
1261 }
1262
1263
1264 list_add_tail(&dbuf->entry, &priv->free);
1265
1266out_unlock:
1267 spin_unlock_irq(&priv->lock);
1268
1269 if (drop_buffer) {
1270 carma_dma_unmap(priv->dev, dbuf);
1271 data_free_buffer(dbuf);
1272 }
1273
1274 return count;
1275}
1276
1277static unsigned int data_poll(struct file *filp, struct poll_table_struct *tbl)
1278{
1279 struct fpga_reader *reader = filp->private_data;
1280 struct fpga_device *priv = reader->priv;
1281 unsigned int mask = 0;
1282
1283 poll_wait(filp, &priv->wait, tbl);
1284
1285 if (!list_empty(&priv->used))
1286 mask |= POLLIN | POLLRDNORM;
1287
1288 return mask;
1289}
1290
1291static int data_mmap(struct file *filp, struct vm_area_struct *vma)
1292{
1293 struct fpga_reader *reader = filp->private_data;
1294 struct fpga_device *priv = reader->priv;
1295 unsigned long offset, vsize, psize, addr;
1296
1297
1298 offset = vma->vm_pgoff << PAGE_SHIFT;
1299 vsize = vma->vm_end - vma->vm_start;
1300 psize = priv->phys_size - offset;
1301 addr = (priv->phys_addr + offset) >> PAGE_SHIFT;
1302
1303
1304 if (vsize > psize) {
1305 dev_err(priv->dev, "requested mmap mapping too large\n");
1306 return -EINVAL;
1307 }
1308
1309 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1310
1311 return io_remap_pfn_range(vma, vma->vm_start, addr, vsize,
1312 vma->vm_page_prot);
1313}
1314
1315static const struct file_operations data_fops = {
1316 .owner = THIS_MODULE,
1317 .open = data_open,
1318 .release = data_release,
1319 .read = data_read,
1320 .poll = data_poll,
1321 .mmap = data_mmap,
1322 .llseek = no_llseek,
1323};
1324
1325
1326
1327
1328
1329static bool dma_filter(struct dma_chan *chan, void *data)
1330{
1331
1332
1333
1334
1335
1336
1337 if (chan->chan_id == 0 && chan->device->dev_id == 0)
1338 return false;
1339
1340 return true;
1341}
1342
1343static int data_of_probe(struct platform_device *op)
1344{
1345 struct device_node *of_node = op->dev.of_node;
1346 struct device *this_device;
1347 struct fpga_device *priv;
1348 struct resource res;
1349 dma_cap_mask_t mask;
1350 int ret;
1351
1352
1353 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1354 if (!priv) {
1355 dev_err(&op->dev, "Unable to allocate device private data\n");
1356 ret = -ENOMEM;
1357 goto out_return;
1358 }
1359
1360 platform_set_drvdata(op, priv);
1361 priv->dev = &op->dev;
1362 kref_init(&priv->ref);
1363 mutex_init(&priv->mutex);
1364
1365 dev_set_drvdata(priv->dev, priv);
1366 spin_lock_init(&priv->lock);
1367 INIT_LIST_HEAD(&priv->free);
1368 INIT_LIST_HEAD(&priv->used);
1369 init_waitqueue_head(&priv->wait);
1370
1371
1372 priv->miscdev.minor = MISC_DYNAMIC_MINOR;
1373 priv->miscdev.name = drv_name;
1374 priv->miscdev.fops = &data_fops;
1375
1376
1377 ret = of_address_to_resource(of_node, 0, &res);
1378 if (ret) {
1379 dev_err(&op->dev, "Unable to find FPGA physical address\n");
1380 ret = -ENODEV;
1381 goto out_free_priv;
1382 }
1383
1384 priv->phys_addr = res.start;
1385 priv->phys_size = resource_size(&res);
1386
1387
1388 priv->regs = of_iomap(of_node, 0);
1389 if (!priv->regs) {
1390 dev_err(&op->dev, "Unable to ioremap registers\n");
1391 ret = -ENOMEM;
1392 goto out_free_priv;
1393 }
1394
1395 dma_cap_zero(mask);
1396 dma_cap_set(DMA_MEMCPY, mask);
1397 dma_cap_set(DMA_INTERRUPT, mask);
1398 dma_cap_set(DMA_SLAVE, mask);
1399 dma_cap_set(DMA_SG, mask);
1400
1401
1402 priv->chan = dma_request_channel(mask, dma_filter, NULL);
1403 if (!priv->chan) {
1404 dev_err(&op->dev, "Unable to request DMA channel\n");
1405 ret = -ENODEV;
1406 goto out_unmap_regs;
1407 }
1408
1409
1410 priv->irq = irq_of_parse_and_map(of_node, 0);
1411 if (priv->irq == NO_IRQ) {
1412 dev_err(&op->dev, "Unable to find IRQ line\n");
1413 ret = -ENODEV;
1414 goto out_release_dma;
1415 }
1416
1417
1418 iowrite32be(IRQ_CORL_DONE, priv->regs + SYS_IRQ_OUTPUT_DATA);
1419
1420
1421 ret = misc_register(&priv->miscdev);
1422 if (ret) {
1423 dev_err(&op->dev, "Unable to register miscdevice\n");
1424 goto out_irq_dispose_mapping;
1425 }
1426
1427
1428 ret = data_debugfs_init(priv);
1429 if (ret) {
1430 dev_err(&op->dev, "Unable to create debugfs files\n");
1431 goto out_misc_deregister;
1432 }
1433
1434
1435 this_device = priv->miscdev.this_device;
1436 dev_set_drvdata(this_device, priv);
1437 ret = sysfs_create_group(&this_device->kobj, &rt_sysfs_attr_group);
1438 if (ret) {
1439 dev_err(&op->dev, "Unable to create sysfs files\n");
1440 goto out_data_debugfs_exit;
1441 }
1442
1443 dev_info(&op->dev, "CARMA FPGA Realtime Data Driver Loaded\n");
1444 return 0;
1445
1446out_data_debugfs_exit:
1447 data_debugfs_exit(priv);
1448out_misc_deregister:
1449 misc_deregister(&priv->miscdev);
1450out_irq_dispose_mapping:
1451 irq_dispose_mapping(priv->irq);
1452out_release_dma:
1453 dma_release_channel(priv->chan);
1454out_unmap_regs:
1455 iounmap(priv->regs);
1456out_free_priv:
1457 kref_put(&priv->ref, fpga_device_release);
1458out_return:
1459 return ret;
1460}
1461
1462static int data_of_remove(struct platform_device *op)
1463{
1464 struct fpga_device *priv = platform_get_drvdata(op);
1465 struct device *this_device = priv->miscdev.this_device;
1466
1467
1468 sysfs_remove_group(&this_device->kobj, &rt_sysfs_attr_group);
1469
1470
1471 data_debugfs_exit(priv);
1472
1473
1474 data_device_disable(priv);
1475
1476
1477 misc_deregister(&priv->miscdev);
1478
1479
1480 irq_dispose_mapping(priv->irq);
1481 dma_release_channel(priv->chan);
1482 iounmap(priv->regs);
1483
1484
1485 kref_put(&priv->ref, fpga_device_release);
1486 return 0;
1487}
1488
1489static const struct of_device_id data_of_match[] = {
1490 { .compatible = "carma,carma-fpga", },
1491 {},
1492};
1493
1494static struct platform_driver data_of_driver = {
1495 .probe = data_of_probe,
1496 .remove = data_of_remove,
1497 .driver = {
1498 .name = drv_name,
1499 .of_match_table = data_of_match,
1500 },
1501};
1502
1503module_platform_driver(data_of_driver);
1504
1505MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
1506MODULE_DESCRIPTION("CARMA DATA-FPGA Access Driver");
1507MODULE_LICENSE("GPL");
1508