LXR linux/drivers/net/ethernet/mellanox/mlx5/core/port.c

   1/*
   2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
   3 *
   4 * This software is available to you under a choice of one of two
   5 * licenses.  You may choose to be licensed under the terms of the GNU
   6 * General Public License (GPL) Version 2, available from the file
   7 * COPYING in the main directory of this source tree, or the
   8 * OpenIB.org BSD license below:
   9 *
  10 *     Redistribution and use in source and binary forms, with or
  11 *     without modification, are permitted provided that the following
  12 *     conditions are met:
  13 *
  14 *      - Redistributions of source code must retain the above
  15 *        copyright notice, this list of conditions and the following
  16 *        disclaimer.
  17 *
  18 *      - Redistributions in binary form must reproduce the above
  19 *        copyright notice, this list of conditions and the following
  20 *        disclaimer in the documentation and/or other materials
  21 *        provided with the distribution.
  22 *
  23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30 * SOFTWARE.
  31 */
  32
  33#include <linux/module.h>
  34#include <linux/mlx5/driver.h>
  35#include <linux/mlx5/cmd.h>
  36#include "mlx5_core.h"
  37
  38int mlx5_core_access_reg(struct mlx5_core_dev *dev, void *data_in,
  39                         int size_in, void *data_out, int size_out,
  40                         u16 reg_num, int arg, int write)
  41{
  42        struct mlx5_access_reg_mbox_in *in = NULL;
  43        struct mlx5_access_reg_mbox_out *out = NULL;
  44        int err = -ENOMEM;
  45
  46        in = mlx5_vzalloc(sizeof(*in) + size_in);
  47        if (!in)
  48                return -ENOMEM;
  49
  50        out = mlx5_vzalloc(sizeof(*out) + size_out);
  51        if (!out)
  52                goto ex1;
  53
  54        memcpy(in->data, data_in, size_in);
  55        in->hdr.opcode = cpu_to_be16(MLX5_CMD_OP_ACCESS_REG);
  56        in->hdr.opmod = cpu_to_be16(!write);
  57        in->arg = cpu_to_be32(arg);
  58        in->register_id = cpu_to_be16(reg_num);
  59        err = mlx5_cmd_exec(dev, in, sizeof(*in) + size_in, out,
  60                            sizeof(*out) + size_out);
  61        if (err)
  62                goto ex2;
  63
  64        if (out->hdr.status)
  65                err = mlx5_cmd_status_to_err(&out->hdr);
  66
  67        if (!err)
  68                memcpy(data_out, out->data, size_out);
  69
  70ex2:
  71        kvfree(out);
  72ex1:
  73        kvfree(in);
  74        return err;
  75}
  76EXPORT_SYMBOL_GPL(mlx5_core_access_reg);
  77
  78
  79struct mlx5_reg_pcap {
  80        u8                      rsvd0;
  81        u8                      port_num;
  82        u8                      rsvd1[2];
  83        __be32                  caps_127_96;
  84        __be32                  caps_95_64;
  85        __be32                  caps_63_32;
  86        __be32                  caps_31_0;
  87};
  88
  89int mlx5_set_port_caps(struct mlx5_core_dev *dev, u8 port_num, u32 caps)
  90{
  91        struct mlx5_reg_pcap in;
  92        struct mlx5_reg_pcap out;
  93        int err;
  94
  95        memset(&in, 0, sizeof(in));
  96        in.caps_127_96 = cpu_to_be32(caps);
  97        in.port_num = port_num;
  98
  99        err = mlx5_core_access_reg(dev, &in, sizeof(in), &out,
 100                                   sizeof(out), MLX5_REG_PCAP, 0, 1);
 101
 102        return err;
 103}
 104EXPORT_SYMBOL_GPL(mlx5_set_port_caps);
 105