LXR linux/drivers/net/wireless/rtlwifi/rtl8192de/phy.h

   1/******************************************************************************
   2 *
   3 * Copyright(c) 2009-2012  Realtek Corporation.
   4 *
   5 * This program is free software; you can redistribute it and/or modify it
   6 * under the terms of version 2 of the GNU General Public License as
   7 * published by the Free Software Foundation.
   8 *
   9 * This program is distributed in the hope that it will be useful, but WITHOUT
  10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12 * more details.
  13 *
  14 * You should have received a copy of the GNU General Public License along with
  15 * this program; if not, write to the Free Software Foundation, Inc.,
  16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17 *
  18 * The full GNU General Public License is included in this distribution in the
  19 * file called LICENSE.
  20 *
  21 * Contact Information:
  22 * wlanfae <wlanfae@realtek.com>
  23 * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24 * Hsinchu 300, Taiwan.
  25 *
  26 * Larry Finger <Larry.Finger@lwfinger.net>
  27 *
  28 *****************************************************************************/
  29
  30#ifndef __RTL92D_PHY_H__
  31#define __RTL92D_PHY_H__
  32
  33#define MAX_PRECMD_CNT                          16
  34#define MAX_RFDEPENDCMD_CNT                     16
  35#define MAX_POSTCMD_CNT                         16
  36
  37#define MAX_DOZE_WAITING_TIMES_9x               64
  38
  39#define RT_CANNOT_IO(hw)                        false
  40#define HIGHPOWER_RADIOA_ARRAYLEN               22
  41
  42#define MAX_TOLERANCE                           5
  43
  44#define APK_BB_REG_NUM                          5
  45#define APK_AFE_REG_NUM                         16
  46#define APK_CURVE_REG_NUM                       4
  47#define PATH_NUM                                2
  48
  49#define LOOP_LIMIT                              5
  50#define MAX_STALL_TIME                          50
  51#define ANTENNA_DIVERSITY_VALUE                 0x80
  52#define MAX_TXPWR_IDX_NMODE_92S                 63
  53#define RESET_CNT_LIMIT                         3
  54
  55#define IQK_ADDA_REG_NUM                        16
  56#define IQK_BB_REG_NUM                          10
  57#define IQK_BB_REG_NUM_test                     6
  58#define IQK_MAC_REG_NUM                         4
  59#define RX_INDEX_MAPPING_NUM                    15
  60
  61#define IQK_DELAY_TIME                          1
  62
  63#define CT_OFFSET_MAC_ADDR                      0X16
  64
  65#define CT_OFFSET_CCK_TX_PWR_IDX                0x5A
  66#define CT_OFFSET_HT401S_TX_PWR_IDX             0x60
  67#define CT_OFFSET_HT402S_TX_PWR_IDX_DIFF        0x66
  68#define CT_OFFSET_HT20_TX_PWR_IDX_DIFF          0x69
  69#define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF          0x6C
  70
  71#define CT_OFFSET_HT40_MAX_PWR_OFFSET           0x6F
  72#define CT_OFFSET_HT20_MAX_PWR_OFFSET           0x72
  73
  74#define CT_OFFSET_CHANNEL_PLAH                  0x75
  75#define CT_OFFSET_THERMAL_METER                 0x78
  76#define CT_OFFSET_RF_OPTION                     0x79
  77#define CT_OFFSET_VERSION                       0x7E
  78#define CT_OFFSET_CUSTOMER_ID                   0x7F
  79
  80enum swchnlcmd_id {
  81        CMDID_END,
  82        CMDID_SET_TXPOWEROWER_LEVEL,
  83        CMDID_BBREGWRITE10,
  84        CMDID_WRITEPORT_ULONG,
  85        CMDID_WRITEPORT_USHORT,
  86        CMDID_WRITEPORT_UCHAR,
  87        CMDID_RF_WRITEREG,
  88};
  89
  90struct swchnlcmd {
  91        enum swchnlcmd_id cmdid;
  92        u32 para1;
  93        u32 para2;
  94        u32 msdelay;
  95};
  96
  97enum baseband_config_type {
  98        BASEBAND_CONFIG_PHY_REG = 0,
  99        BASEBAND_CONFIG_AGC_TAB = 1,
 100};
 101
 102enum rf_content {
 103        radioa_txt = 0,
 104        radiob_txt = 1,
 105        radioc_txt = 2,
 106        radiod_txt = 3
 107};
 108
 109static inline void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
 110                                                     unsigned long *flag)
 111{
 112        struct rtl_priv *rtlpriv = rtl_priv(hw);
 113
 114        if (rtlpriv->rtlhal.interfaceindex == 1)
 115                spin_lock_irqsave(&rtlpriv->locks.cck_and_rw_pagea_lock, *flag);
 116}
 117
 118static inline void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
 119                                                     unsigned long *flag)
 120{
 121        struct rtl_priv *rtlpriv = rtl_priv(hw);
 122
 123        if (rtlpriv->rtlhal.interfaceindex == 1)
 124                spin_unlock_irqrestore(&rtlpriv->locks.cck_and_rw_pagea_lock,
 125                        *flag);
 126}
 127
 128u32 rtl92d_phy_query_bb_reg(struct ieee80211_hw *hw,
 129                            u32 regaddr, u32 bitmask);
 130void rtl92d_phy_set_bb_reg(struct ieee80211_hw *hw,
 131                           u32 regaddr, u32 bitmask, u32 data);
 132u32 rtl92d_phy_query_rf_reg(struct ieee80211_hw *hw,
 133                            enum radio_path rfpath, u32 regaddr,
 134                            u32 bitmask);
 135void rtl92d_phy_set_rf_reg(struct ieee80211_hw *hw,
 136                           enum radio_path rfpath, u32 regaddr,
 137                           u32 bitmask, u32 data);
 138bool rtl92d_phy_mac_config(struct ieee80211_hw *hw);
 139bool rtl92d_phy_bb_config(struct ieee80211_hw *hw);
 140bool rtl92d_phy_rf_config(struct ieee80211_hw *hw);
 141bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
 142                                          enum radio_path rfpath);
 143void rtl92d_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
 144void rtl92d_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
 145void rtl92d_phy_set_bw_mode(struct ieee80211_hw *hw,
 146                            enum nl80211_channel_type ch_type);
 147u8 rtl92d_phy_sw_chnl(struct ieee80211_hw *hw);
 148bool rtl92d_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
 149                                          enum rf_content content,
 150                                          enum radio_path rfpath);
 151bool rtl92d_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
 152bool rtl92d_phy_set_rf_power_state(struct ieee80211_hw *hw,
 153                                   enum rf_pwrstate rfpwr_state);
 154
 155void rtl92d_phy_config_macphymode(struct ieee80211_hw *hw);
 156void rtl92d_phy_config_macphymode_info(struct ieee80211_hw *hw);
 157u8 rtl92d_get_chnlgroup_fromarray(u8 chnl);
 158void rtl92d_phy_set_poweron(struct ieee80211_hw *hw);
 159void rtl92d_phy_config_maccoexist_rfpage(struct ieee80211_hw *hw);
 160bool rtl92d_phy_check_poweroff(struct ieee80211_hw *hw);
 161void rtl92d_phy_lc_calibrate(struct ieee80211_hw *hw);
 162void rtl92d_update_bbrf_configuration(struct ieee80211_hw *hw);
 163void rtl92d_phy_ap_calibrate(struct ieee80211_hw *hw, char delta);
 164void rtl92d_phy_iq_calibrate(struct ieee80211_hw *hw);
 165void rtl92d_phy_reset_iqk_result(struct ieee80211_hw *hw);
 166void rtl92d_release_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
 167                                       unsigned long *flag);
 168void rtl92d_acquire_cckandrw_pagea_ctl(struct ieee80211_hw *hw,
 169                                       unsigned long *flag);
 170u8 rtl92d_get_rightchnlplace_for_iqk(u8 chnl);
 171void rtl92d_phy_reload_iqk_setting(struct ieee80211_hw *hw, u8 channel);
 172
 173#endif
 174