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18#include <linux/err.h>
19#include <linux/interrupt.h>
20#include <linux/device.h>
21#include <linux/kernel.h>
22#include <linux/slab.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/sysfs.h>
26#include <linux/list.h>
27#include <linux/io.h>
28#include <linux/module.h>
29#include <linux/platform_device.h>
30#include <linux/spinlock.h>
31#include <linux/wait.h>
32#include <linux/sched.h>
33#include <linux/stmp_device.h>
34#include <linux/bitops.h>
35#include <linux/completion.h>
36#include <linux/delay.h>
37#include <linux/input.h>
38#include <linux/clk.h>
39
40#include <linux/iio/iio.h>
41#include <linux/iio/sysfs.h>
42#include <linux/iio/buffer.h>
43#include <linux/iio/trigger.h>
44#include <linux/iio/trigger_consumer.h>
45#include <linux/iio/triggered_buffer.h>
46
47#define DRIVER_NAME "mxs-lradc"
48
49#define LRADC_MAX_DELAY_CHANS 4
50#define LRADC_MAX_MAPPED_CHANS 8
51#define LRADC_MAX_TOTAL_CHANS 16
52
53#define LRADC_DELAY_TIMER_HZ 2000
54
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59
60
61#define LRADC_DELAY_TIMER_PER 200
62#define LRADC_DELAY_TIMER_LOOP 5
63
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69
70
71#define LRADC_TS_SAMPLE_DELAY_MS 5
72
73
74
75
76
77#define LRADC_TS_SAMPLE_AMOUNT 4
78
79enum mxs_lradc_id {
80 IMX23_LRADC,
81 IMX28_LRADC,
82};
83
84static const char * const mx23_lradc_irq_names[] = {
85 "mxs-lradc-touchscreen",
86 "mxs-lradc-channel0",
87 "mxs-lradc-channel1",
88 "mxs-lradc-channel2",
89 "mxs-lradc-channel3",
90 "mxs-lradc-channel4",
91 "mxs-lradc-channel5",
92 "mxs-lradc-channel6",
93 "mxs-lradc-channel7",
94};
95
96static const char * const mx28_lradc_irq_names[] = {
97 "mxs-lradc-touchscreen",
98 "mxs-lradc-thresh0",
99 "mxs-lradc-thresh1",
100 "mxs-lradc-channel0",
101 "mxs-lradc-channel1",
102 "mxs-lradc-channel2",
103 "mxs-lradc-channel3",
104 "mxs-lradc-channel4",
105 "mxs-lradc-channel5",
106 "mxs-lradc-channel6",
107 "mxs-lradc-channel7",
108 "mxs-lradc-button0",
109 "mxs-lradc-button1",
110};
111
112struct mxs_lradc_of_config {
113 const int irq_count;
114 const char * const *irq_name;
115 const uint32_t *vref_mv;
116};
117
118#define VREF_MV_BASE 1850
119
120static const uint32_t mx23_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
121 VREF_MV_BASE,
122 VREF_MV_BASE,
123 VREF_MV_BASE,
124 VREF_MV_BASE,
125 VREF_MV_BASE,
126 VREF_MV_BASE,
127 VREF_MV_BASE * 2,
128 VREF_MV_BASE * 4,
129 VREF_MV_BASE,
130 VREF_MV_BASE,
131 VREF_MV_BASE,
132 VREF_MV_BASE,
133 VREF_MV_BASE,
134 VREF_MV_BASE,
135 VREF_MV_BASE,
136 VREF_MV_BASE * 4,
137};
138
139static const uint32_t mx28_vref_mv[LRADC_MAX_TOTAL_CHANS] = {
140 VREF_MV_BASE,
141 VREF_MV_BASE,
142 VREF_MV_BASE,
143 VREF_MV_BASE,
144 VREF_MV_BASE,
145 VREF_MV_BASE,
146 VREF_MV_BASE,
147 VREF_MV_BASE * 4,
148 VREF_MV_BASE,
149 VREF_MV_BASE,
150 VREF_MV_BASE * 2,
151 VREF_MV_BASE,
152 VREF_MV_BASE * 2,
153 VREF_MV_BASE,
154 VREF_MV_BASE,
155 VREF_MV_BASE * 4,
156};
157
158static const struct mxs_lradc_of_config mxs_lradc_of_config[] = {
159 [IMX23_LRADC] = {
160 .irq_count = ARRAY_SIZE(mx23_lradc_irq_names),
161 .irq_name = mx23_lradc_irq_names,
162 .vref_mv = mx23_vref_mv,
163 },
164 [IMX28_LRADC] = {
165 .irq_count = ARRAY_SIZE(mx28_lradc_irq_names),
166 .irq_name = mx28_lradc_irq_names,
167 .vref_mv = mx28_vref_mv,
168 },
169};
170
171enum mxs_lradc_ts {
172 MXS_LRADC_TOUCHSCREEN_NONE = 0,
173 MXS_LRADC_TOUCHSCREEN_4WIRE,
174 MXS_LRADC_TOUCHSCREEN_5WIRE,
175};
176
177
178
179
180enum lradc_ts_plate {
181 LRADC_TOUCH = 0,
182 LRADC_SAMPLE_X,
183 LRADC_SAMPLE_Y,
184 LRADC_SAMPLE_PRESSURE,
185 LRADC_SAMPLE_VALID,
186};
187
188enum mxs_lradc_divbytwo {
189 MXS_LRADC_DIV_DISABLED = 0,
190 MXS_LRADC_DIV_ENABLED,
191};
192
193struct mxs_lradc_scale {
194 unsigned int integer;
195 unsigned int nano;
196};
197
198struct mxs_lradc {
199 struct device *dev;
200 void __iomem *base;
201 int irq[13];
202
203 struct clk *clk;
204
205 uint32_t *buffer;
206 struct iio_trigger *trig;
207
208 struct mutex lock;
209
210 struct completion completion;
211
212 const uint32_t *vref_mv;
213 struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
214 unsigned long is_divided;
215
216
217
218
219
220
221#define TOUCHSCREEN_VCHANNEL1 7
222#define TOUCHSCREEN_VCHANNEL2 6
223#define BUFFER_VCHANS_LIMITED 0x3f
224#define BUFFER_VCHANS_ALL 0xff
225 u8 buffer_vchans;
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245
246#define CHAN_MASK_TOUCHBUTTON (BIT(1) | BIT(0))
247#define CHAN_MASK_TOUCHSCREEN_4WIRE (0xf << 2)
248#define CHAN_MASK_TOUCHSCREEN_5WIRE (0x1f << 2)
249 enum mxs_lradc_ts use_touchscreen;
250 bool use_touchbutton;
251
252 struct input_dev *ts_input;
253
254 enum mxs_lradc_id soc;
255 enum lradc_ts_plate cur_plate;
256 bool ts_valid;
257 unsigned ts_x_pos;
258 unsigned ts_y_pos;
259 unsigned ts_pressure;
260
261
262
263 unsigned over_sample_cnt;
264
265 unsigned over_sample_delay;
266
267 unsigned settling_delay;
268};
269
270#define LRADC_CTRL0 0x00
271# define LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE BIT(23)
272# define LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE BIT(22)
273# define LRADC_CTRL0_MX28_YNNSW BIT(21)
274# define LRADC_CTRL0_MX28_YPNSW BIT(20)
275# define LRADC_CTRL0_MX28_YPPSW BIT(19)
276# define LRADC_CTRL0_MX28_XNNSW BIT(18)
277# define LRADC_CTRL0_MX28_XNPSW BIT(17)
278# define LRADC_CTRL0_MX28_XPPSW BIT(16)
279
280# define LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE BIT(20)
281# define LRADC_CTRL0_MX23_YM BIT(19)
282# define LRADC_CTRL0_MX23_XM BIT(18)
283# define LRADC_CTRL0_MX23_YP BIT(17)
284# define LRADC_CTRL0_MX23_XP BIT(16)
285
286# define LRADC_CTRL0_MX28_PLATE_MASK \
287 (LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE | \
288 LRADC_CTRL0_MX28_YNNSW | LRADC_CTRL0_MX28_YPNSW | \
289 LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW | \
290 LRADC_CTRL0_MX28_XNPSW | LRADC_CTRL0_MX28_XPPSW)
291
292# define LRADC_CTRL0_MX23_PLATE_MASK \
293 (LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE | \
294 LRADC_CTRL0_MX23_YM | LRADC_CTRL0_MX23_XM | \
295 LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XP)
296
297#define LRADC_CTRL1 0x10
298#define LRADC_CTRL1_TOUCH_DETECT_IRQ_EN BIT(24)
299#define LRADC_CTRL1_LRADC_IRQ_EN(n) (1 << ((n) + 16))
300#define LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK (0x1fff << 16)
301#define LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK (0x01ff << 16)
302#define LRADC_CTRL1_LRADC_IRQ_EN_OFFSET 16
303#define LRADC_CTRL1_TOUCH_DETECT_IRQ BIT(8)
304#define LRADC_CTRL1_LRADC_IRQ(n) (1 << (n))
305#define LRADC_CTRL1_MX28_LRADC_IRQ_MASK 0x1fff
306#define LRADC_CTRL1_MX23_LRADC_IRQ_MASK 0x01ff
307#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
308
309#define LRADC_CTRL2 0x20
310#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
311#define LRADC_CTRL2_TEMPSENSE_PWD BIT(15)
312
313#define LRADC_STATUS 0x40
314#define LRADC_STATUS_TOUCH_DETECT_RAW BIT(0)
315
316#define LRADC_CH(n) (0x50 + (0x10 * (n)))
317#define LRADC_CH_ACCUMULATE BIT(29)
318#define LRADC_CH_NUM_SAMPLES_MASK (0x1f << 24)
319#define LRADC_CH_NUM_SAMPLES_OFFSET 24
320#define LRADC_CH_NUM_SAMPLES(x) \
321 ((x) << LRADC_CH_NUM_SAMPLES_OFFSET)
322#define LRADC_CH_VALUE_MASK 0x3ffff
323#define LRADC_CH_VALUE_OFFSET 0
324
325#define LRADC_DELAY(n) (0xd0 + (0x10 * (n)))
326#define LRADC_DELAY_TRIGGER_LRADCS_MASK (0xff << 24)
327#define LRADC_DELAY_TRIGGER_LRADCS_OFFSET 24
328#define LRADC_DELAY_TRIGGER(x) \
329 (((x) << LRADC_DELAY_TRIGGER_LRADCS_OFFSET) & \
330 LRADC_DELAY_TRIGGER_LRADCS_MASK)
331#define LRADC_DELAY_KICK (1 << 20)
332#define LRADC_DELAY_TRIGGER_DELAYS_MASK (0xf << 16)
333#define LRADC_DELAY_TRIGGER_DELAYS_OFFSET 16
334#define LRADC_DELAY_TRIGGER_DELAYS(x) \
335 (((x) << LRADC_DELAY_TRIGGER_DELAYS_OFFSET) & \
336 LRADC_DELAY_TRIGGER_DELAYS_MASK)
337#define LRADC_DELAY_LOOP_COUNT_MASK (0x1f << 11)
338#define LRADC_DELAY_LOOP_COUNT_OFFSET 11
339#define LRADC_DELAY_LOOP(x) \
340 (((x) << LRADC_DELAY_LOOP_COUNT_OFFSET) & \
341 LRADC_DELAY_LOOP_COUNT_MASK)
342#define LRADC_DELAY_DELAY_MASK 0x7ff
343#define LRADC_DELAY_DELAY_OFFSET 0
344#define LRADC_DELAY_DELAY(x) \
345 (((x) << LRADC_DELAY_DELAY_OFFSET) & \
346 LRADC_DELAY_DELAY_MASK)
347
348#define LRADC_CTRL4 0x140
349#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
350#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
351#define LRADC_CTRL4_LRADCSELECT(n, x) \
352 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
353 LRADC_CTRL4_LRADCSELECT_MASK(n))
354
355#define LRADC_RESOLUTION 12
356#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
357
358static void mxs_lradc_reg_set(struct mxs_lradc *lradc, u32 val, u32 reg)
359{
360 writel(val, lradc->base + reg + STMP_OFFSET_REG_SET);
361}
362
363static void mxs_lradc_reg_clear(struct mxs_lradc *lradc, u32 val, u32 reg)
364{
365 writel(val, lradc->base + reg + STMP_OFFSET_REG_CLR);
366}
367
368static void mxs_lradc_reg_wrt(struct mxs_lradc *lradc, u32 val, u32 reg)
369{
370 writel(val, lradc->base + reg);
371}
372
373static u32 mxs_lradc_plate_mask(struct mxs_lradc *lradc)
374{
375 if (lradc->soc == IMX23_LRADC)
376 return LRADC_CTRL0_MX23_PLATE_MASK;
377 return LRADC_CTRL0_MX28_PLATE_MASK;
378}
379
380static u32 mxs_lradc_irq_en_mask(struct mxs_lradc *lradc)
381{
382 if (lradc->soc == IMX23_LRADC)
383 return LRADC_CTRL1_MX23_LRADC_IRQ_EN_MASK;
384 return LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK;
385}
386
387static u32 mxs_lradc_irq_mask(struct mxs_lradc *lradc)
388{
389 if (lradc->soc == IMX23_LRADC)
390 return LRADC_CTRL1_MX23_LRADC_IRQ_MASK;
391 return LRADC_CTRL1_MX28_LRADC_IRQ_MASK;
392}
393
394static u32 mxs_lradc_touch_detect_bit(struct mxs_lradc *lradc)
395{
396 if (lradc->soc == IMX23_LRADC)
397 return LRADC_CTRL0_MX23_TOUCH_DETECT_ENABLE;
398 return LRADC_CTRL0_MX28_TOUCH_DETECT_ENABLE;
399}
400
401static u32 mxs_lradc_drive_x_plate(struct mxs_lradc *lradc)
402{
403 if (lradc->soc == IMX23_LRADC)
404 return LRADC_CTRL0_MX23_XP | LRADC_CTRL0_MX23_XM;
405 return LRADC_CTRL0_MX28_XPPSW | LRADC_CTRL0_MX28_XNNSW;
406}
407
408static u32 mxs_lradc_drive_y_plate(struct mxs_lradc *lradc)
409{
410 if (lradc->soc == IMX23_LRADC)
411 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_YM;
412 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_YNNSW;
413}
414
415static u32 mxs_lradc_drive_pressure(struct mxs_lradc *lradc)
416{
417 if (lradc->soc == IMX23_LRADC)
418 return LRADC_CTRL0_MX23_YP | LRADC_CTRL0_MX23_XM;
419 return LRADC_CTRL0_MX28_YPPSW | LRADC_CTRL0_MX28_XNNSW;
420}
421
422static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc)
423{
424 return !!(readl(lradc->base + LRADC_STATUS) &
425 LRADC_STATUS_TOUCH_DETECT_RAW);
426}
427
428static void mxs_lradc_map_channel(struct mxs_lradc *lradc, unsigned vch,
429 unsigned ch)
430{
431 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(vch),
432 LRADC_CTRL4);
433 mxs_lradc_reg_set(lradc, LRADC_CTRL4_LRADCSELECT(vch, ch), LRADC_CTRL4);
434}
435
436static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)
437{
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446 mxs_lradc_reg_wrt(lradc, LRADC_CH_ACCUMULATE |
447 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1),
448 LRADC_CH(ch));
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454 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch));
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464 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch) |
465 LRADC_DELAY_TRIGGER_DELAYS(0) |
466 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
467 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
468 LRADC_DELAY(3));
469
470 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch), LRADC_CTRL1);
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478 mxs_lradc_reg_wrt(lradc,
479 LRADC_DELAY_TRIGGER(0) |
480 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) |
481 LRADC_DELAY_KICK |
482 LRADC_DELAY_DELAY(lradc->settling_delay),
483 LRADC_DELAY(2));
484}
485
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491
492static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1,
493 unsigned ch2)
494{
495 u32 reg;
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505 reg = LRADC_CH_ACCUMULATE |
506 LRADC_CH_NUM_SAMPLES(lradc->over_sample_cnt - 1);
507 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch1));
508 mxs_lradc_reg_wrt(lradc, reg, LRADC_CH(ch2));
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514 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch1));
515 mxs_lradc_reg_clear(lradc, LRADC_CH_VALUE_MASK, LRADC_CH(ch2));
516
517
518 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << ch1) |
519 LRADC_DELAY_TRIGGER(1 << ch2) |
520 LRADC_DELAY_TRIGGER_DELAYS(0) |
521 LRADC_DELAY_LOOP(lradc->over_sample_cnt - 1) |
522 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
523 LRADC_DELAY(3));
524
525 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch2), LRADC_CTRL1);
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533 mxs_lradc_reg_wrt(lradc,
534 LRADC_DELAY_TRIGGER(0) |
535 LRADC_DELAY_TRIGGER_DELAYS(BIT(3)) |
536 LRADC_DELAY_KICK |
537 LRADC_DELAY_DELAY(lradc->settling_delay), LRADC_DELAY(2));
538}
539
540static unsigned mxs_lradc_read_raw_channel(struct mxs_lradc *lradc,
541 unsigned channel)
542{
543 u32 reg;
544 unsigned num_samples, val;
545
546 reg = readl(lradc->base + LRADC_CH(channel));
547 if (reg & LRADC_CH_ACCUMULATE)
548 num_samples = lradc->over_sample_cnt;
549 else
550 num_samples = 1;
551
552 val = (reg & LRADC_CH_VALUE_MASK) >> LRADC_CH_VALUE_OFFSET;
553 return val / num_samples;
554}
555
556static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc,
557 unsigned ch1, unsigned ch2)
558{
559 u32 reg, mask;
560 unsigned pressure, m1, m2;
561
562 mask = LRADC_CTRL1_LRADC_IRQ(ch1) | LRADC_CTRL1_LRADC_IRQ(ch2);
563 reg = readl(lradc->base + LRADC_CTRL1) & mask;
564
565 while (reg != mask) {
566 reg = readl(lradc->base + LRADC_CTRL1) & mask;
567 dev_dbg(lradc->dev, "One channel is still busy: %X\n", reg);
568 }
569
570 m1 = mxs_lradc_read_raw_channel(lradc, ch1);
571 m2 = mxs_lradc_read_raw_channel(lradc, ch2);
572
573 if (m2 == 0) {
574 dev_warn(lradc->dev, "Cannot calculate pressure\n");
575 return 1 << (LRADC_RESOLUTION - 1);
576 }
577
578
579 pressure = m1;
580 pressure *= (1 << LRADC_RESOLUTION);
581 pressure /= m2;
582
583 dev_dbg(lradc->dev, "Pressure = %u\n", pressure);
584 return pressure;
585}
586
587#define TS_CH_XP 2
588#define TS_CH_YP 3
589#define TS_CH_XM 4
590#define TS_CH_YM 5
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604static void mxs_lradc_setup_touch_detection(struct mxs_lradc *lradc)
605{
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612 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
613 mxs_lradc_reg_set(lradc, mxs_lradc_touch_detect_bit(lradc),
614 LRADC_CTRL0);
615}
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629static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc)
630{
631 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
632 mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0);
633
634 lradc->cur_plate = LRADC_SAMPLE_X;
635 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YP);
636 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
637}
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651static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc)
652{
653 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
654 mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0);
655
656 lradc->cur_plate = LRADC_SAMPLE_Y;
657 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_XM);
658 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
659}
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673static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc)
674{
675 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
676 mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0);
677
678 lradc->cur_plate = LRADC_SAMPLE_PRESSURE;
679 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YM);
680 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL2, TS_CH_XP);
681 mxs_lradc_setup_ts_pressure(lradc, TOUCHSCREEN_VCHANNEL2,
682 TOUCHSCREEN_VCHANNEL1);
683}
684
685static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)
686{
687 mxs_lradc_setup_touch_detection(lradc);
688
689 lradc->cur_plate = LRADC_TOUCH;
690 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
691 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
692 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
693}
694
695static void mxs_lradc_start_touch_event(struct mxs_lradc *lradc)
696{
697 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
698 LRADC_CTRL1);
699 mxs_lradc_reg_set(lradc,
700 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1);
701
702
703
704
705 mxs_lradc_prepare_y_pos(lradc);
706}
707
708static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc)
709{
710 input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos);
711 input_report_abs(lradc->ts_input, ABS_Y, lradc->ts_y_pos);
712 input_report_abs(lradc->ts_input, ABS_PRESSURE, lradc->ts_pressure);
713 input_report_key(lradc->ts_input, BTN_TOUCH, 1);
714 input_sync(lradc->ts_input);
715}
716
717static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc)
718{
719 mxs_lradc_setup_touch_detection(lradc);
720 lradc->cur_plate = LRADC_SAMPLE_VALID;
721
722
723
724
725 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1));
726 mxs_lradc_reg_clear(lradc,
727 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
728 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
729 mxs_lradc_reg_wrt(lradc,
730 LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |
731 LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10),
732 LRADC_DELAY(2));
733}
734
735
736
737
738
739static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid)
740{
741
742 if (valid && mxs_lradc_check_touch_event(lradc)) {
743 lradc->ts_valid = true;
744 mxs_lradc_report_ts_event(lradc);
745 }
746
747
748 if (mxs_lradc_check_touch_event(lradc)) {
749 mxs_lradc_prepare_y_pos(lradc);
750 return;
751 }
752
753 if (lradc->ts_valid) {
754
755 lradc->ts_valid = false;
756 input_report_key(lradc->ts_input, BTN_TOUCH, 0);
757 input_sync(lradc->ts_input);
758 }
759
760
761 lradc->cur_plate = LRADC_TOUCH;
762 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
763 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
764 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
765 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
766 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1);
767 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
768}
769
770
771static void mxs_lradc_handle_touch(struct mxs_lradc *lradc)
772{
773 switch (lradc->cur_plate) {
774 case LRADC_TOUCH:
775 if (mxs_lradc_check_touch_event(lradc))
776 mxs_lradc_start_touch_event(lradc);
777 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ,
778 LRADC_CTRL1);
779 return;
780
781 case LRADC_SAMPLE_Y:
782 lradc->ts_y_pos = mxs_lradc_read_raw_channel(lradc,
783 TOUCHSCREEN_VCHANNEL1);
784 mxs_lradc_prepare_x_pos(lradc);
785 return;
786
787 case LRADC_SAMPLE_X:
788 lradc->ts_x_pos = mxs_lradc_read_raw_channel(lradc,
789 TOUCHSCREEN_VCHANNEL1);
790 mxs_lradc_prepare_pressure(lradc);
791 return;
792
793 case LRADC_SAMPLE_PRESSURE:
794 lradc->ts_pressure = mxs_lradc_read_ts_pressure(lradc,
795 TOUCHSCREEN_VCHANNEL2,
796 TOUCHSCREEN_VCHANNEL1);
797 mxs_lradc_complete_touch_event(lradc);
798 return;
799
800 case LRADC_SAMPLE_VALID:
801 mxs_lradc_finish_touch_event(lradc, 1);
802 break;
803 }
804}
805
806
807
808
809static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val)
810{
811 struct mxs_lradc *lradc = iio_priv(iio_dev);
812 int ret;
813
814
815
816
817
818
819
820 ret = mutex_trylock(&lradc->lock);
821 if (!ret)
822 return -EBUSY;
823
824 reinit_completion(&lradc->completion);
825
826
827
828
829
830
831 if (lradc->soc == IMX28_LRADC)
832 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0),
833 LRADC_CTRL1);
834 mxs_lradc_reg_clear(lradc, 0x1, LRADC_CTRL0);
835
836
837 if (test_bit(chan, &lradc->is_divided))
838 mxs_lradc_reg_set(lradc, 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
839 LRADC_CTRL2);
840 else
841 mxs_lradc_reg_clear(lradc,
842 1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET, LRADC_CTRL2);
843
844
845 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(0),
846 LRADC_CTRL4);
847 mxs_lradc_reg_set(lradc, chan, LRADC_CTRL4);
848
849 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(0));
850
851
852 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
853 mxs_lradc_reg_set(lradc, BIT(0), LRADC_CTRL0);
854
855
856 ret = wait_for_completion_killable_timeout(&lradc->completion, HZ);
857 if (!ret)
858 ret = -ETIMEDOUT;
859 if (ret < 0)
860 goto err;
861
862
863 *val = readl(lradc->base + LRADC_CH(0)) & LRADC_CH_VALUE_MASK;
864 ret = IIO_VAL_INT;
865
866err:
867 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0), LRADC_CTRL1);
868
869 mutex_unlock(&lradc->lock);
870
871 return ret;
872}
873
874static int mxs_lradc_read_temp(struct iio_dev *iio_dev, int *val)
875{
876 int ret, min, max;
877
878 ret = mxs_lradc_read_single(iio_dev, 8, &min);
879 if (ret != IIO_VAL_INT)
880 return ret;
881
882 ret = mxs_lradc_read_single(iio_dev, 9, &max);
883 if (ret != IIO_VAL_INT)
884 return ret;
885
886 *val = max - min;
887
888 return IIO_VAL_INT;
889}
890
891static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
892 const struct iio_chan_spec *chan,
893 int *val, int *val2, long m)
894{
895 struct mxs_lradc *lradc = iio_priv(iio_dev);
896
897 switch (m) {
898 case IIO_CHAN_INFO_RAW:
899 if (chan->type == IIO_TEMP)
900 return mxs_lradc_read_temp(iio_dev, val);
901
902 return mxs_lradc_read_single(iio_dev, chan->channel, val);
903
904 case IIO_CHAN_INFO_SCALE:
905 if (chan->type == IIO_TEMP) {
906
907
908
909 *val = 0;
910 *val2 = 253000;
911 return IIO_VAL_INT_PLUS_MICRO;
912 }
913
914 *val = lradc->vref_mv[chan->channel];
915 *val2 = chan->scan_type.realbits -
916 test_bit(chan->channel, &lradc->is_divided);
917 return IIO_VAL_FRACTIONAL_LOG2;
918
919 case IIO_CHAN_INFO_OFFSET:
920 if (chan->type == IIO_TEMP) {
921
922
923
924
925 *val = -1075;
926 *val2 = 691699;
927
928 return IIO_VAL_INT_PLUS_MICRO;
929 }
930
931 return -EINVAL;
932
933 default:
934 break;
935 }
936
937 return -EINVAL;
938}
939
940static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
941 const struct iio_chan_spec *chan,
942 int val, int val2, long m)
943{
944 struct mxs_lradc *lradc = iio_priv(iio_dev);
945 struct mxs_lradc_scale *scale_avail =
946 lradc->scale_avail[chan->channel];
947 int ret;
948
949 ret = mutex_trylock(&lradc->lock);
950 if (!ret)
951 return -EBUSY;
952
953 switch (m) {
954 case IIO_CHAN_INFO_SCALE:
955 ret = -EINVAL;
956 if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&
957 val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
958
959 clear_bit(chan->channel, &lradc->is_divided);
960 ret = 0;
961 } else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
962 val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
963
964 set_bit(chan->channel, &lradc->is_divided);
965 ret = 0;
966 }
967
968 break;
969 default:
970 ret = -EINVAL;
971 break;
972 }
973
974 mutex_unlock(&lradc->lock);
975
976 return ret;
977}
978
979static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
980 const struct iio_chan_spec *chan,
981 long m)
982{
983 return IIO_VAL_INT_PLUS_NANO;
984}
985
986static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
987 struct device_attribute *attr,
988 char *buf,
989 int ch)
990{
991 struct iio_dev *iio = dev_to_iio_dev(dev);
992 struct mxs_lradc *lradc = iio_priv(iio);
993 int i, len = 0;
994
995 for (i = 0; i < ARRAY_SIZE(lradc->scale_avail[ch]); i++)
996 len += sprintf(buf + len, "%u.%09u ",
997 lradc->scale_avail[ch][i].integer,
998 lradc->scale_avail[ch][i].nano);
999
1000 len += sprintf(buf + len, "\n");
1001
1002 return len;
1003}
1004
1005static ssize_t mxs_lradc_show_scale_available(struct device *dev,
1006 struct device_attribute *attr,
1007 char *buf)
1008{
1009 struct iio_dev_attr *iio_attr = to_iio_dev_attr(attr);
1010
1011 return mxs_lradc_show_scale_available_ch(dev, attr, buf,
1012 iio_attr->address);
1013}
1014
1015#define SHOW_SCALE_AVAILABLE_ATTR(ch) \
1016static IIO_DEVICE_ATTR(in_voltage##ch##_scale_available, S_IRUGO, \
1017 mxs_lradc_show_scale_available, NULL, ch)
1018
1019SHOW_SCALE_AVAILABLE_ATTR(0);
1020SHOW_SCALE_AVAILABLE_ATTR(1);
1021SHOW_SCALE_AVAILABLE_ATTR(2);
1022SHOW_SCALE_AVAILABLE_ATTR(3);
1023SHOW_SCALE_AVAILABLE_ATTR(4);
1024SHOW_SCALE_AVAILABLE_ATTR(5);
1025SHOW_SCALE_AVAILABLE_ATTR(6);
1026SHOW_SCALE_AVAILABLE_ATTR(7);
1027SHOW_SCALE_AVAILABLE_ATTR(10);
1028SHOW_SCALE_AVAILABLE_ATTR(11);
1029SHOW_SCALE_AVAILABLE_ATTR(12);
1030SHOW_SCALE_AVAILABLE_ATTR(13);
1031SHOW_SCALE_AVAILABLE_ATTR(14);
1032SHOW_SCALE_AVAILABLE_ATTR(15);
1033
1034static struct attribute *mxs_lradc_attributes[] = {
1035 &iio_dev_attr_in_voltage0_scale_available.dev_attr.attr,
1036 &iio_dev_attr_in_voltage1_scale_available.dev_attr.attr,
1037 &iio_dev_attr_in_voltage2_scale_available.dev_attr.attr,
1038 &iio_dev_attr_in_voltage3_scale_available.dev_attr.attr,
1039 &iio_dev_attr_in_voltage4_scale_available.dev_attr.attr,
1040 &iio_dev_attr_in_voltage5_scale_available.dev_attr.attr,
1041 &iio_dev_attr_in_voltage6_scale_available.dev_attr.attr,
1042 &iio_dev_attr_in_voltage7_scale_available.dev_attr.attr,
1043 &iio_dev_attr_in_voltage10_scale_available.dev_attr.attr,
1044 &iio_dev_attr_in_voltage11_scale_available.dev_attr.attr,
1045 &iio_dev_attr_in_voltage12_scale_available.dev_attr.attr,
1046 &iio_dev_attr_in_voltage13_scale_available.dev_attr.attr,
1047 &iio_dev_attr_in_voltage14_scale_available.dev_attr.attr,
1048 &iio_dev_attr_in_voltage15_scale_available.dev_attr.attr,
1049 NULL
1050};
1051
1052static const struct attribute_group mxs_lradc_attribute_group = {
1053 .attrs = mxs_lradc_attributes,
1054};
1055
1056static const struct iio_info mxs_lradc_iio_info = {
1057 .driver_module = THIS_MODULE,
1058 .read_raw = mxs_lradc_read_raw,
1059 .write_raw = mxs_lradc_write_raw,
1060 .write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,
1061 .attrs = &mxs_lradc_attribute_group,
1062};
1063
1064static int mxs_lradc_ts_open(struct input_dev *dev)
1065{
1066 struct mxs_lradc *lradc = input_get_drvdata(dev);
1067
1068
1069 mxs_lradc_enable_touch_detection(lradc);
1070
1071 return 0;
1072}
1073
1074static void mxs_lradc_disable_ts(struct mxs_lradc *lradc)
1075{
1076
1077 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
1078 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
1079 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
1080
1081
1082 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
1083}
1084
1085static void mxs_lradc_ts_close(struct input_dev *dev)
1086{
1087 struct mxs_lradc *lradc = input_get_drvdata(dev);
1088
1089 mxs_lradc_disable_ts(lradc);
1090}
1091
1092static int mxs_lradc_ts_register(struct mxs_lradc *lradc)
1093{
1094 struct input_dev *input;
1095 struct device *dev = lradc->dev;
1096 int ret;
1097
1098 if (!lradc->use_touchscreen)
1099 return 0;
1100
1101 input = input_allocate_device();
1102 if (!input)
1103 return -ENOMEM;
1104
1105 input->name = DRIVER_NAME;
1106 input->id.bustype = BUS_HOST;
1107 input->dev.parent = dev;
1108 input->open = mxs_lradc_ts_open;
1109 input->close = mxs_lradc_ts_close;
1110
1111 __set_bit(EV_ABS, input->evbit);
1112 __set_bit(EV_KEY, input->evbit);
1113 __set_bit(BTN_TOUCH, input->keybit);
1114 input_set_abs_params(input, ABS_X, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
1115 input_set_abs_params(input, ABS_Y, 0, LRADC_SINGLE_SAMPLE_MASK, 0, 0);
1116 input_set_abs_params(input, ABS_PRESSURE, 0, LRADC_SINGLE_SAMPLE_MASK,
1117 0, 0);
1118
1119 lradc->ts_input = input;
1120 input_set_drvdata(input, lradc);
1121 ret = input_register_device(input);
1122 if (ret)
1123 input_free_device(lradc->ts_input);
1124
1125 return ret;
1126}
1127
1128static void mxs_lradc_ts_unregister(struct mxs_lradc *lradc)
1129{
1130 if (!lradc->use_touchscreen)
1131 return;
1132
1133 mxs_lradc_disable_ts(lradc);
1134 input_unregister_device(lradc->ts_input);
1135}
1136
1137
1138
1139
1140static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
1141{
1142 struct iio_dev *iio = data;
1143 struct mxs_lradc *lradc = iio_priv(iio);
1144 unsigned long reg = readl(lradc->base + LRADC_CTRL1);
1145 uint32_t clr_irq = mxs_lradc_irq_mask(lradc);
1146 const uint32_t ts_irq_mask =
1147 LRADC_CTRL1_TOUCH_DETECT_IRQ |
1148 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
1149 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2);
1150
1151 if (!(reg & mxs_lradc_irq_mask(lradc)))
1152 return IRQ_NONE;
1153
1154 if (lradc->use_touchscreen && (reg & ts_irq_mask)) {
1155 mxs_lradc_handle_touch(lradc);
1156
1157
1158 clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
1159 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2));
1160 }
1161
1162 if (iio_buffer_enabled(iio)) {
1163 if (reg & lradc->buffer_vchans)
1164 iio_trigger_poll(iio->trig);
1165 } else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) {
1166 complete(&lradc->completion);
1167 }
1168
1169 mxs_lradc_reg_clear(lradc, reg & clr_irq, LRADC_CTRL1);
1170
1171 return IRQ_HANDLED;
1172}
1173
1174
1175
1176
1177static irqreturn_t mxs_lradc_trigger_handler(int irq, void *p)
1178{
1179 struct iio_poll_func *pf = p;
1180 struct iio_dev *iio = pf->indio_dev;
1181 struct mxs_lradc *lradc = iio_priv(iio);
1182 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
1183 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
1184 unsigned int i, j = 0;
1185
1186 for_each_set_bit(i, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
1187 lradc->buffer[j] = readl(lradc->base + LRADC_CH(j));
1188 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(j));
1189 lradc->buffer[j] &= LRADC_CH_VALUE_MASK;
1190 lradc->buffer[j] /= LRADC_DELAY_TIMER_LOOP;
1191 j++;
1192 }
1193
1194 iio_push_to_buffers_with_timestamp(iio, lradc->buffer, pf->timestamp);
1195
1196 iio_trigger_notify_done(iio->trig);
1197
1198 return IRQ_HANDLED;
1199}
1200
1201static int mxs_lradc_configure_trigger(struct iio_trigger *trig, bool state)
1202{
1203 struct iio_dev *iio = iio_trigger_get_drvdata(trig);
1204 struct mxs_lradc *lradc = iio_priv(iio);
1205 const uint32_t st = state ? STMP_OFFSET_REG_SET : STMP_OFFSET_REG_CLR;
1206
1207 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_KICK, LRADC_DELAY(0) + st);
1208
1209 return 0;
1210}
1211
1212static const struct iio_trigger_ops mxs_lradc_trigger_ops = {
1213 .owner = THIS_MODULE,
1214 .set_trigger_state = &mxs_lradc_configure_trigger,
1215};
1216
1217static int mxs_lradc_trigger_init(struct iio_dev *iio)
1218{
1219 int ret;
1220 struct iio_trigger *trig;
1221 struct mxs_lradc *lradc = iio_priv(iio);
1222
1223 trig = iio_trigger_alloc("%s-dev%i", iio->name, iio->id);
1224 if (trig == NULL)
1225 return -ENOMEM;
1226
1227 trig->dev.parent = lradc->dev;
1228 iio_trigger_set_drvdata(trig, iio);
1229 trig->ops = &mxs_lradc_trigger_ops;
1230
1231 ret = iio_trigger_register(trig);
1232 if (ret) {
1233 iio_trigger_free(trig);
1234 return ret;
1235 }
1236
1237 lradc->trig = trig;
1238
1239 return 0;
1240}
1241
1242static void mxs_lradc_trigger_remove(struct iio_dev *iio)
1243{
1244 struct mxs_lradc *lradc = iio_priv(iio);
1245
1246 iio_trigger_unregister(lradc->trig);
1247 iio_trigger_free(lradc->trig);
1248}
1249
1250static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
1251{
1252 struct mxs_lradc *lradc = iio_priv(iio);
1253 int ret = 0, chan, ofs = 0;
1254 unsigned long enable = 0;
1255 uint32_t ctrl4_set = 0;
1256 uint32_t ctrl4_clr = 0;
1257 uint32_t ctrl1_irq = 0;
1258 const uint32_t chan_value = LRADC_CH_ACCUMULATE |
1259 ((LRADC_DELAY_TIMER_LOOP - 1) << LRADC_CH_NUM_SAMPLES_OFFSET);
1260 const int len = bitmap_weight(iio->active_scan_mask,
1261 LRADC_MAX_TOTAL_CHANS);
1262
1263 if (!len)
1264 return -EINVAL;
1265
1266
1267
1268
1269
1270 ret = mutex_trylock(&lradc->lock);
1271 if (!ret)
1272 return -EBUSY;
1273
1274 lradc->buffer = kmalloc_array(len, sizeof(*lradc->buffer), GFP_KERNEL);
1275 if (!lradc->buffer) {
1276 ret = -ENOMEM;
1277 goto err_mem;
1278 }
1279
1280 if (lradc->soc == IMX28_LRADC)
1281 mxs_lradc_reg_clear(lradc,
1282 lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
1283 LRADC_CTRL1);
1284 mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);
1285
1286 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
1287 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
1288 ctrl4_clr |= LRADC_CTRL4_LRADCSELECT_MASK(ofs);
1289 ctrl1_irq |= LRADC_CTRL1_LRADC_IRQ_EN(ofs);
1290 mxs_lradc_reg_wrt(lradc, chan_value, LRADC_CH(ofs));
1291 bitmap_set(&enable, ofs, 1);
1292 ofs++;
1293 }
1294
1295 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1296 LRADC_DELAY_KICK, LRADC_DELAY(0));
1297 mxs_lradc_reg_clear(lradc, ctrl4_clr, LRADC_CTRL4);
1298 mxs_lradc_reg_set(lradc, ctrl4_set, LRADC_CTRL4);
1299 mxs_lradc_reg_set(lradc, ctrl1_irq, LRADC_CTRL1);
1300 mxs_lradc_reg_set(lradc, enable << LRADC_DELAY_TRIGGER_LRADCS_OFFSET,
1301 LRADC_DELAY(0));
1302
1303 return 0;
1304
1305err_mem:
1306 mutex_unlock(&lradc->lock);
1307 return ret;
1308}
1309
1310static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
1311{
1312 struct mxs_lradc *lradc = iio_priv(iio);
1313
1314 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1315 LRADC_DELAY_KICK, LRADC_DELAY(0));
1316
1317 mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);
1318 if (lradc->soc == IMX28_LRADC)
1319 mxs_lradc_reg_clear(lradc,
1320 lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
1321 LRADC_CTRL1);
1322
1323 kfree(lradc->buffer);
1324 mutex_unlock(&lradc->lock);
1325
1326 return 0;
1327}
1328
1329static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
1330 const unsigned long *mask)
1331{
1332 struct mxs_lradc *lradc = iio_priv(iio);
1333 const int map_chans = bitmap_weight(mask, LRADC_MAX_TOTAL_CHANS);
1334 int rsvd_chans = 0;
1335 unsigned long rsvd_mask = 0;
1336
1337 if (lradc->use_touchbutton)
1338 rsvd_mask |= CHAN_MASK_TOUCHBUTTON;
1339 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_4WIRE)
1340 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_4WIRE;
1341 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
1342 rsvd_mask |= CHAN_MASK_TOUCHSCREEN_5WIRE;
1343
1344 if (lradc->use_touchbutton)
1345 rsvd_chans++;
1346 if (lradc->use_touchscreen)
1347 rsvd_chans += 2;
1348
1349
1350 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))
1351 return false;
1352
1353
1354 if (map_chans + rsvd_chans > LRADC_MAX_MAPPED_CHANS)
1355 return false;
1356
1357 return true;
1358}
1359
1360static const struct iio_buffer_setup_ops mxs_lradc_buffer_ops = {
1361 .preenable = &mxs_lradc_buffer_preenable,
1362 .postenable = &iio_triggered_buffer_postenable,
1363 .predisable = &iio_triggered_buffer_predisable,
1364 .postdisable = &mxs_lradc_buffer_postdisable,
1365 .validate_scan_mask = &mxs_lradc_validate_scan_mask,
1366};
1367
1368
1369
1370
1371
1372#define MXS_ADC_CHAN(idx, chan_type) { \
1373 .type = (chan_type), \
1374 .indexed = 1, \
1375 .scan_index = (idx), \
1376 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
1377 BIT(IIO_CHAN_INFO_SCALE), \
1378 .channel = (idx), \
1379 .address = (idx), \
1380 .scan_type = { \
1381 .sign = 'u', \
1382 .realbits = LRADC_RESOLUTION, \
1383 .storagebits = 32, \
1384 }, \
1385}
1386
1387static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
1388 MXS_ADC_CHAN(0, IIO_VOLTAGE),
1389 MXS_ADC_CHAN(1, IIO_VOLTAGE),
1390 MXS_ADC_CHAN(2, IIO_VOLTAGE),
1391 MXS_ADC_CHAN(3, IIO_VOLTAGE),
1392 MXS_ADC_CHAN(4, IIO_VOLTAGE),
1393 MXS_ADC_CHAN(5, IIO_VOLTAGE),
1394 MXS_ADC_CHAN(6, IIO_VOLTAGE),
1395 MXS_ADC_CHAN(7, IIO_VOLTAGE),
1396
1397 {
1398 .type = IIO_TEMP,
1399 .indexed = 1,
1400 .scan_index = 8,
1401 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
1402 BIT(IIO_CHAN_INFO_OFFSET) |
1403 BIT(IIO_CHAN_INFO_SCALE),
1404 .channel = 8,
1405 .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},
1406 },
1407
1408 {
1409 .type = IIO_TEMP,
1410 .indexed = 1,
1411 .scan_index = -1,
1412 .channel = 9,
1413 },
1414 MXS_ADC_CHAN(10, IIO_VOLTAGE),
1415 MXS_ADC_CHAN(11, IIO_VOLTAGE),
1416 MXS_ADC_CHAN(12, IIO_VOLTAGE),
1417 MXS_ADC_CHAN(13, IIO_VOLTAGE),
1418 MXS_ADC_CHAN(14, IIO_VOLTAGE),
1419 MXS_ADC_CHAN(15, IIO_VOLTAGE),
1420};
1421
1422static int mxs_lradc_hw_init(struct mxs_lradc *lradc)
1423{
1424
1425 const uint32_t adc_cfg =
1426 (1 << (LRADC_DELAY_TRIGGER_DELAYS_OFFSET + 0)) |
1427 (LRADC_DELAY_TIMER_PER << LRADC_DELAY_DELAY_OFFSET);
1428
1429 int ret = stmp_reset_block(lradc->base);
1430
1431 if (ret)
1432 return ret;
1433
1434
1435 mxs_lradc_reg_wrt(lradc, adc_cfg, LRADC_DELAY(0));
1436
1437
1438 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(1));
1439 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
1440 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
1441
1442
1443 if (lradc->soc == IMX28_LRADC) {
1444 mxs_lradc_reg_clear(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
1445 LRADC_CTRL0);
1446
1447 if (lradc->use_touchscreen == MXS_LRADC_TOUCHSCREEN_5WIRE)
1448 mxs_lradc_reg_set(lradc, LRADC_CTRL0_MX28_TOUCH_SCREEN_TYPE,
1449 LRADC_CTRL0);
1450 }
1451
1452
1453 mxs_lradc_reg_wrt(lradc, 0, LRADC_CTRL2);
1454
1455 return 0;
1456}
1457
1458static void mxs_lradc_hw_stop(struct mxs_lradc *lradc)
1459{
1460 int i;
1461
1462 mxs_lradc_reg_clear(lradc, mxs_lradc_irq_en_mask(lradc), LRADC_CTRL1);
1463
1464 for (i = 0; i < LRADC_MAX_DELAY_CHANS; i++)
1465 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(i));
1466}
1467
1468static const struct of_device_id mxs_lradc_dt_ids[] = {
1469 { .compatible = "fsl,imx23-lradc", .data = (void *)IMX23_LRADC, },
1470 { .compatible = "fsl,imx28-lradc", .data = (void *)IMX28_LRADC, },
1471 { }
1472};
1473MODULE_DEVICE_TABLE(of, mxs_lradc_dt_ids);
1474
1475static int mxs_lradc_probe_touchscreen(struct mxs_lradc *lradc,
1476 struct device_node *lradc_node)
1477{
1478 int ret;
1479 u32 ts_wires = 0, adapt;
1480
1481 ret = of_property_read_u32(lradc_node, "fsl,lradc-touchscreen-wires",
1482 &ts_wires);
1483 if (ret)
1484 return -ENODEV;
1485
1486 switch (ts_wires) {
1487 case 4:
1488 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_4WIRE;
1489 break;
1490 case 5:
1491 if (lradc->soc == IMX28_LRADC) {
1492 lradc->use_touchscreen = MXS_LRADC_TOUCHSCREEN_5WIRE;
1493 break;
1494 }
1495
1496 default:
1497 dev_err(lradc->dev,
1498 "Unsupported number of touchscreen wires (%d)\n",
1499 ts_wires);
1500 return -EINVAL;
1501 }
1502
1503 if (of_property_read_u32(lradc_node, "fsl,ave-ctrl", &adapt)) {
1504 lradc->over_sample_cnt = 4;
1505 } else {
1506 if (adapt < 1 || adapt > 32) {
1507 dev_err(lradc->dev, "Invalid sample count (%u)\n",
1508 adapt);
1509 return -EINVAL;
1510 }
1511 lradc->over_sample_cnt = adapt;
1512 }
1513
1514 if (of_property_read_u32(lradc_node, "fsl,ave-delay", &adapt)) {
1515 lradc->over_sample_delay = 2;
1516 } else {
1517 if (adapt < 2 || adapt > LRADC_DELAY_DELAY_MASK + 1) {
1518 dev_err(lradc->dev, "Invalid sample delay (%u)\n",
1519 adapt);
1520 return -EINVAL;
1521 }
1522 lradc->over_sample_delay = adapt;
1523 }
1524
1525 if (of_property_read_u32(lradc_node, "fsl,settling", &adapt)) {
1526 lradc->settling_delay = 10;
1527 } else {
1528 if (adapt < 1 || adapt > LRADC_DELAY_DELAY_MASK) {
1529 dev_err(lradc->dev, "Invalid settling delay (%u)\n",
1530 adapt);
1531 return -EINVAL;
1532 }
1533 lradc->settling_delay = adapt;
1534 }
1535
1536 return 0;
1537}
1538
1539static int mxs_lradc_probe(struct platform_device *pdev)
1540{
1541 const struct of_device_id *of_id =
1542 of_match_device(mxs_lradc_dt_ids, &pdev->dev);
1543 const struct mxs_lradc_of_config *of_cfg =
1544 &mxs_lradc_of_config[(enum mxs_lradc_id)of_id->data];
1545 struct device *dev = &pdev->dev;
1546 struct device_node *node = dev->of_node;
1547 struct mxs_lradc *lradc;
1548 struct iio_dev *iio;
1549 struct resource *iores;
1550 int ret = 0, touch_ret;
1551 int i, s;
1552 uint64_t scale_uv;
1553
1554
1555 iio = devm_iio_device_alloc(dev, sizeof(*lradc));
1556 if (!iio) {
1557 dev_err(dev, "Failed to allocate IIO device\n");
1558 return -ENOMEM;
1559 }
1560
1561 lradc = iio_priv(iio);
1562 lradc->soc = (enum mxs_lradc_id)of_id->data;
1563
1564
1565 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1566 lradc->dev = &pdev->dev;
1567 lradc->base = devm_ioremap_resource(dev, iores);
1568 if (IS_ERR(lradc->base))
1569 return PTR_ERR(lradc->base);
1570
1571 lradc->clk = devm_clk_get(&pdev->dev, NULL);
1572 if (IS_ERR(lradc->clk)) {
1573 dev_err(dev, "Failed to get the delay unit clock\n");
1574 return PTR_ERR(lradc->clk);
1575 }
1576 ret = clk_prepare_enable(lradc->clk);
1577 if (ret != 0) {
1578 dev_err(dev, "Failed to enable the delay unit clock\n");
1579 return ret;
1580 }
1581
1582 touch_ret = mxs_lradc_probe_touchscreen(lradc, node);
1583
1584 if (touch_ret == 0)
1585 lradc->buffer_vchans = BUFFER_VCHANS_LIMITED;
1586 else
1587 lradc->buffer_vchans = BUFFER_VCHANS_ALL;
1588
1589
1590 for (i = 0; i < of_cfg->irq_count; i++) {
1591 lradc->irq[i] = platform_get_irq(pdev, i);
1592 if (lradc->irq[i] < 0) {
1593 ret = lradc->irq[i];
1594 goto err_clk;
1595 }
1596
1597 ret = devm_request_irq(dev, lradc->irq[i],
1598 mxs_lradc_handle_irq, 0,
1599 of_cfg->irq_name[i], iio);
1600 if (ret)
1601 goto err_clk;
1602 }
1603
1604 lradc->vref_mv = of_cfg->vref_mv;
1605
1606 platform_set_drvdata(pdev, iio);
1607
1608 init_completion(&lradc->completion);
1609 mutex_init(&lradc->lock);
1610
1611 iio->name = pdev->name;
1612 iio->dev.parent = &pdev->dev;
1613 iio->info = &mxs_lradc_iio_info;
1614 iio->modes = INDIO_DIRECT_MODE;
1615 iio->channels = mxs_lradc_chan_spec;
1616 iio->num_channels = ARRAY_SIZE(mxs_lradc_chan_spec);
1617 iio->masklength = LRADC_MAX_TOTAL_CHANS;
1618
1619 ret = iio_triggered_buffer_setup(iio, &iio_pollfunc_store_time,
1620 &mxs_lradc_trigger_handler,
1621 &mxs_lradc_buffer_ops);
1622 if (ret)
1623 goto err_clk;
1624
1625 ret = mxs_lradc_trigger_init(iio);
1626 if (ret)
1627 goto err_trig;
1628
1629
1630 for (i = 0; i < LRADC_MAX_TOTAL_CHANS; i++) {
1631 for (s = 0; s < ARRAY_SIZE(lradc->scale_avail[i]); s++) {
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641 scale_uv = ((u64)lradc->vref_mv[i] * 100000000) >>
1642 (LRADC_RESOLUTION - s);
1643 lradc->scale_avail[i][s].nano =
1644 do_div(scale_uv, 100000000) * 10;
1645 lradc->scale_avail[i][s].integer = scale_uv;
1646 }
1647 }
1648
1649
1650 ret = mxs_lradc_hw_init(lradc);
1651 if (ret)
1652 goto err_dev;
1653
1654
1655 if (touch_ret == 0) {
1656 ret = mxs_lradc_ts_register(lradc);
1657 if (ret)
1658 goto err_ts_register;
1659 }
1660
1661
1662 ret = iio_device_register(iio);
1663 if (ret) {
1664 dev_err(dev, "Failed to register IIO device\n");
1665 goto err_ts;
1666 }
1667
1668 return 0;
1669
1670err_ts:
1671 mxs_lradc_ts_unregister(lradc);
1672err_ts_register:
1673 mxs_lradc_hw_stop(lradc);
1674err_dev:
1675 mxs_lradc_trigger_remove(iio);
1676err_trig:
1677 iio_triggered_buffer_cleanup(iio);
1678err_clk:
1679 clk_disable_unprepare(lradc->clk);
1680 return ret;
1681}
1682
1683static int mxs_lradc_remove(struct platform_device *pdev)
1684{
1685 struct iio_dev *iio = platform_get_drvdata(pdev);
1686 struct mxs_lradc *lradc = iio_priv(iio);
1687
1688 iio_device_unregister(iio);
1689 mxs_lradc_ts_unregister(lradc);
1690 mxs_lradc_hw_stop(lradc);
1691 mxs_lradc_trigger_remove(iio);
1692 iio_triggered_buffer_cleanup(iio);
1693
1694 clk_disable_unprepare(lradc->clk);
1695 return 0;
1696}
1697
1698static struct platform_driver mxs_lradc_driver = {
1699 .driver = {
1700 .name = DRIVER_NAME,
1701 .of_match_table = mxs_lradc_dt_ids,
1702 },
1703 .probe = mxs_lradc_probe,
1704 .remove = mxs_lradc_remove,
1705};
1706
1707module_platform_driver(mxs_lradc_driver);
1708
1709MODULE_AUTHOR("Marek Vasut <marex@denx.de>");
1710MODULE_DESCRIPTION("Freescale i.MX28 LRADC driver");
1711MODULE_LICENSE("GPL v2");
1712MODULE_ALIAS("platform:" DRIVER_NAME);
1713