linux/drivers/tty/serial/bfin_uart.c
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   1/*
   2 * Blackfin On-Chip Serial Driver
   3 *
   4 * Copyright 2006-2011 Analog Devices Inc.
   5 *
   6 * Enter bugs at http://blackfin.uclinux.org/
   7 *
   8 * Licensed under the GPL-2 or later.
   9 */
  10
  11#if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  12#define SUPPORT_SYSRQ
  13#endif
  14
  15#define DRIVER_NAME "bfin-uart"
  16#define pr_fmt(fmt) DRIVER_NAME ": " fmt
  17
  18#include <linux/module.h>
  19#include <linux/ioport.h>
  20#include <linux/gfp.h>
  21#include <linux/io.h>
  22#include <linux/init.h>
  23#include <linux/console.h>
  24#include <linux/sysrq.h>
  25#include <linux/platform_device.h>
  26#include <linux/tty.h>
  27#include <linux/tty_flip.h>
  28#include <linux/serial_core.h>
  29#include <linux/gpio.h>
  30#include <linux/irq.h>
  31#include <linux/kgdb.h>
  32#include <linux/slab.h>
  33#include <linux/dma-mapping.h>
  34
  35#include <asm/portmux.h>
  36#include <asm/cacheflush.h>
  37#include <asm/dma.h>
  38#include <asm/bfin_serial.h>
  39
  40#ifdef CONFIG_SERIAL_BFIN_MODULE
  41# undef CONFIG_EARLY_PRINTK
  42#endif
  43
  44/* UART name and device definitions */
  45#define BFIN_SERIAL_DEV_NAME    "ttyBF"
  46#define BFIN_SERIAL_MAJOR       204
  47#define BFIN_SERIAL_MINOR       64
  48
  49static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
  50
  51#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
  52        defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
  53
  54# ifndef CONFIG_SERIAL_BFIN_PIO
  55#  error KGDB only support UART in PIO mode.
  56# endif
  57
  58static int kgdboc_port_line;
  59static int kgdboc_break_enabled;
  60#endif
  61/*
  62 * Setup for console. Argument comes from the menuconfig
  63 */
  64#define DMA_RX_XCOUNT           512
  65#define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
  66
  67#define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
  68
  69#ifdef CONFIG_SERIAL_BFIN_DMA
  70static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  71#else
  72static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  73#endif
  74
  75static void bfin_serial_reset_irda(struct uart_port *port);
  76
  77#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
  78        defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
  79static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  80{
  81        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  82        if (uart->cts_pin < 0)
  83                return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  84
  85        /* CTS PIN is negative assertive. */
  86        if (UART_GET_CTS(uart))
  87                return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  88        else
  89                return TIOCM_DSR | TIOCM_CAR;
  90}
  91
  92static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  93{
  94        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  95        if (uart->rts_pin < 0)
  96                return;
  97
  98        /* RTS PIN is negative assertive. */
  99        if (mctrl & TIOCM_RTS)
 100                UART_ENABLE_RTS(uart);
 101        else
 102                UART_DISABLE_RTS(uart);
 103}
 104
 105/*
 106 * Handle any change of modem status signal.
 107 */
 108static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
 109{
 110        struct bfin_serial_port *uart = dev_id;
 111        struct uart_port *uport = &uart->port;
 112        unsigned int status = bfin_serial_get_mctrl(uport);
 113#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 114
 115        UART_CLEAR_SCTS(uart);
 116        if (uport->hw_stopped) {
 117                if (status) {
 118                        uport->hw_stopped = 0;
 119                        uart_write_wakeup(uport);
 120                }
 121        } else {
 122                if (!status)
 123                        uport->hw_stopped = 1;
 124        }
 125#else
 126        uart_handle_cts_change(uport, status & TIOCM_CTS);
 127#endif
 128
 129        return IRQ_HANDLED;
 130}
 131#else
 132static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 133{
 134        return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 135}
 136
 137static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 138{
 139}
 140#endif
 141
 142/*
 143 * interrupts are disabled on entry
 144 */
 145static void bfin_serial_stop_tx(struct uart_port *port)
 146{
 147        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 148#ifdef CONFIG_SERIAL_BFIN_DMA
 149        struct circ_buf *xmit = &uart->port.state->xmit;
 150#endif
 151
 152        while (!(UART_GET_LSR(uart) & TEMT))
 153                cpu_relax();
 154
 155#ifdef CONFIG_SERIAL_BFIN_DMA
 156        disable_dma(uart->tx_dma_channel);
 157        xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 158        uart->port.icount.tx += uart->tx_count;
 159        uart->tx_count = 0;
 160        uart->tx_done = 1;
 161#else
 162#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
 163        /* Clear TFI bit */
 164        UART_PUT_LSR(uart, TFI);
 165#endif
 166        UART_CLEAR_IER(uart, ETBEI);
 167#endif
 168}
 169
 170/*
 171 * port is locked and interrupts are disabled
 172 */
 173static void bfin_serial_start_tx(struct uart_port *port)
 174{
 175        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 176        struct tty_struct *tty = uart->port.state->port.tty;
 177
 178        /*
 179         * To avoid losting RX interrupt, we reset IR function
 180         * before sending data.
 181         */
 182        if (tty->termios.c_line == N_IRDA)
 183                bfin_serial_reset_irda(port);
 184
 185#ifdef CONFIG_SERIAL_BFIN_DMA
 186        if (uart->tx_done)
 187                bfin_serial_dma_tx_chars(uart);
 188#else
 189        UART_SET_IER(uart, ETBEI);
 190        bfin_serial_tx_chars(uart);
 191#endif
 192}
 193
 194/*
 195 * Interrupts are enabled
 196 */
 197static void bfin_serial_stop_rx(struct uart_port *port)
 198{
 199        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 200
 201        UART_CLEAR_IER(uart, ERBFI);
 202}
 203
 204#if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
 205# define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
 206# define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
 207#else
 208# define UART_GET_ANOMALY_THRESHOLD(uart)    0
 209# define UART_SET_ANOMALY_THRESHOLD(uart, v)
 210#endif
 211
 212#ifdef CONFIG_SERIAL_BFIN_PIO
 213static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
 214{
 215        unsigned int status, ch, flg;
 216        static struct timeval anomaly_start = { .tv_sec = 0 };
 217
 218        status = UART_GET_LSR(uart);
 219        UART_CLEAR_LSR(uart);
 220
 221        ch = UART_GET_CHAR(uart);
 222        uart->port.icount.rx++;
 223
 224#if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 225        defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 226        if (kgdb_connected && kgdboc_port_line == uart->port.line
 227                && kgdboc_break_enabled)
 228                if (ch == 0x3) {/* Ctrl + C */
 229                        kgdb_breakpoint();
 230                        return;
 231                }
 232
 233        if (!uart->port.state)
 234                return;
 235#endif
 236        if (ANOMALY_05000363) {
 237                /* The BF533 (and BF561) family of processors have a nice anomaly
 238                 * where they continuously generate characters for a "single" break.
 239                 * We have to basically ignore this flood until the "next" valid
 240                 * character comes across.  Due to the nature of the flood, it is
 241                 * not possible to reliably catch bytes that are sent too quickly
 242                 * after this break.  So application code talking to the Blackfin
 243                 * which sends a break signal must allow at least 1.5 character
 244                 * times after the end of the break for things to stabilize.  This
 245                 * timeout was picked as it must absolutely be larger than 1
 246                 * character time +/- some percent.  So 1.5 sounds good.  All other
 247                 * Blackfin families operate properly.  Woo.
 248                 */
 249                if (anomaly_start.tv_sec) {
 250                        struct timeval curr;
 251                        suseconds_t usecs;
 252
 253                        if ((~ch & (~ch + 1)) & 0xff)
 254                                goto known_good_char;
 255
 256                        do_gettimeofday(&curr);
 257                        if (curr.tv_sec - anomaly_start.tv_sec > 1)
 258                                goto known_good_char;
 259
 260                        usecs = 0;
 261                        if (curr.tv_sec != anomaly_start.tv_sec)
 262                                usecs += USEC_PER_SEC;
 263                        usecs += curr.tv_usec - anomaly_start.tv_usec;
 264
 265                        if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
 266                                goto known_good_char;
 267
 268                        if (ch)
 269                                anomaly_start.tv_sec = 0;
 270                        else
 271                                anomaly_start = curr;
 272
 273                        return;
 274
 275 known_good_char:
 276                        status &= ~BI;
 277                        anomaly_start.tv_sec = 0;
 278                }
 279        }
 280
 281        if (status & BI) {
 282                if (ANOMALY_05000363)
 283                        if (bfin_revid() < 5)
 284                                do_gettimeofday(&anomaly_start);
 285                uart->port.icount.brk++;
 286                if (uart_handle_break(&uart->port))
 287                        goto ignore_char;
 288                status &= ~(PE | FE);
 289        }
 290        if (status & PE)
 291                uart->port.icount.parity++;
 292        if (status & OE)
 293                uart->port.icount.overrun++;
 294        if (status & FE)
 295                uart->port.icount.frame++;
 296
 297        status &= uart->port.read_status_mask;
 298
 299        if (status & BI)
 300                flg = TTY_BREAK;
 301        else if (status & PE)
 302                flg = TTY_PARITY;
 303        else if (status & FE)
 304                flg = TTY_FRAME;
 305        else
 306                flg = TTY_NORMAL;
 307
 308        if (uart_handle_sysrq_char(&uart->port, ch))
 309                goto ignore_char;
 310
 311        uart_insert_char(&uart->port, status, OE, ch, flg);
 312
 313 ignore_char:
 314        tty_flip_buffer_push(&uart->port.state->port);
 315}
 316
 317static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
 318{
 319        struct circ_buf *xmit = &uart->port.state->xmit;
 320
 321        if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 322#if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
 323                /* Clear TFI bit */
 324                UART_PUT_LSR(uart, TFI);
 325#endif
 326                /* Anomaly notes:
 327                 *  05000215 -  we always clear ETBEI within last UART TX
 328                 *              interrupt to end a string. It is always set
 329                 *              when start a new tx.
 330                 */
 331                UART_CLEAR_IER(uart, ETBEI);
 332                return;
 333        }
 334
 335        if (uart->port.x_char) {
 336                UART_PUT_CHAR(uart, uart->port.x_char);
 337                uart->port.icount.tx++;
 338                uart->port.x_char = 0;
 339        }
 340
 341        while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
 342                UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
 343                xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 344                uart->port.icount.tx++;
 345        }
 346
 347        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 348                uart_write_wakeup(&uart->port);
 349}
 350
 351static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
 352{
 353        struct bfin_serial_port *uart = dev_id;
 354
 355        while (UART_GET_LSR(uart) & DR)
 356                bfin_serial_rx_chars(uart);
 357
 358        return IRQ_HANDLED;
 359}
 360
 361static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
 362{
 363        struct bfin_serial_port *uart = dev_id;
 364
 365        spin_lock(&uart->port.lock);
 366        if (UART_GET_LSR(uart) & THRE)
 367                bfin_serial_tx_chars(uart);
 368        spin_unlock(&uart->port.lock);
 369
 370        return IRQ_HANDLED;
 371}
 372#endif
 373
 374#ifdef CONFIG_SERIAL_BFIN_DMA
 375static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
 376{
 377        struct circ_buf *xmit = &uart->port.state->xmit;
 378
 379        uart->tx_done = 0;
 380
 381        if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
 382                uart->tx_count = 0;
 383                uart->tx_done = 1;
 384                return;
 385        }
 386
 387        if (uart->port.x_char) {
 388                UART_PUT_CHAR(uart, uart->port.x_char);
 389                uart->port.icount.tx++;
 390                uart->port.x_char = 0;
 391        }
 392
 393        uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
 394        if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
 395                uart->tx_count = UART_XMIT_SIZE - xmit->tail;
 396        blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
 397                                        (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
 398        set_dma_config(uart->tx_dma_channel,
 399                set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
 400                        INTR_ON_BUF,
 401                        DIMENSION_LINEAR,
 402                        DATA_SIZE_8,
 403                        DMA_SYNC_RESTART));
 404        set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
 405        set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
 406        set_dma_x_modify(uart->tx_dma_channel, 1);
 407        SSYNC();
 408        enable_dma(uart->tx_dma_channel);
 409
 410        UART_SET_IER(uart, ETBEI);
 411}
 412
 413static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
 414{
 415        int i, flg, status;
 416
 417        status = UART_GET_LSR(uart);
 418        UART_CLEAR_LSR(uart);
 419
 420        uart->port.icount.rx +=
 421                CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
 422                UART_XMIT_SIZE);
 423
 424        if (status & BI) {
 425                uart->port.icount.brk++;
 426                if (uart_handle_break(&uart->port))
 427                        goto dma_ignore_char;
 428                status &= ~(PE | FE);
 429        }
 430        if (status & PE)
 431                uart->port.icount.parity++;
 432        if (status & OE)
 433                uart->port.icount.overrun++;
 434        if (status & FE)
 435                uart->port.icount.frame++;
 436
 437        status &= uart->port.read_status_mask;
 438
 439        if (status & BI)
 440                flg = TTY_BREAK;
 441        else if (status & PE)
 442                flg = TTY_PARITY;
 443        else if (status & FE)
 444                flg = TTY_FRAME;
 445        else
 446                flg = TTY_NORMAL;
 447
 448        for (i = uart->rx_dma_buf.tail; ; i++) {
 449                if (i >= UART_XMIT_SIZE)
 450                        i = 0;
 451                if (i == uart->rx_dma_buf.head)
 452                        break;
 453                if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
 454                        uart_insert_char(&uart->port, status, OE,
 455                                uart->rx_dma_buf.buf[i], flg);
 456        }
 457
 458 dma_ignore_char:
 459        tty_flip_buffer_push(&uart->port.state->port);
 460}
 461
 462void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
 463{
 464        int x_pos, pos;
 465        unsigned long flags;
 466
 467        dma_disable_irq_nosync(uart->rx_dma_channel);
 468        spin_lock_irqsave(&uart->rx_lock, flags);
 469
 470        /* 2D DMA RX buffer ring is used. Because curr_y_count and
 471         * curr_x_count can't be read as an atomic operation,
 472         * curr_y_count should be read before curr_x_count. When
 473         * curr_x_count is read, curr_y_count may already indicate
 474         * next buffer line. But, the position calculated here is
 475         * still indicate the old line. The wrong position data may
 476         * be smaller than current buffer tail, which cause garbages
 477         * are received if it is not prohibit.
 478         */
 479        uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 480        x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 481        uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 482        if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 483                uart->rx_dma_nrows = 0;
 484        x_pos = DMA_RX_XCOUNT - x_pos;
 485        if (x_pos == DMA_RX_XCOUNT)
 486                x_pos = 0;
 487
 488        pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
 489        /* Ignore receiving data if new position is in the same line of
 490         * current buffer tail and small.
 491         */
 492        if (pos > uart->rx_dma_buf.tail ||
 493                uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 494                uart->rx_dma_buf.head = pos;
 495                bfin_serial_dma_rx_chars(uart);
 496                uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 497        }
 498
 499        spin_unlock_irqrestore(&uart->rx_lock, flags);
 500        dma_enable_irq(uart->rx_dma_channel);
 501
 502        mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
 503}
 504
 505static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
 506{
 507        struct bfin_serial_port *uart = dev_id;
 508        struct circ_buf *xmit = &uart->port.state->xmit;
 509
 510        spin_lock(&uart->port.lock);
 511        if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
 512                disable_dma(uart->tx_dma_channel);
 513                clear_dma_irqstat(uart->tx_dma_channel);
 514                /* Anomaly notes:
 515                 *  05000215 -  we always clear ETBEI within last UART TX
 516                 *              interrupt to end a string. It is always set
 517                 *              when start a new tx.
 518                 */
 519                UART_CLEAR_IER(uart, ETBEI);
 520                uart->port.icount.tx += uart->tx_count;
 521                if (!(xmit->tail == 0 && xmit->head == 0)) {
 522                        xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
 523
 524                        if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 525                                uart_write_wakeup(&uart->port);
 526                }
 527
 528                bfin_serial_dma_tx_chars(uart);
 529        }
 530
 531        spin_unlock(&uart->port.lock);
 532        return IRQ_HANDLED;
 533}
 534
 535static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
 536{
 537        struct bfin_serial_port *uart = dev_id;
 538        unsigned int irqstat;
 539        int x_pos, pos;
 540
 541        spin_lock(&uart->rx_lock);
 542        irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
 543        clear_dma_irqstat(uart->rx_dma_channel);
 544
 545        uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
 546        x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
 547        uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
 548        if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
 549                uart->rx_dma_nrows = 0;
 550
 551        pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
 552        if (pos > uart->rx_dma_buf.tail ||
 553                uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
 554                uart->rx_dma_buf.head = pos;
 555                bfin_serial_dma_rx_chars(uart);
 556                uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
 557        }
 558
 559        spin_unlock(&uart->rx_lock);
 560
 561        return IRQ_HANDLED;
 562}
 563#endif
 564
 565/*
 566 * Return TIOCSER_TEMT when transmitter is not busy.
 567 */
 568static unsigned int bfin_serial_tx_empty(struct uart_port *port)
 569{
 570        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 571        unsigned int lsr;
 572
 573        lsr = UART_GET_LSR(uart);
 574        if (lsr & TEMT)
 575                return TIOCSER_TEMT;
 576        else
 577                return 0;
 578}
 579
 580static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
 581{
 582        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 583        u32 lcr = UART_GET_LCR(uart);
 584        if (break_state)
 585                lcr |= SB;
 586        else
 587                lcr &= ~SB;
 588        UART_PUT_LCR(uart, lcr);
 589        SSYNC();
 590}
 591
 592static int bfin_serial_startup(struct uart_port *port)
 593{
 594        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 595
 596#ifdef CONFIG_SERIAL_BFIN_DMA
 597        dma_addr_t dma_handle;
 598
 599        if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
 600                printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
 601                return -EBUSY;
 602        }
 603
 604        if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
 605                printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
 606                free_dma(uart->rx_dma_channel);
 607                return -EBUSY;
 608        }
 609
 610        set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
 611        set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
 612
 613        uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
 614        uart->rx_dma_buf.head = 0;
 615        uart->rx_dma_buf.tail = 0;
 616        uart->rx_dma_nrows = 0;
 617
 618        set_dma_config(uart->rx_dma_channel,
 619                set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
 620                                INTR_ON_ROW, DIMENSION_2D,
 621                                DATA_SIZE_8,
 622                                DMA_SYNC_RESTART));
 623        set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
 624        set_dma_x_modify(uart->rx_dma_channel, 1);
 625        set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
 626        set_dma_y_modify(uart->rx_dma_channel, 1);
 627        set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
 628        enable_dma(uart->rx_dma_channel);
 629
 630        uart->rx_dma_timer.data = (unsigned long)(uart);
 631        uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
 632        uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
 633        add_timer(&(uart->rx_dma_timer));
 634#else
 635# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 636        defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 637        if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
 638                kgdboc_break_enabled = 0;
 639        else {
 640# endif
 641        if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
 642             "BFIN_UART_RX", uart)) {
 643                printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
 644                return -EBUSY;
 645        }
 646
 647        if (request_irq
 648            (uart->tx_irq, bfin_serial_tx_int, 0,
 649             "BFIN_UART_TX", uart)) {
 650                printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
 651                free_irq(uart->rx_irq, uart);
 652                return -EBUSY;
 653        }
 654
 655# ifdef CONFIG_BF54x
 656        {
 657                /*
 658                 * UART2 and UART3 on BF548 share interrupt PINs and DMA
 659                 * controllers with SPORT2 and SPORT3. UART rx and tx
 660                 * interrupts are generated in PIO mode only when configure
 661                 * their peripheral mapping registers properly, which means
 662                 * request corresponding DMA channels in PIO mode as well.
 663                 */
 664                unsigned uart_dma_ch_rx, uart_dma_ch_tx;
 665
 666                switch (uart->rx_irq) {
 667                case IRQ_UART3_RX:
 668                        uart_dma_ch_rx = CH_UART3_RX;
 669                        uart_dma_ch_tx = CH_UART3_TX;
 670                        break;
 671                case IRQ_UART2_RX:
 672                        uart_dma_ch_rx = CH_UART2_RX;
 673                        uart_dma_ch_tx = CH_UART2_TX;
 674                        break;
 675                default:
 676                        uart_dma_ch_rx = uart_dma_ch_tx = 0;
 677                        break;
 678                }
 679
 680                if (uart_dma_ch_rx &&
 681                        request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
 682                        printk(KERN_NOTICE"Fail to attach UART interrupt\n");
 683                        free_irq(uart->rx_irq, uart);
 684                        free_irq(uart->tx_irq, uart);
 685                        return -EBUSY;
 686                }
 687                if (uart_dma_ch_tx &&
 688                        request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
 689                        printk(KERN_NOTICE "Fail to attach UART interrupt\n");
 690                        free_dma(uart_dma_ch_rx);
 691                        free_irq(uart->rx_irq, uart);
 692                        free_irq(uart->tx_irq, uart);
 693                        return -EBUSY;
 694                }
 695        }
 696# endif
 697# if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 698        defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 699        }
 700# endif
 701#endif
 702
 703#ifdef CONFIG_SERIAL_BFIN_CTSRTS
 704        if (uart->cts_pin >= 0) {
 705                if (request_irq(gpio_to_irq(uart->cts_pin),
 706                        bfin_serial_mctrl_cts_int,
 707                        IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
 708                        0, "BFIN_UART_CTS", uart)) {
 709                        uart->cts_pin = -1;
 710                        pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
 711                }
 712        }
 713        if (uart->rts_pin >= 0) {
 714                if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
 715                        pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
 716                        uart->rts_pin = -1;
 717                } else
 718                        gpio_direction_output(uart->rts_pin, 0);
 719        }
 720#endif
 721#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 722        if (uart->cts_pin >= 0) {
 723                if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
 724                        0, "BFIN_UART_MODEM_STATUS", uart)) {
 725                        uart->cts_pin = -1;
 726                        dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
 727                }
 728
 729                /* CTS RTS PINs are negative assertive. */
 730                UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
 731                UART_SET_IER(uart, EDSSI);
 732        }
 733#endif
 734
 735        UART_SET_IER(uart, ERBFI);
 736        return 0;
 737}
 738
 739static void bfin_serial_shutdown(struct uart_port *port)
 740{
 741        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 742
 743#ifdef CONFIG_SERIAL_BFIN_DMA
 744        disable_dma(uart->tx_dma_channel);
 745        free_dma(uart->tx_dma_channel);
 746        disable_dma(uart->rx_dma_channel);
 747        free_dma(uart->rx_dma_channel);
 748        del_timer(&(uart->rx_dma_timer));
 749        dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
 750#else
 751#ifdef CONFIG_BF54x
 752        switch (uart->port.irq) {
 753        case IRQ_UART3_RX:
 754                free_dma(CH_UART3_RX);
 755                free_dma(CH_UART3_TX);
 756                break;
 757        case IRQ_UART2_RX:
 758                free_dma(CH_UART2_RX);
 759                free_dma(CH_UART2_TX);
 760                break;
 761        default:
 762                break;
 763        }
 764#endif
 765        free_irq(uart->rx_irq, uart);
 766        free_irq(uart->tx_irq, uart);
 767#endif
 768
 769#ifdef CONFIG_SERIAL_BFIN_CTSRTS
 770        if (uart->cts_pin >= 0)
 771                free_irq(gpio_to_irq(uart->cts_pin), uart);
 772        if (uart->rts_pin >= 0)
 773                gpio_free(uart->rts_pin);
 774#endif
 775#ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
 776        if (uart->cts_pin >= 0)
 777                free_irq(uart->status_irq, uart);
 778#endif
 779}
 780
 781static void
 782bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
 783                   struct ktermios *old)
 784{
 785        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 786        unsigned long flags;
 787        unsigned int baud, quot;
 788        unsigned int ier, lcr = 0;
 789        unsigned long timeout;
 790
 791#ifdef CONFIG_SERIAL_BFIN_CTSRTS
 792        if (old == NULL && uart->cts_pin != -1)
 793                termios->c_cflag |= CRTSCTS;
 794        else if (uart->cts_pin == -1)
 795                termios->c_cflag &= ~CRTSCTS;
 796#endif
 797
 798        switch (termios->c_cflag & CSIZE) {
 799        case CS8:
 800                lcr = WLS(8);
 801                break;
 802        case CS7:
 803                lcr = WLS(7);
 804                break;
 805        case CS6:
 806                lcr = WLS(6);
 807                break;
 808        case CS5:
 809                lcr = WLS(5);
 810                break;
 811        default:
 812                printk(KERN_ERR "%s: word length not supported\n",
 813                        __func__);
 814        }
 815
 816        /* Anomaly notes:
 817         *  05000231 -  STOP bit is always set to 1 whatever the user is set.
 818         */
 819        if (termios->c_cflag & CSTOPB) {
 820                if (ANOMALY_05000231)
 821                        printk(KERN_WARNING "STOP bits other than 1 is not "
 822                                "supported in case of anomaly 05000231.\n");
 823                else
 824                        lcr |= STB;
 825        }
 826        if (termios->c_cflag & PARENB)
 827                lcr |= PEN;
 828        if (!(termios->c_cflag & PARODD))
 829                lcr |= EPS;
 830        if (termios->c_cflag & CMSPAR)
 831                lcr |= STP;
 832
 833        spin_lock_irqsave(&uart->port.lock, flags);
 834
 835        port->read_status_mask = OE;
 836        if (termios->c_iflag & INPCK)
 837                port->read_status_mask |= (FE | PE);
 838        if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
 839                port->read_status_mask |= BI;
 840
 841        /*
 842         * Characters to ignore
 843         */
 844        port->ignore_status_mask = 0;
 845        if (termios->c_iflag & IGNPAR)
 846                port->ignore_status_mask |= FE | PE;
 847        if (termios->c_iflag & IGNBRK) {
 848                port->ignore_status_mask |= BI;
 849                /*
 850                 * If we're ignoring parity and break indicators,
 851                 * ignore overruns too (for real raw support).
 852                 */
 853                if (termios->c_iflag & IGNPAR)
 854                        port->ignore_status_mask |= OE;
 855        }
 856
 857        baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 858        quot = uart_get_divisor(port, baud);
 859
 860        /* If discipline is not IRDA, apply ANOMALY_05000230 */
 861        if (termios->c_line != N_IRDA)
 862                quot -= ANOMALY_05000230;
 863
 864        UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
 865
 866        /* Wait till the transfer buffer is empty */
 867        timeout = jiffies + msecs_to_jiffies(10);
 868        while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
 869                if (time_after(jiffies, timeout)) {
 870                        dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
 871                        break;
 872                }
 873
 874        /* Disable UART */
 875        ier = UART_GET_IER(uart);
 876        UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
 877        UART_DISABLE_INTS(uart);
 878
 879        /* Set DLAB in LCR to Access CLK */
 880        UART_SET_DLAB(uart);
 881
 882        UART_PUT_CLK(uart, quot);
 883        SSYNC();
 884
 885        /* Clear DLAB in LCR to Access THR RBR IER */
 886        UART_CLEAR_DLAB(uart);
 887
 888        UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
 889
 890        /* Enable UART */
 891        UART_ENABLE_INTS(uart, ier);
 892        UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
 893
 894        /* Port speed changed, update the per-port timeout. */
 895        uart_update_timeout(port, termios->c_cflag, baud);
 896
 897        spin_unlock_irqrestore(&uart->port.lock, flags);
 898}
 899
 900static const char *bfin_serial_type(struct uart_port *port)
 901{
 902        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 903
 904        return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
 905}
 906
 907/*
 908 * Release the memory region(s) being used by 'port'.
 909 */
 910static void bfin_serial_release_port(struct uart_port *port)
 911{
 912}
 913
 914/*
 915 * Request the memory region(s) being used by 'port'.
 916 */
 917static int bfin_serial_request_port(struct uart_port *port)
 918{
 919        return 0;
 920}
 921
 922/*
 923 * Configure/autoconfigure the port.
 924 */
 925static void bfin_serial_config_port(struct uart_port *port, int flags)
 926{
 927        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 928
 929        if (flags & UART_CONFIG_TYPE &&
 930            bfin_serial_request_port(&uart->port) == 0)
 931                uart->port.type = PORT_BFIN;
 932}
 933
 934/*
 935 * Verify the new serial_struct (for TIOCSSERIAL).
 936 * The only change we allow are to the flags and type, and
 937 * even then only between PORT_BFIN and PORT_UNKNOWN
 938 */
 939static int
 940bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
 941{
 942        return 0;
 943}
 944
 945/*
 946 * Enable the IrDA function if tty->ldisc.num is N_IRDA.
 947 * In other cases, disable IrDA function.
 948 */
 949static void bfin_serial_set_ldisc(struct uart_port *port,
 950                                  struct ktermios *termios)
 951{
 952        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 953        unsigned int val;
 954
 955        switch (termios->c_line) {
 956        case N_IRDA:
 957                val = UART_GET_GCTL(uart);
 958                val |= (UMOD_IRDA | RPOLC);
 959                UART_PUT_GCTL(uart, val);
 960                break;
 961        default:
 962                val = UART_GET_GCTL(uart);
 963                val &= ~(UMOD_MASK | RPOLC);
 964                UART_PUT_GCTL(uart, val);
 965        }
 966}
 967
 968static void bfin_serial_reset_irda(struct uart_port *port)
 969{
 970        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 971        unsigned int val;
 972
 973        val = UART_GET_GCTL(uart);
 974        val &= ~(UMOD_MASK | RPOLC);
 975        UART_PUT_GCTL(uart, val);
 976        SSYNC();
 977        val |= (UMOD_IRDA | RPOLC);
 978        UART_PUT_GCTL(uart, val);
 979        SSYNC();
 980}
 981
 982#ifdef CONFIG_CONSOLE_POLL
 983/* Anomaly notes:
 984 *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
 985 *              losing other bits of UART_LSR is not a problem here.
 986 */
 987static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
 988{
 989        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 990
 991        while (!(UART_GET_LSR(uart) & THRE))
 992                cpu_relax();
 993
 994        UART_CLEAR_DLAB(uart);
 995        UART_PUT_CHAR(uart, (unsigned char)chr);
 996}
 997
 998static int bfin_serial_poll_get_char(struct uart_port *port)
 999{
1000        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1001        unsigned char chr;
1002
1003        while (!(UART_GET_LSR(uart) & DR))
1004                cpu_relax();
1005
1006        UART_CLEAR_DLAB(uart);
1007        chr = UART_GET_CHAR(uart);
1008
1009        return chr;
1010}
1011#endif
1012
1013static struct uart_ops bfin_serial_pops = {
1014        .tx_empty       = bfin_serial_tx_empty,
1015        .set_mctrl      = bfin_serial_set_mctrl,
1016        .get_mctrl      = bfin_serial_get_mctrl,
1017        .stop_tx        = bfin_serial_stop_tx,
1018        .start_tx       = bfin_serial_start_tx,
1019        .stop_rx        = bfin_serial_stop_rx,
1020        .break_ctl      = bfin_serial_break_ctl,
1021        .startup        = bfin_serial_startup,
1022        .shutdown       = bfin_serial_shutdown,
1023        .set_termios    = bfin_serial_set_termios,
1024        .set_ldisc      = bfin_serial_set_ldisc,
1025        .type           = bfin_serial_type,
1026        .release_port   = bfin_serial_release_port,
1027        .request_port   = bfin_serial_request_port,
1028        .config_port    = bfin_serial_config_port,
1029        .verify_port    = bfin_serial_verify_port,
1030#ifdef CONFIG_CONSOLE_POLL
1031        .poll_put_char  = bfin_serial_poll_put_char,
1032        .poll_get_char  = bfin_serial_poll_get_char,
1033#endif
1034};
1035
1036#if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1037/*
1038 * If the port was already initialised (eg, by a boot loader),
1039 * try to determine the current setup.
1040 */
1041static void __init
1042bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1043                           int *parity, int *bits)
1044{
1045        unsigned int status;
1046
1047        status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1048        if (status == (ERBFI | ETBEI)) {
1049                /* ok, the port was enabled */
1050                u32 lcr, clk;
1051
1052                lcr = UART_GET_LCR(uart);
1053
1054                *parity = 'n';
1055                if (lcr & PEN) {
1056                        if (lcr & EPS)
1057                                *parity = 'e';
1058                        else
1059                                *parity = 'o';
1060                }
1061                *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1062
1063                /* Set DLAB in LCR to Access CLK */
1064                UART_SET_DLAB(uart);
1065
1066                clk = UART_GET_CLK(uart);
1067
1068                /* Clear DLAB in LCR to Access THR RBR IER */
1069                UART_CLEAR_DLAB(uart);
1070
1071                *baud = get_sclk() / (16*clk);
1072        }
1073        pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1074}
1075
1076static struct uart_driver bfin_serial_reg;
1077
1078static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1079{
1080        struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1081        while (!(UART_GET_LSR(uart) & THRE))
1082                barrier();
1083        UART_PUT_CHAR(uart, ch);
1084}
1085
1086#endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1087                 defined (CONFIG_EARLY_PRINTK) */
1088
1089#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1090#define CLASS_BFIN_CONSOLE      "bfin-console"
1091/*
1092 * Interrupts are disabled on entering
1093 */
1094static void
1095bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1096{
1097        struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1098        unsigned long flags;
1099
1100        spin_lock_irqsave(&uart->port.lock, flags);
1101        uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1102        spin_unlock_irqrestore(&uart->port.lock, flags);
1103
1104}
1105
1106static int __init
1107bfin_serial_console_setup(struct console *co, char *options)
1108{
1109        struct bfin_serial_port *uart;
1110        int baud = 57600;
1111        int bits = 8;
1112        int parity = 'n';
1113# if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1114        defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1115        int flow = 'r';
1116# else
1117        int flow = 'n';
1118# endif
1119
1120        /*
1121         * Check whether an invalid uart number has been specified, and
1122         * if so, search for the first available port that does have
1123         * console support.
1124         */
1125        if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1126                return -ENODEV;
1127
1128        uart = bfin_serial_ports[co->index];
1129        if (!uart)
1130                return -ENODEV;
1131
1132        if (options)
1133                uart_parse_options(options, &baud, &parity, &bits, &flow);
1134        else
1135                bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1136
1137        return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1138}
1139
1140static struct console bfin_serial_console = {
1141        .name           = BFIN_SERIAL_DEV_NAME,
1142        .write          = bfin_serial_console_write,
1143        .device         = uart_console_device,
1144        .setup          = bfin_serial_console_setup,
1145        .flags          = CON_PRINTBUFFER,
1146        .index          = -1,
1147        .data           = &bfin_serial_reg,
1148};
1149#define BFIN_SERIAL_CONSOLE     (&bfin_serial_console)
1150#else
1151#define BFIN_SERIAL_CONSOLE     NULL
1152#endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1153
1154#ifdef  CONFIG_EARLY_PRINTK
1155static struct bfin_serial_port bfin_earlyprintk_port;
1156#define CLASS_BFIN_EARLYPRINTK  "bfin-earlyprintk"
1157
1158/*
1159 * Interrupts are disabled on entering
1160 */
1161static void
1162bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1163{
1164        unsigned long flags;
1165
1166        if (bfin_earlyprintk_port.port.line != co->index)
1167                return;
1168
1169        spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1170        uart_console_write(&bfin_earlyprintk_port.port, s, count,
1171                bfin_serial_console_putchar);
1172        spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1173}
1174
1175/*
1176 * This should have a .setup or .early_setup in it, but then things get called
1177 * without the command line options, and the baud rate gets messed up - so
1178 * don't let the common infrastructure play with things. (see calls to setup
1179 * & earlysetup in ./kernel/printk.c:register_console()
1180 */
1181static struct console bfin_early_serial_console __initdata = {
1182        .name = "early_BFuart",
1183        .write = bfin_earlyprintk_console_write,
1184        .device = uart_console_device,
1185        .flags = CON_PRINTBUFFER,
1186        .index = -1,
1187        .data  = &bfin_serial_reg,
1188};
1189#endif
1190
1191static struct uart_driver bfin_serial_reg = {
1192        .owner                  = THIS_MODULE,
1193        .driver_name            = DRIVER_NAME,
1194        .dev_name               = BFIN_SERIAL_DEV_NAME,
1195        .major                  = BFIN_SERIAL_MAJOR,
1196        .minor                  = BFIN_SERIAL_MINOR,
1197        .nr                     = BFIN_UART_NR_PORTS,
1198        .cons                   = BFIN_SERIAL_CONSOLE,
1199};
1200
1201static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1202{
1203        struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1204
1205        return uart_suspend_port(&bfin_serial_reg, &uart->port);
1206}
1207
1208static int bfin_serial_resume(struct platform_device *pdev)
1209{
1210        struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1211
1212        return uart_resume_port(&bfin_serial_reg, &uart->port);
1213}
1214
1215static int bfin_serial_probe(struct platform_device *pdev)
1216{
1217        struct resource *res;
1218        struct bfin_serial_port *uart = NULL;
1219        int ret = 0;
1220
1221        if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1222                dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1223                return -ENOENT;
1224        }
1225
1226        if (bfin_serial_ports[pdev->id] == NULL) {
1227
1228                uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1229                if (!uart) {
1230                        dev_err(&pdev->dev,
1231                                "fail to malloc bfin_serial_port\n");
1232                        return -ENOMEM;
1233                }
1234                bfin_serial_ports[pdev->id] = uart;
1235
1236#ifdef CONFIG_EARLY_PRINTK
1237                if (!(bfin_earlyprintk_port.port.membase
1238                        && bfin_earlyprintk_port.port.line == pdev->id)) {
1239                        /*
1240                         * If the peripheral PINs of current port is allocated
1241                         * in earlyprintk probe stage, don't do it again.
1242                         */
1243#endif
1244                ret = peripheral_request_list(
1245                        dev_get_platdata(&pdev->dev),
1246                        DRIVER_NAME);
1247                if (ret) {
1248                        dev_err(&pdev->dev,
1249                                "fail to request bfin serial peripherals\n");
1250                        goto out_error_free_mem;
1251                }
1252#ifdef CONFIG_EARLY_PRINTK
1253                }
1254#endif
1255
1256                spin_lock_init(&uart->port.lock);
1257                uart->port.uartclk   = get_sclk();
1258                uart->port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1259                uart->port.ops       = &bfin_serial_pops;
1260                uart->port.line      = pdev->id;
1261                uart->port.iotype    = UPIO_MEM;
1262                uart->port.flags     = UPF_BOOT_AUTOCONF;
1263
1264                res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1265                if (res == NULL) {
1266                        dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1267                        ret = -ENOENT;
1268                        goto out_error_free_peripherals;
1269                }
1270
1271                uart->port.membase = ioremap(res->start, resource_size(res));
1272                if (!uart->port.membase) {
1273                        dev_err(&pdev->dev, "Cannot map uart IO\n");
1274                        ret = -ENXIO;
1275                        goto out_error_free_peripherals;
1276                }
1277                uart->port.mapbase = res->start;
1278
1279                uart->tx_irq = platform_get_irq(pdev, 0);
1280                if (uart->tx_irq < 0) {
1281                        dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1282                        ret = -ENOENT;
1283                        goto out_error_unmap;
1284                }
1285
1286                uart->rx_irq = platform_get_irq(pdev, 1);
1287                if (uart->rx_irq < 0) {
1288                        dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1289                        ret = -ENOENT;
1290                        goto out_error_unmap;
1291                }
1292                uart->port.irq = uart->rx_irq;
1293
1294                uart->status_irq = platform_get_irq(pdev, 2);
1295                if (uart->status_irq < 0) {
1296                        dev_err(&pdev->dev, "No uart status IRQ specified\n");
1297                        ret = -ENOENT;
1298                        goto out_error_unmap;
1299                }
1300
1301#ifdef CONFIG_SERIAL_BFIN_DMA
1302                spin_lock_init(&uart->rx_lock);
1303                uart->tx_done       = 1;
1304                uart->tx_count      = 0;
1305
1306                res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1307                if (res == NULL) {
1308                        dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1309                        ret = -ENOENT;
1310                        goto out_error_unmap;
1311                }
1312                uart->tx_dma_channel = res->start;
1313
1314                res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1315                if (res == NULL) {
1316                        dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1317                        ret = -ENOENT;
1318                        goto out_error_unmap;
1319                }
1320                uart->rx_dma_channel = res->start;
1321
1322                init_timer(&(uart->rx_dma_timer));
1323#endif
1324
1325#if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1326        defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1327                res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1328                if (res == NULL)
1329                        uart->cts_pin = -1;
1330                else
1331                        uart->cts_pin = res->start;
1332
1333                res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1334                if (res == NULL)
1335                        uart->rts_pin = -1;
1336                else
1337                        uart->rts_pin = res->start;
1338#endif
1339        }
1340
1341#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1342        if (!is_early_platform_device(pdev)) {
1343#endif
1344                uart = bfin_serial_ports[pdev->id];
1345                uart->port.dev = &pdev->dev;
1346                dev_set_drvdata(&pdev->dev, uart);
1347                ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1348#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1349        }
1350#endif
1351
1352        if (!ret)
1353                return 0;
1354
1355        if (uart) {
1356out_error_unmap:
1357                iounmap(uart->port.membase);
1358out_error_free_peripherals:
1359                peripheral_free_list(dev_get_platdata(&pdev->dev));
1360out_error_free_mem:
1361                kfree(uart);
1362                bfin_serial_ports[pdev->id] = NULL;
1363        }
1364
1365        return ret;
1366}
1367
1368static int bfin_serial_remove(struct platform_device *pdev)
1369{
1370        struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1371
1372        dev_set_drvdata(&pdev->dev, NULL);
1373
1374        if (uart) {
1375                uart_remove_one_port(&bfin_serial_reg, &uart->port);
1376                iounmap(uart->port.membase);
1377                peripheral_free_list(dev_get_platdata(&pdev->dev));
1378                kfree(uart);
1379                bfin_serial_ports[pdev->id] = NULL;
1380        }
1381
1382        return 0;
1383}
1384
1385static struct platform_driver bfin_serial_driver = {
1386        .probe          = bfin_serial_probe,
1387        .remove         = bfin_serial_remove,
1388        .suspend        = bfin_serial_suspend,
1389        .resume         = bfin_serial_resume,
1390        .driver         = {
1391                .name   = DRIVER_NAME,
1392        },
1393};
1394
1395#if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1396static struct early_platform_driver early_bfin_serial_driver __initdata = {
1397        .class_str = CLASS_BFIN_CONSOLE,
1398        .pdrv = &bfin_serial_driver,
1399        .requested_id = EARLY_PLATFORM_ID_UNSET,
1400};
1401
1402static int __init bfin_serial_rs_console_init(void)
1403{
1404        early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1405
1406        early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1407
1408        register_console(&bfin_serial_console);
1409
1410        return 0;
1411}
1412console_initcall(bfin_serial_rs_console_init);
1413#endif
1414
1415#ifdef CONFIG_EARLY_PRINTK
1416/*
1417 * Memory can't be allocated dynamically during earlyprink init stage.
1418 * So, do individual probe for earlyprink with a static uart port variable.
1419 */
1420static int bfin_earlyprintk_probe(struct platform_device *pdev)
1421{
1422        struct resource *res;
1423        int ret;
1424
1425        if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1426                dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1427                return -ENOENT;
1428        }
1429
1430        ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
1431                                        DRIVER_NAME);
1432        if (ret) {
1433                dev_err(&pdev->dev,
1434                                "fail to request bfin serial peripherals\n");
1435                        return ret;
1436        }
1437
1438        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1439        if (res == NULL) {
1440                dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1441                ret = -ENOENT;
1442                goto out_error_free_peripherals;
1443        }
1444
1445        bfin_earlyprintk_port.port.membase = ioremap(res->start,
1446                                                     resource_size(res));
1447        if (!bfin_earlyprintk_port.port.membase) {
1448                dev_err(&pdev->dev, "Cannot map uart IO\n");
1449                ret = -ENXIO;
1450                goto out_error_free_peripherals;
1451        }
1452        bfin_earlyprintk_port.port.mapbase = res->start;
1453        bfin_earlyprintk_port.port.line = pdev->id;
1454        bfin_earlyprintk_port.port.uartclk = get_sclk();
1455        bfin_earlyprintk_port.port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1456        spin_lock_init(&bfin_earlyprintk_port.port.lock);
1457
1458        return 0;
1459
1460out_error_free_peripherals:
1461        peripheral_free_list(dev_get_platdata(&pdev->dev));
1462
1463        return ret;
1464}
1465
1466static struct platform_driver bfin_earlyprintk_driver = {
1467        .probe          = bfin_earlyprintk_probe,
1468        .driver         = {
1469                .name   = DRIVER_NAME,
1470                .owner  = THIS_MODULE,
1471        },
1472};
1473
1474static struct early_platform_driver early_bfin_earlyprintk_driver __initdata = {
1475        .class_str = CLASS_BFIN_EARLYPRINTK,
1476        .pdrv = &bfin_earlyprintk_driver,
1477        .requested_id = EARLY_PLATFORM_ID_UNSET,
1478};
1479
1480struct console __init *bfin_earlyserial_init(unsigned int port,
1481                                                unsigned int cflag)
1482{
1483        struct ktermios t;
1484        char port_name[20];
1485
1486        if (port < 0 || port >= BFIN_UART_NR_PORTS)
1487                return NULL;
1488
1489        /*
1490         * Only probe resource of the given port in earlyprintk boot arg.
1491         * The expected port id should be indicated in port name string.
1492         */
1493        snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1494        early_platform_driver_register(&early_bfin_earlyprintk_driver,
1495                port_name);
1496        early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1497
1498        if (!bfin_earlyprintk_port.port.membase)
1499                return NULL;
1500
1501#ifdef CONFIG_SERIAL_BFIN_CONSOLE
1502        /*
1503         * If we are using early serial, don't let the normal console rewind
1504         * log buffer, since that causes things to be printed multiple times
1505         */
1506        bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1507#endif
1508
1509        bfin_early_serial_console.index = port;
1510        t.c_cflag = cflag;
1511        t.c_iflag = 0;
1512        t.c_oflag = 0;
1513        t.c_lflag = ICANON;
1514        t.c_line = port;
1515        bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1516
1517        return &bfin_early_serial_console;
1518}
1519#endif /* CONFIG_EARLY_PRINTK */
1520
1521static int __init bfin_serial_init(void)
1522{
1523        int ret;
1524
1525        pr_info("Blackfin serial driver\n");
1526
1527        ret = uart_register_driver(&bfin_serial_reg);
1528        if (ret) {
1529                pr_err("failed to register %s:%d\n",
1530                        bfin_serial_reg.driver_name, ret);
1531        }
1532
1533        ret = platform_driver_register(&bfin_serial_driver);
1534        if (ret) {
1535                pr_err("fail to register bfin uart\n");
1536                uart_unregister_driver(&bfin_serial_reg);
1537        }
1538
1539        return ret;
1540}
1541
1542static void __exit bfin_serial_exit(void)
1543{
1544        platform_driver_unregister(&bfin_serial_driver);
1545        uart_unregister_driver(&bfin_serial_reg);
1546}
1547
1548
1549module_init(bfin_serial_init);
1550module_exit(bfin_serial_exit);
1551
1552MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1553MODULE_DESCRIPTION("Blackfin generic serial port driver");
1554MODULE_LICENSE("GPL");
1555MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1556MODULE_ALIAS("platform:bfin-uart");
1557