1#include "radeonfb.h"
2
3#include <linux/slab.h>
4
5#include "../edid.h"
6
7static struct fb_var_screeninfo radeonfb_default_var = {
8 .xres = 640,
9 .yres = 480,
10 .xres_virtual = 640,
11 .yres_virtual = 480,
12 .bits_per_pixel = 8,
13 .red = { .length = 8 },
14 .green = { .length = 8 },
15 .blue = { .length = 8 },
16 .activate = FB_ACTIVATE_NOW,
17 .height = -1,
18 .width = -1,
19 .pixclock = 39721,
20 .left_margin = 40,
21 .right_margin = 24,
22 .upper_margin = 32,
23 .lower_margin = 11,
24 .hsync_len = 96,
25 .vsync_len = 2,
26 .vmode = FB_VMODE_NONINTERLACED
27};
28
29static char *radeon_get_mon_name(int type)
30{
31 char *pret = NULL;
32
33 switch (type) {
34 case MT_NONE:
35 pret = "no";
36 break;
37 case MT_CRT:
38 pret = "CRT";
39 break;
40 case MT_DFP:
41 pret = "DFP";
42 break;
43 case MT_LCD:
44 pret = "LCD";
45 break;
46 case MT_CTV:
47 pret = "CTV";
48 break;
49 case MT_STV:
50 pret = "STV";
51 break;
52 }
53
54 return pret;
55}
56
57
58#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
59
60
61
62
63
64
65static int radeon_parse_montype_prop(struct device_node *dp, u8 **out_EDID,
66 int hdno)
67{
68 static char *propnames[] = { "DFP,EDID", "LCD,EDID", "EDID",
69 "EDID1", "EDID2", NULL };
70 const u8 *pedid = NULL;
71 const u8 *pmt = NULL;
72 u8 *tmp;
73 int i, mt = MT_NONE;
74
75 pr_debug("analyzing OF properties...\n");
76 pmt = of_get_property(dp, "display-type", NULL);
77 if (!pmt)
78 return MT_NONE;
79 pr_debug("display-type: %s\n", pmt);
80
81
82
83 if (!strcmp(pmt, "LCD") || !strcmp(pmt, "DFP"))
84 mt = MT_DFP;
85 else if (!strcmp(pmt, "CRT"))
86 mt = MT_CRT;
87 else {
88 if (strcmp(pmt, "NONE") != 0)
89 printk(KERN_WARNING "radeonfb: Unknown OF display-type: %s\n",
90 pmt);
91 return MT_NONE;
92 }
93
94 for (i = 0; propnames[i] != NULL; ++i) {
95 pedid = of_get_property(dp, propnames[i], NULL);
96 if (pedid != NULL)
97 break;
98 }
99
100
101
102
103 if (pedid == NULL && dp->parent && (hdno != -1))
104 pedid = of_get_property(dp->parent,
105 (hdno == 0) ? "EDID1" : "EDID2", NULL);
106 if (pedid == NULL && dp->parent && (hdno == 0))
107 pedid = of_get_property(dp->parent, "EDID", NULL);
108 if (pedid == NULL)
109 return mt;
110
111 tmp = kmemdup(pedid, EDID_LENGTH, GFP_KERNEL);
112 if (!tmp)
113 return mt;
114 *out_EDID = tmp;
115 return mt;
116}
117
118static int radeon_probe_OF_head(struct radeonfb_info *rinfo, int head_no,
119 u8 **out_EDID)
120{
121 struct device_node *dp;
122
123 pr_debug("radeon_probe_OF_head\n");
124
125 dp = rinfo->of_node;
126 while (dp == NULL)
127 return MT_NONE;
128
129 if (rinfo->has_CRTC2) {
130 const char *pname;
131 int len, second = 0;
132
133 dp = dp->child;
134 do {
135 if (!dp)
136 return MT_NONE;
137 pname = of_get_property(dp, "name", NULL);
138 if (!pname)
139 return MT_NONE;
140 len = strlen(pname);
141 pr_debug("head: %s (letter: %c, head_no: %d)\n",
142 pname, pname[len-1], head_no);
143 if (pname[len-1] == 'A' && head_no == 0) {
144 int mt = radeon_parse_montype_prop(dp, out_EDID, 0);
145
146
147
148 if (mt == MT_DFP && rinfo->is_mobility)
149 mt = MT_LCD;
150 return mt;
151 } else if (pname[len-1] == 'B' && head_no == 1)
152 return radeon_parse_montype_prop(dp, out_EDID, 1);
153 second = 1;
154 dp = dp->sibling;
155 } while(!second);
156 } else {
157 if (head_no > 0)
158 return MT_NONE;
159 return radeon_parse_montype_prop(dp, out_EDID, -1);
160 }
161 return MT_NONE;
162}
163#endif
164
165
166static int radeon_get_panel_info_BIOS(struct radeonfb_info *rinfo)
167{
168 unsigned long tmp, tmp0;
169 char stmp[30];
170 int i;
171
172 if (!rinfo->bios_seg)
173 return 0;
174
175 if (!(tmp = BIOS_IN16(rinfo->fp_bios_start + 0x40))) {
176 printk(KERN_ERR "radeonfb: Failed to detect DFP panel info using BIOS\n");
177 rinfo->panel_info.pwr_delay = 200;
178 return 0;
179 }
180
181 for(i=0; i<24; i++)
182 stmp[i] = BIOS_IN8(tmp+i+1);
183 stmp[24] = 0;
184 printk("radeonfb: panel ID string: %s\n", stmp);
185 rinfo->panel_info.xres = BIOS_IN16(tmp + 25);
186 rinfo->panel_info.yres = BIOS_IN16(tmp + 27);
187 printk("radeonfb: detected LVDS panel size from BIOS: %dx%d\n",
188 rinfo->panel_info.xres, rinfo->panel_info.yres);
189
190 rinfo->panel_info.pwr_delay = BIOS_IN16(tmp + 44);
191 pr_debug("BIOS provided panel power delay: %d\n", rinfo->panel_info.pwr_delay);
192 if (rinfo->panel_info.pwr_delay > 2000 || rinfo->panel_info.pwr_delay <= 0)
193 rinfo->panel_info.pwr_delay = 2000;
194
195
196
197
198 rinfo->panel_info.ref_divider = BIOS_IN16(tmp + 46);
199 rinfo->panel_info.post_divider = BIOS_IN8(tmp + 48);
200 rinfo->panel_info.fbk_divider = BIOS_IN16(tmp + 49);
201 if (rinfo->panel_info.ref_divider != 0 &&
202 rinfo->panel_info.fbk_divider > 3) {
203 rinfo->panel_info.use_bios_dividers = 1;
204 printk(KERN_INFO "radeondb: BIOS provided dividers will be used\n");
205 pr_debug("ref_divider = %x\n", rinfo->panel_info.ref_divider);
206 pr_debug("post_divider = %x\n", rinfo->panel_info.post_divider);
207 pr_debug("fbk_divider = %x\n", rinfo->panel_info.fbk_divider);
208 }
209 pr_debug("Scanning BIOS table ...\n");
210 for(i=0; i<32; i++) {
211 tmp0 = BIOS_IN16(tmp+64+i*2);
212 if (tmp0 == 0)
213 break;
214 pr_debug(" %d x %d\n", BIOS_IN16(tmp0), BIOS_IN16(tmp0+2));
215 if ((BIOS_IN16(tmp0) == rinfo->panel_info.xres) &&
216 (BIOS_IN16(tmp0+2) == rinfo->panel_info.yres)) {
217 rinfo->panel_info.hblank = (BIOS_IN16(tmp0+17) - BIOS_IN16(tmp0+19)) * 8;
218 rinfo->panel_info.hOver_plus = ((BIOS_IN16(tmp0+21) -
219 BIOS_IN16(tmp0+19) -1) * 8) & 0x7fff;
220 rinfo->panel_info.hSync_width = BIOS_IN8(tmp0+23) * 8;
221 rinfo->panel_info.vblank = BIOS_IN16(tmp0+24) - BIOS_IN16(tmp0+26);
222 rinfo->panel_info.vOver_plus = (BIOS_IN16(tmp0+28) & 0x7ff) - BIOS_IN16(tmp0+26);
223 rinfo->panel_info.vSync_width = (BIOS_IN16(tmp0+28) & 0xf800) >> 11;
224 rinfo->panel_info.clock = BIOS_IN16(tmp0+9);
225
226
227
228 rinfo->panel_info.hAct_high = 1;
229 rinfo->panel_info.vAct_high = 1;
230
231 rinfo->panel_info.valid = 1;
232
233 pr_debug("Found panel in BIOS table:\n");
234 pr_debug(" hblank: %d\n", rinfo->panel_info.hblank);
235 pr_debug(" hOver_plus: %d\n", rinfo->panel_info.hOver_plus);
236 pr_debug(" hSync_width: %d\n", rinfo->panel_info.hSync_width);
237 pr_debug(" vblank: %d\n", rinfo->panel_info.vblank);
238 pr_debug(" vOver_plus: %d\n", rinfo->panel_info.vOver_plus);
239 pr_debug(" vSync_width: %d\n", rinfo->panel_info.vSync_width);
240 pr_debug(" clock: %d\n", rinfo->panel_info.clock);
241
242 return 1;
243 }
244 }
245 pr_debug("Didn't find panel in BIOS table !\n");
246
247 return 0;
248}
249
250
251
252
253
254static void radeon_parse_connector_info(struct radeonfb_info *rinfo)
255{
256 int offset, chips, connectors, tmp, i, conn, type;
257
258 static char* __conn_type_table[16] = {
259 "NONE", "Proprietary", "CRT", "DVI-I", "DVI-D", "Unknown", "Unknown",
260 "Unknown", "Unknown", "Unknown", "Unknown", "Unknown", "Unknown",
261 "Unknown", "Unknown", "Unknown"
262 };
263
264 if (!rinfo->bios_seg)
265 return;
266
267 offset = BIOS_IN16(rinfo->fp_bios_start + 0x50);
268 if (offset == 0) {
269 printk(KERN_WARNING "radeonfb: No connector info table detected\n");
270 return;
271 }
272
273
274
275
276 chips = BIOS_IN8(offset++) >> 4;
277 pr_debug("%d chips in connector info\n", chips);
278 for (i = 0; i < chips; i++) {
279 tmp = BIOS_IN8(offset++);
280 connectors = tmp & 0x0f;
281 pr_debug(" - chip %d has %d connectors\n", tmp >> 4, connectors);
282 for (conn = 0; ; conn++) {
283 tmp = BIOS_IN16(offset);
284 if (tmp == 0)
285 break;
286 offset += 2;
287 type = (tmp >> 12) & 0x0f;
288 pr_debug(" * connector %d of type %d (%s) : %04x\n",
289 conn, type, __conn_type_table[type], tmp);
290 }
291 }
292}
293
294
295
296
297
298
299
300static int radeon_crt_is_connected(struct radeonfb_info *rinfo, int is_crt_dac)
301{
302 int connected = 0;
303
304
305
306
307 if (is_crt_dac) {
308 unsigned long ulOrigVCLK_ECP_CNTL;
309 unsigned long ulOrigDAC_CNTL;
310 unsigned long ulOrigDAC_EXT_CNTL;
311 unsigned long ulOrigCRTC_EXT_CNTL;
312 unsigned long ulData;
313 unsigned long ulMask;
314
315 ulOrigVCLK_ECP_CNTL = INPLL(VCLK_ECP_CNTL);
316
317 ulData = ulOrigVCLK_ECP_CNTL;
318 ulData &= ~(PIXCLK_ALWAYS_ONb
319 | PIXCLK_DAC_ALWAYS_ONb);
320 ulMask = ~(PIXCLK_ALWAYS_ONb
321 | PIXCLK_DAC_ALWAYS_ONb);
322 OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask);
323
324 ulOrigCRTC_EXT_CNTL = INREG(CRTC_EXT_CNTL);
325 ulData = ulOrigCRTC_EXT_CNTL;
326 ulData |= CRTC_CRT_ON;
327 OUTREG(CRTC_EXT_CNTL, ulData);
328
329 ulOrigDAC_EXT_CNTL = INREG(DAC_EXT_CNTL);
330 ulData = ulOrigDAC_EXT_CNTL;
331 ulData &= ~DAC_FORCE_DATA_MASK;
332 ulData |= (DAC_FORCE_BLANK_OFF_EN
333 |DAC_FORCE_DATA_EN
334 |DAC_FORCE_DATA_SEL_MASK);
335 if ((rinfo->family == CHIP_FAMILY_RV250) ||
336 (rinfo->family == CHIP_FAMILY_RV280))
337 ulData |= (0x01b6 << DAC_FORCE_DATA_SHIFT);
338 else
339 ulData |= (0x01ac << DAC_FORCE_DATA_SHIFT);
340
341 OUTREG(DAC_EXT_CNTL, ulData);
342
343 ulOrigDAC_CNTL = INREG(DAC_CNTL);
344 ulData = ulOrigDAC_CNTL;
345 ulData |= DAC_CMP_EN;
346 ulData &= ~(DAC_RANGE_CNTL_MASK
347 | DAC_PDWN);
348 ulData |= 0x2;
349 OUTREG(DAC_CNTL, ulData);
350
351 mdelay(1);
352
353 ulData = INREG(DAC_CNTL);
354 connected = (DAC_CMP_OUTPUT & ulData) ? 1 : 0;
355
356 ulData = ulOrigVCLK_ECP_CNTL;
357 ulMask = 0xFFFFFFFFL;
358 OUTPLLP(VCLK_ECP_CNTL, ulData, ulMask);
359
360 OUTREG(DAC_CNTL, ulOrigDAC_CNTL );
361 OUTREG(DAC_EXT_CNTL, ulOrigDAC_EXT_CNTL );
362 OUTREG(CRTC_EXT_CNTL, ulOrigCRTC_EXT_CNTL);
363 }
364
365 return connected ? MT_CRT : MT_NONE;
366}
367
368
369
370
371
372static int radeon_parse_monitor_layout(struct radeonfb_info *rinfo,
373 const char *monitor_layout)
374{
375 char s1[5], s2[5];
376 int i = 0, second = 0;
377 const char *s;
378
379 if (!monitor_layout)
380 return 0;
381
382 s = monitor_layout;
383 do {
384 switch(*s) {
385 case ',':
386 s1[i] = '\0';
387 i = 0;
388 second = 1;
389 break;
390 case ' ':
391 case '\0':
392 break;
393 default:
394 if (i > 4)
395 break;
396 if (second)
397 s2[i] = *s;
398 else
399 s1[i] = *s;
400 i++;
401 }
402
403 if (i > 4)
404 i = 4;
405
406 } while (*s++);
407 if (second)
408 s2[i] = 0;
409 else {
410 s1[i] = 0;
411 s2[0] = 0;
412 }
413 if (strcmp(s1, "CRT") == 0)
414 rinfo->mon1_type = MT_CRT;
415 else if (strcmp(s1, "TMDS") == 0)
416 rinfo->mon1_type = MT_DFP;
417 else if (strcmp(s1, "LVDS") == 0)
418 rinfo->mon1_type = MT_LCD;
419
420 if (strcmp(s2, "CRT") == 0)
421 rinfo->mon2_type = MT_CRT;
422 else if (strcmp(s2, "TMDS") == 0)
423 rinfo->mon2_type = MT_DFP;
424 else if (strcmp(s2, "LVDS") == 0)
425 rinfo->mon2_type = MT_LCD;
426
427 return 1;
428}
429
430
431
432
433
434
435
436void radeon_probe_screens(struct radeonfb_info *rinfo,
437 const char *monitor_layout, int ignore_edid)
438{
439#ifdef CONFIG_FB_RADEON_I2C
440 int ddc_crt2_used = 0;
441#endif
442 int tmp, i;
443
444 radeon_parse_connector_info(rinfo);
445
446 if (radeon_parse_monitor_layout(rinfo, monitor_layout)) {
447
448
449
450
451
452
453
454
455 pr_debug("Using specified monitor layout: %s", monitor_layout);
456#ifdef CONFIG_FB_RADEON_I2C
457 if (!ignore_edid) {
458 if (rinfo->mon1_type != MT_NONE)
459 if (!radeon_probe_i2c_connector(rinfo, ddc_dvi, &rinfo->mon1_EDID)) {
460 radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon1_EDID);
461 ddc_crt2_used = 1;
462 }
463 if (rinfo->mon2_type != MT_NONE)
464 if (!radeon_probe_i2c_connector(rinfo, ddc_vga, &rinfo->mon2_EDID) &&
465 !ddc_crt2_used)
466 radeon_probe_i2c_connector(rinfo, ddc_crt2, &rinfo->mon2_EDID);
467 }
468#endif
469 if (rinfo->mon1_type == MT_NONE) {
470 if (rinfo->mon2_type != MT_NONE) {
471 rinfo->mon1_type = rinfo->mon2_type;
472 rinfo->mon1_EDID = rinfo->mon2_EDID;
473 } else {
474 rinfo->mon1_type = MT_CRT;
475 printk(KERN_INFO "radeonfb: No valid monitor, assuming CRT on first port\n");
476 }
477 rinfo->mon2_type = MT_NONE;
478 rinfo->mon2_EDID = NULL;
479 }
480 } else {
481
482
483
484
485 pr_debug("Starting monitor auto detection...\n");
486
487#if defined(DEBUG) && defined(CONFIG_FB_RADEON_I2C)
488 {
489 u8 *EDIDs[4] = { NULL, NULL, NULL, NULL };
490 int mon_types[4] = {MT_NONE, MT_NONE, MT_NONE, MT_NONE};
491 int i;
492
493 for (i = 0; i < 4; i++)
494 mon_types[i] = radeon_probe_i2c_connector(rinfo,
495 i+1, &EDIDs[i]);
496 }
497#endif
498
499
500
501 if (!rinfo->has_CRTC2) {
502#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
503 if (rinfo->mon1_type == MT_NONE)
504 rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
505 &rinfo->mon1_EDID);
506#endif
507#ifdef CONFIG_FB_RADEON_I2C
508 if (rinfo->mon1_type == MT_NONE)
509 rinfo->mon1_type =
510 radeon_probe_i2c_connector(rinfo, ddc_dvi,
511 &rinfo->mon1_EDID);
512 if (rinfo->mon1_type == MT_NONE)
513 rinfo->mon1_type =
514 radeon_probe_i2c_connector(rinfo, ddc_vga,
515 &rinfo->mon1_EDID);
516 if (rinfo->mon1_type == MT_NONE)
517 rinfo->mon1_type =
518 radeon_probe_i2c_connector(rinfo, ddc_crt2,
519 &rinfo->mon1_EDID);
520#endif
521 if (rinfo->mon1_type == MT_NONE)
522 rinfo->mon1_type = MT_CRT;
523 goto bail;
524 }
525
526
527
528
529 if (rinfo->bios_seg &&
530 (tmp = BIOS_IN16(rinfo->fp_bios_start + 0x50))) {
531 for (i = 1; i < 4; i++) {
532 unsigned int tmp0;
533
534 if (!BIOS_IN8(tmp + i*2) && i > 1)
535 break;
536 tmp0 = BIOS_IN16(tmp + i*2);
537 if ((!(tmp0 & 0x01)) && (((tmp0 >> 8) & 0x0f) == ddc_dvi)) {
538 rinfo->reversed_DAC = 1;
539 printk(KERN_INFO "radeonfb: Reversed DACs detected\n");
540 }
541 if ((((tmp0 >> 8) & 0x0f) == ddc_dvi) && ((tmp0 >> 4) & 0x01)) {
542 rinfo->reversed_TMDS = 1;
543 printk(KERN_INFO "radeonfb: Reversed TMDS detected\n");
544 }
545 }
546 }
547
548
549
550
551#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
552 if (rinfo->mon1_type == MT_NONE)
553 rinfo->mon1_type = radeon_probe_OF_head(rinfo, 0,
554 &rinfo->mon1_EDID);
555#endif
556#ifdef CONFIG_FB_RADEON_I2C
557 if (rinfo->mon1_type == MT_NONE)
558 rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_dvi,
559 &rinfo->mon1_EDID);
560 if (rinfo->mon1_type == MT_NONE) {
561 rinfo->mon1_type = radeon_probe_i2c_connector(rinfo, ddc_crt2,
562 &rinfo->mon1_EDID);
563 if (rinfo->mon1_type != MT_NONE)
564 ddc_crt2_used = 1;
565 }
566#endif
567 if (rinfo->mon1_type == MT_NONE && rinfo->is_mobility &&
568 ((rinfo->bios_seg && (INREG(BIOS_4_SCRATCH) & 4))
569 || (INREG(LVDS_GEN_CNTL) & LVDS_ON))) {
570 rinfo->mon1_type = MT_LCD;
571 printk("Non-DDC laptop panel detected\n");
572 }
573 if (rinfo->mon1_type == MT_NONE)
574 rinfo->mon1_type = radeon_crt_is_connected(rinfo, rinfo->reversed_DAC);
575
576
577
578
579#if defined(CONFIG_PPC) || defined(CONFIG_SPARC)
580 if (rinfo->mon2_type == MT_NONE)
581 rinfo->mon2_type = radeon_probe_OF_head(rinfo, 1,
582 &rinfo->mon2_EDID);
583#endif
584#ifdef CONFIG_FB_RADEON_I2C
585 if (rinfo->mon2_type == MT_NONE)
586 rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_vga,
587 &rinfo->mon2_EDID);
588 if (rinfo->mon2_type == MT_NONE && !ddc_crt2_used)
589 rinfo->mon2_type = radeon_probe_i2c_connector(rinfo, ddc_crt2,
590 &rinfo->mon2_EDID);
591#endif
592 if (rinfo->mon2_type == MT_NONE)
593 rinfo->mon2_type = radeon_crt_is_connected(rinfo, !rinfo->reversed_DAC);
594
595
596
597
598
599
600 if (rinfo->mon1_type == MT_NONE) {
601 if (rinfo->mon2_type != MT_NONE) {
602 rinfo->mon1_type = rinfo->mon2_type;
603 rinfo->mon1_EDID = rinfo->mon2_EDID;
604 } else
605 rinfo->mon1_type = MT_CRT;
606 rinfo->mon2_type = MT_NONE;
607 rinfo->mon2_EDID = NULL;
608 }
609
610
611
612
613 if (rinfo->reversed_TMDS) {
614
615 if (rinfo->mon1_type == MT_DFP || rinfo->mon2_type == MT_DFP) {
616 int tmp_type = rinfo->mon1_type;
617 u8 *tmp_EDID = rinfo->mon1_EDID;
618 rinfo->mon1_type = rinfo->mon2_type;
619 rinfo->mon1_EDID = rinfo->mon2_EDID;
620 rinfo->mon2_type = tmp_type;
621 rinfo->mon2_EDID = tmp_EDID;
622 if (rinfo->mon1_type == MT_CRT || rinfo->mon2_type == MT_CRT)
623 rinfo->reversed_DAC ^= 1;
624 }
625 }
626 }
627 if (ignore_edid) {
628 kfree(rinfo->mon1_EDID);
629 rinfo->mon1_EDID = NULL;
630 kfree(rinfo->mon2_EDID);
631 rinfo->mon2_EDID = NULL;
632 }
633
634 bail:
635 printk(KERN_INFO "radeonfb: Monitor 1 type %s found\n",
636 radeon_get_mon_name(rinfo->mon1_type));
637 if (rinfo->mon1_EDID)
638 printk(KERN_INFO "radeonfb: EDID probed\n");
639 if (!rinfo->has_CRTC2)
640 return;
641 printk(KERN_INFO "radeonfb: Monitor 2 type %s found\n",
642 radeon_get_mon_name(rinfo->mon2_type));
643 if (rinfo->mon2_EDID)
644 printk(KERN_INFO "radeonfb: EDID probed\n");
645}
646
647
648
649
650
651
652
653
654static void radeon_fixup_panel_info(struct radeonfb_info *rinfo)
655{
656#ifdef CONFIG_PPC
657
658
659
660
661 if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type == MT_LCD
662 && rinfo->is_mobility) {
663 int ppll_div_sel;
664 u32 ppll_divn;
665 ppll_div_sel = INREG8(CLOCK_CNTL_INDEX + 1) & 0x3;
666 radeon_pll_errata_after_index(rinfo);
667 ppll_divn = INPLL(PPLL_DIV_0 + ppll_div_sel);
668 rinfo->panel_info.ref_divider = rinfo->pll.ref_div;
669 rinfo->panel_info.fbk_divider = ppll_divn & 0x7ff;
670 rinfo->panel_info.post_divider = (ppll_divn >> 16) & 0x7;
671 rinfo->panel_info.use_bios_dividers = 1;
672
673 printk(KERN_DEBUG "radeonfb: Using Firmware dividers 0x%08x "
674 "from PPLL %d\n",
675 rinfo->panel_info.fbk_divider |
676 (rinfo->panel_info.post_divider << 16),
677 ppll_div_sel);
678 }
679#endif
680}
681
682
683
684
685
686
687static void radeon_var_to_panel_info(struct radeonfb_info *rinfo, struct fb_var_screeninfo *var)
688{
689 rinfo->panel_info.xres = var->xres;
690 rinfo->panel_info.yres = var->yres;
691 rinfo->panel_info.clock = 100000000 / var->pixclock;
692 rinfo->panel_info.hOver_plus = var->right_margin;
693 rinfo->panel_info.hSync_width = var->hsync_len;
694 rinfo->panel_info.hblank = var->left_margin +
695 (var->right_margin + var->hsync_len);
696 rinfo->panel_info.vOver_plus = var->lower_margin;
697 rinfo->panel_info.vSync_width = var->vsync_len;
698 rinfo->panel_info.vblank = var->upper_margin +
699 (var->lower_margin + var->vsync_len);
700 rinfo->panel_info.hAct_high =
701 (var->sync & FB_SYNC_HOR_HIGH_ACT) != 0;
702 rinfo->panel_info.vAct_high =
703 (var->sync & FB_SYNC_VERT_HIGH_ACT) != 0;
704 rinfo->panel_info.valid = 1;
705
706
707
708
709
710 rinfo->panel_info.pwr_delay = 200;
711}
712
713static void radeon_videomode_to_var(struct fb_var_screeninfo *var,
714 const struct fb_videomode *mode)
715{
716 var->xres = mode->xres;
717 var->yres = mode->yres;
718 var->xres_virtual = mode->xres;
719 var->yres_virtual = mode->yres;
720 var->xoffset = 0;
721 var->yoffset = 0;
722 var->pixclock = mode->pixclock;
723 var->left_margin = mode->left_margin;
724 var->right_margin = mode->right_margin;
725 var->upper_margin = mode->upper_margin;
726 var->lower_margin = mode->lower_margin;
727 var->hsync_len = mode->hsync_len;
728 var->vsync_len = mode->vsync_len;
729 var->sync = mode->sync;
730 var->vmode = mode->vmode;
731}
732
733#ifdef CONFIG_PPC_PSERIES
734static int is_powerblade(const char *model)
735{
736 struct device_node *root;
737 const char* cp;
738 int len, l, rc = 0;
739
740 root = of_find_node_by_path("/");
741 if (root && model) {
742 l = strlen(model);
743 cp = of_get_property(root, "model", &len);
744 if (cp)
745 rc = memcmp(model, cp, min(len, l)) == 0;
746 of_node_put(root);
747 }
748 return rc;
749}
750#endif
751
752
753
754
755
756void radeon_check_modes(struct radeonfb_info *rinfo, const char *mode_option)
757{
758 struct fb_info * info = rinfo->info;
759 int has_default_mode = 0;
760
761
762
763
764 info->var = radeonfb_default_var;
765 INIT_LIST_HEAD(&info->modelist);
766
767
768
769
770 if (rinfo->mon1_type == MT_LCD)
771 radeon_get_panel_info_BIOS(rinfo);
772
773
774
775
776
777
778 if (!rinfo->panel_info.use_bios_dividers && rinfo->mon1_type != MT_CRT
779 && rinfo->mon1_EDID) {
780 struct fb_var_screeninfo var;
781 pr_debug("Parsing EDID data for panel info\n");
782 if (fb_parse_edid(rinfo->mon1_EDID, &var) == 0) {
783 if (var.xres >= rinfo->panel_info.xres &&
784 var.yres >= rinfo->panel_info.yres)
785 radeon_var_to_panel_info(rinfo, &var);
786 }
787 }
788
789
790
791
792 radeon_fixup_panel_info(rinfo);
793
794
795
796
797
798 if (rinfo->mon1_type != MT_CRT && rinfo->panel_info.valid) {
799 struct fb_var_screeninfo *var = &info->var;
800
801 pr_debug("Setting up default mode based on panel info\n");
802 var->xres = rinfo->panel_info.xres;
803 var->yres = rinfo->panel_info.yres;
804 var->xres_virtual = rinfo->panel_info.xres;
805 var->yres_virtual = rinfo->panel_info.yres;
806 var->xoffset = var->yoffset = 0;
807 var->bits_per_pixel = 8;
808 var->pixclock = 100000000 / rinfo->panel_info.clock;
809 var->left_margin = (rinfo->panel_info.hblank - rinfo->panel_info.hOver_plus
810 - rinfo->panel_info.hSync_width);
811 var->right_margin = rinfo->panel_info.hOver_plus;
812 var->upper_margin = (rinfo->panel_info.vblank - rinfo->panel_info.vOver_plus
813 - rinfo->panel_info.vSync_width);
814 var->lower_margin = rinfo->panel_info.vOver_plus;
815 var->hsync_len = rinfo->panel_info.hSync_width;
816 var->vsync_len = rinfo->panel_info.vSync_width;
817 var->sync = 0;
818 if (rinfo->panel_info.hAct_high)
819 var->sync |= FB_SYNC_HOR_HIGH_ACT;
820 if (rinfo->panel_info.vAct_high)
821 var->sync |= FB_SYNC_VERT_HIGH_ACT;
822 var->vmode = 0;
823 has_default_mode = 1;
824 }
825
826
827
828
829 if (rinfo->mon1_EDID) {
830 fb_edid_to_monspecs(rinfo->mon1_EDID, &info->monspecs);
831 fb_videomode_to_modelist(info->monspecs.modedb,
832 info->monspecs.modedb_len,
833 &info->modelist);
834 rinfo->mon1_modedb = info->monspecs.modedb;
835 rinfo->mon1_dbsize = info->monspecs.modedb_len;
836 }
837
838
839
840
841
842
843
844 if (rinfo->mon1_type != MT_CRT && !rinfo->panel_info.valid) {
845 struct fb_videomode *modedb;
846 int dbsize;
847 char modename[32];
848
849 pr_debug("Guessing panel info...\n");
850 if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) {
851 u32 tmp = INREG(FP_HORZ_STRETCH) & HORZ_PANEL_SIZE;
852 rinfo->panel_info.xres = ((tmp >> HORZ_PANEL_SHIFT) + 1) * 8;
853 tmp = INREG(FP_VERT_STRETCH) & VERT_PANEL_SIZE;
854 rinfo->panel_info.yres = (tmp >> VERT_PANEL_SHIFT) + 1;
855 }
856 if (rinfo->panel_info.xres == 0 || rinfo->panel_info.yres == 0) {
857 printk(KERN_WARNING "radeonfb: Can't find panel size, going back to CRT\n");
858 rinfo->mon1_type = MT_CRT;
859 goto pickup_default;
860 }
861 printk(KERN_WARNING "radeonfb: Assuming panel size %dx%d\n",
862 rinfo->panel_info.xres, rinfo->panel_info.yres);
863 modedb = rinfo->mon1_modedb;
864 dbsize = rinfo->mon1_dbsize;
865 snprintf(modename, 31, "%dx%d", rinfo->panel_info.xres, rinfo->panel_info.yres);
866 if (fb_find_mode(&info->var, info, modename,
867 modedb, dbsize, NULL, 8) == 0) {
868 printk(KERN_WARNING "radeonfb: Can't find mode for panel size, going back to CRT\n");
869 rinfo->mon1_type = MT_CRT;
870 goto pickup_default;
871 }
872 has_default_mode = 1;
873 radeon_var_to_panel_info(rinfo, &info->var);
874 }
875
876 pickup_default:
877
878
879
880 if (mode_option) {
881 if (fb_find_mode(&info->var, info, mode_option,
882 info->monspecs.modedb,
883 info->monspecs.modedb_len, NULL, 8) != 0)
884 has_default_mode = 1;
885 }
886
887#ifdef CONFIG_PPC_PSERIES
888 if (!has_default_mode && (
889 is_powerblade("IBM,8842") ||
890 is_powerblade("IBM,8844") ||
891 is_powerblade("IBM,7998") ||
892 is_powerblade("IBM,0792") ||
893 is_powerblade("IBM,0793")
894 )) {
895 printk("Falling back to 800x600 on JSxx hardware\n");
896 if (fb_find_mode(&info->var, info, "800x600@60",
897 info->monspecs.modedb,
898 info->monspecs.modedb_len, NULL, 8) != 0)
899 has_default_mode = 1;
900 }
901#endif
902
903
904
905
906 if (!has_default_mode && info->monspecs.modedb != NULL) {
907 struct fb_monspecs *specs = &info->monspecs;
908 struct fb_videomode *modedb = NULL;
909
910
911 if (specs->misc & FB_MISC_1ST_DETAIL) {
912 int i;
913
914 for (i = 0; i < specs->modedb_len; i++) {
915 if (specs->modedb[i].flag & FB_MODE_IS_FIRST) {
916 modedb = &specs->modedb[i];
917 break;
918 }
919 }
920 } else {
921
922 modedb = &specs->modedb[0];
923 }
924 if (modedb != NULL) {
925 info->var.bits_per_pixel = 8;
926 radeon_videomode_to_var(&info->var, modedb);
927 has_default_mode = 1;
928 }
929 }
930 if (1) {
931 struct fb_videomode mode;
932
933
934
935 fb_var_to_videomode(&mode, &info->var);
936 fb_add_videomode(&mode, &info->modelist);
937 }
938}
939
940
941
942
943
944
945
946
947
948
949
950
951
952static int radeon_compare_modes(const struct fb_var_screeninfo *var,
953 const struct fb_videomode *mode)
954{
955 int distance = 0;
956
957 distance = mode->yres - var->yres;
958 distance += (mode->xres - var->xres)/2;
959 return distance;
960}
961
962
963
964
965
966
967
968
969
970
971
972
973
974int radeon_match_mode(struct radeonfb_info *rinfo,
975 struct fb_var_screeninfo *dest,
976 const struct fb_var_screeninfo *src)
977{
978 const struct fb_videomode *db = vesa_modes;
979 int i, dbsize = 34;
980 int has_rmx, native_db = 0;
981 int distance = INT_MAX;
982 const struct fb_videomode *candidate = NULL;
983
984
985 memcpy(dest, src, sizeof(struct fb_var_screeninfo));
986
987
988 if (rinfo->mon1_modedb) {
989 db = rinfo->mon1_modedb;
990 dbsize = rinfo->mon1_dbsize;
991 native_db = 1;
992 }
993
994
995 has_rmx = rinfo->mon1_type == MT_LCD || rinfo->mon1_type == MT_DFP;
996
997
998
999
1000
1001 if ((src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_TEST ||
1002 (src->activate & FB_ACTIVATE_MASK) == FB_ACTIVATE_NOW) {
1003
1004
1005
1006
1007
1008 if (has_rmx == 0 && rinfo->mon1_modedb)
1009 if (fb_validate_mode((struct fb_var_screeninfo *)src, rinfo->info))
1010 return -EINVAL;
1011 return 0;
1012 }
1013
1014
1015 while (db) {
1016 for (i = 0; i < dbsize; i++) {
1017 int d;
1018
1019 if (db[i].yres < src->yres)
1020 continue;
1021 if (db[i].xres < src->xres)
1022 continue;
1023 d = radeon_compare_modes(src, &db[i]);
1024
1025
1026
1027 if (d < distance) {
1028 candidate = &db[i];
1029 distance = d;
1030 }
1031 }
1032 db = NULL;
1033
1034 if (native_db && has_rmx) {
1035 db = vesa_modes;
1036 dbsize = 34;
1037 native_db = 0;
1038 }
1039 }
1040
1041
1042 if (candidate != NULL) {
1043 radeon_videomode_to_var(dest, candidate);
1044 return 0;
1045 }
1046
1047
1048 if (!has_rmx)
1049 return -EINVAL;
1050
1051 return 0;
1052}
1053