linux/drivers/watchdog/imx2_wdt.c
<<
>>
Prefs
   1/*
   2 * Watchdog driver for IMX2 and later processors
   3 *
   4 *  Copyright (C) 2010 Wolfram Sang, Pengutronix e.K. <w.sang@pengutronix.de>
   5 *  Copyright (C) 2014 Freescale Semiconductor, Inc.
   6 *
   7 * some parts adapted by similar drivers from Darius Augulis and Vladimir
   8 * Zapolskiy, additional improvements by Wim Van Sebroeck.
   9 *
  10 * This program is free software; you can redistribute it and/or modify it
  11 * under the terms of the GNU General Public License version 2 as published by
  12 * the Free Software Foundation.
  13 *
  14 * NOTE: MX1 has a slightly different Watchdog than MX2 and later:
  15 *
  16 *                      MX1:            MX2+:
  17 *                      ----            -----
  18 * Registers:           32-bit          16-bit
  19 * Stopable timer:      Yes             No
  20 * Need to enable clk:  No              Yes
  21 * Halt on suspend:     Manual          Can be automatic
  22 */
  23
  24#include <linux/clk.h>
  25#include <linux/delay.h>
  26#include <linux/init.h>
  27#include <linux/io.h>
  28#include <linux/jiffies.h>
  29#include <linux/kernel.h>
  30#include <linux/module.h>
  31#include <linux/moduleparam.h>
  32#include <linux/notifier.h>
  33#include <linux/of_address.h>
  34#include <linux/platform_device.h>
  35#include <linux/reboot.h>
  36#include <linux/regmap.h>
  37#include <linux/timer.h>
  38#include <linux/watchdog.h>
  39
  40#define DRIVER_NAME "imx2-wdt"
  41
  42#define IMX2_WDT_WCR            0x00            /* Control Register */
  43#define IMX2_WDT_WCR_WT         (0xFF << 8)     /* -> Watchdog Timeout Field */
  44#define IMX2_WDT_WCR_WRE        (1 << 3)        /* -> WDOG Reset Enable */
  45#define IMX2_WDT_WCR_WDE        (1 << 2)        /* -> Watchdog Enable */
  46#define IMX2_WDT_WCR_WDZST      (1 << 0)        /* -> Watchdog timer Suspend */
  47
  48#define IMX2_WDT_WSR            0x02            /* Service Register */
  49#define IMX2_WDT_SEQ1           0x5555          /* -> service sequence 1 */
  50#define IMX2_WDT_SEQ2           0xAAAA          /* -> service sequence 2 */
  51
  52#define IMX2_WDT_WRSR           0x04            /* Reset Status Register */
  53#define IMX2_WDT_WRSR_TOUT      (1 << 1)        /* -> Reset due to Timeout */
  54
  55#define IMX2_WDT_WMCR           0x08            /* Misc Register */
  56
  57#define IMX2_WDT_MAX_TIME       128
  58#define IMX2_WDT_DEFAULT_TIME   60              /* in seconds */
  59
  60#define WDOG_SEC_TO_COUNT(s)    ((s * 2 - 1) << 8)
  61
  62struct imx2_wdt_device {
  63        struct clk *clk;
  64        struct regmap *regmap;
  65        struct timer_list timer;        /* Pings the watchdog when closed */
  66        struct watchdog_device wdog;
  67        struct notifier_block restart_handler;
  68};
  69
  70static bool nowayout = WATCHDOG_NOWAYOUT;
  71module_param(nowayout, bool, 0);
  72MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  73                                __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  74
  75
  76static unsigned timeout = IMX2_WDT_DEFAULT_TIME;
  77module_param(timeout, uint, 0);
  78MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds (default="
  79                                __MODULE_STRING(IMX2_WDT_DEFAULT_TIME) ")");
  80
  81static const struct watchdog_info imx2_wdt_info = {
  82        .identity = "imx2+ watchdog",
  83        .options = WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE,
  84};
  85
  86static int imx2_restart_handler(struct notifier_block *this, unsigned long mode,
  87                                void *cmd)
  88{
  89        unsigned int wcr_enable = IMX2_WDT_WCR_WDE;
  90        struct imx2_wdt_device *wdev = container_of(this,
  91                                                    struct imx2_wdt_device,
  92                                                    restart_handler);
  93        /* Assert SRS signal */
  94        regmap_write(wdev->regmap, 0, wcr_enable);
  95        /*
  96         * Due to imx6q errata ERR004346 (WDOG: WDOG SRS bit requires to be
  97         * written twice), we add another two writes to ensure there must be at
  98         * least two writes happen in the same one 32kHz clock period.  We save
  99         * the target check here, since the writes shouldn't be a huge burden
 100         * for other platforms.
 101         */
 102        regmap_write(wdev->regmap, 0, wcr_enable);
 103        regmap_write(wdev->regmap, 0, wcr_enable);
 104
 105        /* wait for reset to assert... */
 106        mdelay(500);
 107
 108        return NOTIFY_DONE;
 109}
 110
 111static inline void imx2_wdt_setup(struct watchdog_device *wdog)
 112{
 113        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 114        u32 val;
 115
 116        regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
 117
 118        /* Suspend timer in low power mode, write once-only */
 119        val |= IMX2_WDT_WCR_WDZST;
 120        /* Strip the old watchdog Time-Out value */
 121        val &= ~IMX2_WDT_WCR_WT;
 122        /* Generate reset if WDOG times out */
 123        val &= ~IMX2_WDT_WCR_WRE;
 124        /* Keep Watchdog Disabled */
 125        val &= ~IMX2_WDT_WCR_WDE;
 126        /* Set the watchdog's Time-Out value */
 127        val |= WDOG_SEC_TO_COUNT(wdog->timeout);
 128
 129        regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
 130
 131        /* enable the watchdog */
 132        val |= IMX2_WDT_WCR_WDE;
 133        regmap_write(wdev->regmap, IMX2_WDT_WCR, val);
 134}
 135
 136static inline bool imx2_wdt_is_running(struct imx2_wdt_device *wdev)
 137{
 138        u32 val;
 139
 140        regmap_read(wdev->regmap, IMX2_WDT_WCR, &val);
 141
 142        return val & IMX2_WDT_WCR_WDE;
 143}
 144
 145static int imx2_wdt_ping(struct watchdog_device *wdog)
 146{
 147        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 148
 149        regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ1);
 150        regmap_write(wdev->regmap, IMX2_WDT_WSR, IMX2_WDT_SEQ2);
 151        return 0;
 152}
 153
 154static void imx2_wdt_timer_ping(unsigned long arg)
 155{
 156        struct watchdog_device *wdog = (struct watchdog_device *)arg;
 157        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 158
 159        /* ping it every wdog->timeout / 2 seconds to prevent reboot */
 160        imx2_wdt_ping(wdog);
 161        mod_timer(&wdev->timer, jiffies + wdog->timeout * HZ / 2);
 162}
 163
 164static int imx2_wdt_set_timeout(struct watchdog_device *wdog,
 165                                unsigned int new_timeout)
 166{
 167        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 168
 169        regmap_update_bits(wdev->regmap, IMX2_WDT_WCR, IMX2_WDT_WCR_WT,
 170                           WDOG_SEC_TO_COUNT(new_timeout));
 171        return 0;
 172}
 173
 174static int imx2_wdt_start(struct watchdog_device *wdog)
 175{
 176        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 177
 178        if (imx2_wdt_is_running(wdev)) {
 179                /* delete the timer that pings the watchdog after close */
 180                del_timer_sync(&wdev->timer);
 181                imx2_wdt_set_timeout(wdog, wdog->timeout);
 182        } else
 183                imx2_wdt_setup(wdog);
 184
 185        return imx2_wdt_ping(wdog);
 186}
 187
 188static int imx2_wdt_stop(struct watchdog_device *wdog)
 189{
 190        /*
 191         * We don't need a clk_disable, it cannot be disabled once started.
 192         * We use a timer to ping the watchdog while /dev/watchdog is closed
 193         */
 194        imx2_wdt_timer_ping((unsigned long)wdog);
 195        return 0;
 196}
 197
 198static inline void imx2_wdt_ping_if_active(struct watchdog_device *wdog)
 199{
 200        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 201
 202        if (imx2_wdt_is_running(wdev)) {
 203                imx2_wdt_set_timeout(wdog, wdog->timeout);
 204                imx2_wdt_timer_ping((unsigned long)wdog);
 205        }
 206}
 207
 208static const struct watchdog_ops imx2_wdt_ops = {
 209        .owner = THIS_MODULE,
 210        .start = imx2_wdt_start,
 211        .stop = imx2_wdt_stop,
 212        .ping = imx2_wdt_ping,
 213        .set_timeout = imx2_wdt_set_timeout,
 214};
 215
 216static const struct regmap_config imx2_wdt_regmap_config = {
 217        .reg_bits = 16,
 218        .reg_stride = 2,
 219        .val_bits = 16,
 220        .max_register = 0x8,
 221};
 222
 223static int __init imx2_wdt_probe(struct platform_device *pdev)
 224{
 225        struct imx2_wdt_device *wdev;
 226        struct watchdog_device *wdog;
 227        struct resource *res;
 228        void __iomem *base;
 229        int ret;
 230        u32 val;
 231
 232        wdev = devm_kzalloc(&pdev->dev, sizeof(*wdev), GFP_KERNEL);
 233        if (!wdev)
 234                return -ENOMEM;
 235
 236        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 237        base = devm_ioremap_resource(&pdev->dev, res);
 238        if (IS_ERR(base))
 239                return PTR_ERR(base);
 240
 241        wdev->regmap = devm_regmap_init_mmio_clk(&pdev->dev, NULL, base,
 242                                                 &imx2_wdt_regmap_config);
 243        if (IS_ERR(wdev->regmap)) {
 244                dev_err(&pdev->dev, "regmap init failed\n");
 245                return PTR_ERR(wdev->regmap);
 246        }
 247
 248        wdev->clk = devm_clk_get(&pdev->dev, NULL);
 249        if (IS_ERR(wdev->clk)) {
 250                dev_err(&pdev->dev, "can't get Watchdog clock\n");
 251                return PTR_ERR(wdev->clk);
 252        }
 253
 254        wdog                    = &wdev->wdog;
 255        wdog->info              = &imx2_wdt_info;
 256        wdog->ops               = &imx2_wdt_ops;
 257        wdog->min_timeout       = 1;
 258        wdog->max_timeout       = IMX2_WDT_MAX_TIME;
 259
 260        clk_prepare_enable(wdev->clk);
 261
 262        regmap_read(wdev->regmap, IMX2_WDT_WRSR, &val);
 263        wdog->bootstatus = val & IMX2_WDT_WRSR_TOUT ? WDIOF_CARDRESET : 0;
 264
 265        wdog->timeout = clamp_t(unsigned, timeout, 1, IMX2_WDT_MAX_TIME);
 266        if (wdog->timeout != timeout)
 267                dev_warn(&pdev->dev, "Initial timeout out of range! Clamped from %u to %u\n",
 268                         timeout, wdog->timeout);
 269
 270        platform_set_drvdata(pdev, wdog);
 271        watchdog_set_drvdata(wdog, wdev);
 272        watchdog_set_nowayout(wdog, nowayout);
 273        watchdog_init_timeout(wdog, timeout, &pdev->dev);
 274
 275        setup_timer(&wdev->timer, imx2_wdt_timer_ping, (unsigned long)wdog);
 276
 277        imx2_wdt_ping_if_active(wdog);
 278
 279        /*
 280         * Disable the watchdog power down counter at boot. Otherwise the power
 281         * down counter will pull down the #WDOG interrupt line for one clock
 282         * cycle.
 283         */
 284        regmap_write(wdev->regmap, IMX2_WDT_WMCR, 0);
 285
 286        ret = watchdog_register_device(wdog);
 287        if (ret) {
 288                dev_err(&pdev->dev, "cannot register watchdog device\n");
 289                return ret;
 290        }
 291
 292        wdev->restart_handler.notifier_call = imx2_restart_handler;
 293        wdev->restart_handler.priority = 128;
 294        ret = register_restart_handler(&wdev->restart_handler);
 295        if (ret)
 296                dev_err(&pdev->dev, "cannot register restart handler\n");
 297
 298        dev_info(&pdev->dev, "timeout %d sec (nowayout=%d)\n",
 299                 wdog->timeout, nowayout);
 300
 301        return 0;
 302}
 303
 304static int __exit imx2_wdt_remove(struct platform_device *pdev)
 305{
 306        struct watchdog_device *wdog = platform_get_drvdata(pdev);
 307        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 308
 309        unregister_restart_handler(&wdev->restart_handler);
 310
 311        watchdog_unregister_device(wdog);
 312
 313        if (imx2_wdt_is_running(wdev)) {
 314                del_timer_sync(&wdev->timer);
 315                imx2_wdt_ping(wdog);
 316                dev_crit(&pdev->dev, "Device removed: Expect reboot!\n");
 317        }
 318        return 0;
 319}
 320
 321static void imx2_wdt_shutdown(struct platform_device *pdev)
 322{
 323        struct watchdog_device *wdog = platform_get_drvdata(pdev);
 324        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 325
 326        if (imx2_wdt_is_running(wdev)) {
 327                /*
 328                 * We are running, we need to delete the timer but will
 329                 * give max timeout before reboot will take place
 330                 */
 331                del_timer_sync(&wdev->timer);
 332                imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
 333                imx2_wdt_ping(wdog);
 334                dev_crit(&pdev->dev, "Device shutdown: Expect reboot!\n");
 335        }
 336}
 337
 338#ifdef CONFIG_PM_SLEEP
 339/* Disable watchdog if it is active or non-active but still running */
 340static int imx2_wdt_suspend(struct device *dev)
 341{
 342        struct watchdog_device *wdog = dev_get_drvdata(dev);
 343        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 344
 345        /* The watchdog IP block is running */
 346        if (imx2_wdt_is_running(wdev)) {
 347                imx2_wdt_set_timeout(wdog, IMX2_WDT_MAX_TIME);
 348                imx2_wdt_ping(wdog);
 349
 350                /* The watchdog is not active */
 351                if (!watchdog_active(wdog))
 352                        del_timer_sync(&wdev->timer);
 353        }
 354
 355        clk_disable_unprepare(wdev->clk);
 356
 357        return 0;
 358}
 359
 360/* Enable watchdog and configure it if necessary */
 361static int imx2_wdt_resume(struct device *dev)
 362{
 363        struct watchdog_device *wdog = dev_get_drvdata(dev);
 364        struct imx2_wdt_device *wdev = watchdog_get_drvdata(wdog);
 365
 366        clk_prepare_enable(wdev->clk);
 367
 368        if (watchdog_active(wdog) && !imx2_wdt_is_running(wdev)) {
 369                /*
 370                 * If the watchdog is still active and resumes
 371                 * from deep sleep state, need to restart the
 372                 * watchdog again.
 373                 */
 374                imx2_wdt_setup(wdog);
 375                imx2_wdt_set_timeout(wdog, wdog->timeout);
 376                imx2_wdt_ping(wdog);
 377        } else if (imx2_wdt_is_running(wdev)) {
 378                /* Resuming from non-deep sleep state. */
 379                imx2_wdt_set_timeout(wdog, wdog->timeout);
 380                imx2_wdt_ping(wdog);
 381                /*
 382                 * But the watchdog is not active, then start
 383                 * the timer again.
 384                 */
 385                if (!watchdog_active(wdog))
 386                        mod_timer(&wdev->timer,
 387                                  jiffies + wdog->timeout * HZ / 2);
 388        }
 389
 390        return 0;
 391}
 392#endif
 393
 394static SIMPLE_DEV_PM_OPS(imx2_wdt_pm_ops, imx2_wdt_suspend,
 395                         imx2_wdt_resume);
 396
 397static const struct of_device_id imx2_wdt_dt_ids[] = {
 398        { .compatible = "fsl,imx21-wdt", },
 399        { /* sentinel */ }
 400};
 401MODULE_DEVICE_TABLE(of, imx2_wdt_dt_ids);
 402
 403static struct platform_driver imx2_wdt_driver = {
 404        .remove         = __exit_p(imx2_wdt_remove),
 405        .shutdown       = imx2_wdt_shutdown,
 406        .driver         = {
 407                .name   = DRIVER_NAME,
 408                .pm     = &imx2_wdt_pm_ops,
 409                .of_match_table = imx2_wdt_dt_ids,
 410        },
 411};
 412
 413module_platform_driver_probe(imx2_wdt_driver, imx2_wdt_probe);
 414
 415MODULE_AUTHOR("Wolfram Sang");
 416MODULE_DESCRIPTION("Watchdog driver for IMX2 and later");
 417MODULE_LICENSE("GPL v2");
 418MODULE_ALIAS("platform:" DRIVER_NAME);
 419